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2018-02-19drm/amd/display: fix incompatible structure layoutsArnd Bergmann3-61/+68
Building the amd display driver with link-time optimizations revealed a bug that caused dal_cmd_tbl_helper_dce80_get_table() and dal_cmd_tbl_helper_dce110_get_table() get called with an incompatible return type between the two callers in command_table_helper.c and command_table_helper2.c: drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.h:31: error: type of 'dal_cmd_tbl_helper_dce80_get_table' does not match original declaration [-Werror=lto-type-mismatch] const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void); drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.c:351: note: 'dal_cmd_tbl_helper_dce80_get_table' was previously declared here const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void) drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.h:32: error: type of 'dal_cmd_tbl_helper_dce110_get_table' does not match original declaration [-Werror=lto-type-mismatch] const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void); drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.c:361: note: 'dal_cmd_tbl_helper_dce110_get_table' was previously declared here const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void) The two versions of the structure are obviously derived from the same one, but have diverged over time, before they got added to the kernel. This moves the structure to a new shared header file and uses the superset of the members, to ensure the interfaces are all compatible. Fixes: ae79c310b1a6 ("drm/amd/display: Add DCE12 bios parser support") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: cache the fence to wait for a VMIDChristian König3-2/+9
Beneficial when a lot of processes are waiting for VMIDs. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: restructure amdgpu_vmid_grabChristian König1-47/+42
Now that we have the different cases for grabbing a VMID in separate functions, restructure the top level function to only have one place where VMIDs are assigned to jobs. Signed-off-by: Christian König <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: move reusing VMIDs into separate functionChristian König1-49/+81
Let's try this once more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: cleanup and simplify amdgpu_vmid_grab_reservedChristian König1-23/+35
Drop the "_locked" from the name, cleanup and simplify the logic a bit. Add missing comments. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: stop checking GPU reset counter during VMID grabChristian König1-5/+1
We do this later on when we flush the VMID anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: make VMID owner none atomic v2Christian König2-6/+8
The variable is protected by the VMID mutex anyway. v2: grab the mutex while resetting the VMID as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: split finding idle VMID into separate functionChristian König1-47/+69
No functional change, but makes it easier to maintain the code. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: make VMID assignment more fair v2Christian König1-5/+7
Similar to finding an idle one before reuse. This guarantees fairness between processes. Otherwise process with a reserved VMID have an unfair advantage while scheduling jobs. v2: improve commit message Signed-off-by: Christian König <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Fix always_valid bos multiple LRU insertions.Bas Nieuwenhuizen2-3/+5
If these bos are evicted and are in the validated list things blow up, so do not put them in there. Notably, that tries to add the bo to the LRU twice, which results in a BUG_ON in ttm_bo.c. While for the bo_list an alternative would be to not allow always valid bos in there, that does not work for the user fence. v2: Fixed whitespace issue pointed out by checkpatch.pl Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-19Revert "drm/amdgpu/gfx8: Fix compute ring failure after resetting"Andrey Grodzovsky1-7/+3
This reverts commit 75737cb4eb78c7f185e4700b4aa20cf7a3381aca. Fixes compute rings test failure on bare metal during full GPU reset. RCA: the ring buffer has to be filled with valid packets (such as NOPs) first before submitting MAP_QUEUEs packet into KIQ. Once a compute engine is mapped, it will immediately execute the ring buffer if the RTPR is not equal to the WTPR from the MQD. It could lead to engine hang if the ring buffer filled with random data. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlbChristian König7-60/+33
Keep that at a common place instead of spread over all engines. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: implement vcn_v1_0_(dec|enc)_ring_emit_reg_wait v2Christian König1-17/+25
Add emit_reg_wait implementation for VCN v1. v2: cleanup the existing code as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: implement vce_v4_0_emit_reg_wait v2Christian König1-8/+14
Add emit_reg_wait implementation for VCE v4. v2: call new function directly from existing code Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: implement uvd_v7_0_(enc_|)ring_emit_reg_wait v2Christian König1-16/+24
Add emit_reg_wait implementation for UVD v7. v2: call new function directly from the existing code Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: implement sdma_v4_0_ring_emit_reg_waitChristian König1-0/+15
Add emit_reg_wait implementation for SDMA v4. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: implement gfx_v9_0_ring_emit_reg_waitChristian König1-0/+9
Implement emit_reg_wait for gfx v9. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: add new emit_reg_wait callbackChristian König2-0/+3
Allows us to wait for a register value/mask on a ring. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: fix DW estimation on VIChristian König2-2/+4
Forgot to update that during recent changes. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VIRex Zhu2-14/+20
when echo "01">pp_dpm_pcie the pcie dpm will fix in highest link speed. But user should expect auto speed between level 0 and level1 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Enable pp_set_power_profile_mode under manual modeRex Zhu1-2/+6
Only user enter manual performance mode, driver allow user configure the sclk/mclk dpm parameters through sysfs pp_power_profile_mode. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Refine pp_dpm_force_clock_level functionsRex Zhu5-17/+5
Only when user set manual performance mode, driver enable pp_dpm_force_clock_level. so check the mode in pp_dpm_force_clock_level, and delete the same logic in callback functions. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Delete debug info when set power_profile_modeRex Zhu2-3/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: limit the VM address space with older VCE FW versionsChristian König2-0/+7
Older VCE FW versions are buggy and can't work with 48bit address spaces. RFC: Should we limit the address space or just reject loading the older VCE firmware? Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm: amd: Fix trailing semicolonsLuis de Bethencourt2-2/+2
The trailing semicolon is an empty statement that does no operation. Removing the two instances of them since they don't do anything. Signed-off-by: Luis de Bethencourt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: set DRIVER_ATOMIC flag earlyAlex Deucher2-2/+12
The atomic debugfs stuff gets created in drm_dev_alloc() but this gets called before we've enumerated all of our IPs, so move the DRIVER_ATOMIC flag setting to fix that. Since DRIVER_ATOMIC is a driver flag it's currently global to the driver so setting it affects all GPUs driven by the driver. Unfortunately, not all GPUs support atomic. Warn the user if that is the case. This is the same as our current behavior, but at least the atomic debugfs stuff gets created now. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: remove DC special casing for KB/MLAlex Deucher1-3/+2
It seems to be working now. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102372 Reviewed-by: Mike Lothian <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: fill only the lower range with ATS entries v2Christian König1-29/+53
At least on x86-64 the upper range is purely used by the kernel, avoid creating any ATS mappings there as security precaution and to allow proper page fault reporting in the upper range. v2: remove unused variable Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: revert "Add support for filling a buffer with 64 bit value"Christian König9-39/+8
This reverts commit 7bdc53f925af085ffa0580f10489f82b36cc2f1c and commit 330df03b3abf944f8f5180f2abc61367749984c0. Neither are needed any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: revert "Add a parameter to amdgpu_bo_create()"Christian König14-29/+21
This reverts commit 2046d46db9166bddc84778f0b3477f6d1e9068ea. Not needed any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: drop root shadow syncChristian König1-5/+0
Completely pointless, it is the same reservation object as the root PD anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: revert "drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM ↵Christian König1-24/+92
PD/PTs" v2 Using the standard clear turned out to be to inflexible. First of all it is executed on the system queue, together with buffer moves instead on the per VM queue. And second we need to fill in the page tables with more than just zero. We keep the new functionality of initializing the PDEs/PTEs with ATC routing entries intact. v2: update commit message. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: fix vcn_v1_0_dec_ring_emit_wregChristian König1-1/+18
That got mixed up with the encode ring function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pm: rework the hwmon visibility settingsAlex Deucher1-13/+17
Previously we just always exposed everything for asics supported by powerplay. Make it a bit more fine grained. In practice this shouldn't change anything. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pp: remove the get_temperature APIAlex Deucher11-38/+0
This is also supported with the read_sensor API and there were no more users of the get_temperature API. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pm: use read_sensor API to get temperatureAlex Deucher1-8/+16
Rather than using the amdgpu_dpm_get_temperature. Both provide access to the temperature. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pm: report gpu average power via hwmon APIAlex Deucher1-0/+34
Expose power via hwmon. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pm: report gpu voltages via hwmon APIAlex Deucher1-0/+82
Expose vddgfx and vddnb via hwmon. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pm: handle fan properly when card is powered downAlex Deucher1-0/+20
Return an error if the user tried to check or set the fan parameters while the card is powered down (e.g., on a PX/HG system for example). This makes the fan consistent with the temperature stuff. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: move static CSA address to top of address space v2Christian König4-13/+26
Move the CSA area to the top of the VA space to avoid clashing with HMM/ATC in the lower range on GFX9. v2: wrong sign noticed by Roger, rebase on CSA_VADDR cleanup, handle VA hole on GFX9 as well. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Delete unnecessary function argumentRex Zhu5-18/+8
in populate_single_graphic_level for smu7 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Add struct profile_mode_setting for smu7Rex Zhu7-39/+56
Move configurable profiling parameters to struct profile_mode_setting and initialize current_profile_setting. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Delete dead code in powerplayRex Zhu12-45/+15
As not support per DPM level optimization, so delete activity_target array. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Change activity_target for performance optimization on PolarisRex Zhu5-7/+4
And not support perDPM level optimization on Polaris, so delete sclk activity_target array. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove timer handler.Andrey Grodzovsky2-80/+0
Dead code, looks obsolete. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove unsued mutex and spinlock.Andrey Grodzovsky2-15/+0
They seem to be obsolete. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Fix warning about misaligned codeHarry Wentland1-2/+2
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Add temporary delay on disconnect patchJohn Barberiz1-0/+2
- Sequencing bug of not resetting delay on disconnect to default values Signed-off-by: John Barberiz <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove unnecessary register programmingMikita Lipski1-4/+0
Remove aux engine register programming,when freeing the engine as it was a temporary workaround. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Add temporary delay on disconnect patchJohn Barberiz2-4/+16
Signed-off-by: John Barberiz <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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