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2015-06-03drm/amdgpu: Add support for CIK partsAlex Deucher29-0/+30008
This patch adds support for CIK parts. These parts are also supported by radeon which is the preferred option, so there is a config option to enable support for CIK parts in amdgpu for testing. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: Do not directly dereference pointers to BIOS area.Alex Deucher1-3/+7
Use readb() and memcpy_fromio() accessors instead. Ported from radeon commit: f2c9e560b406f2f6b14b345c7da33467dee9cdf2 Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: fix const warnings in amdgpu_connectors.cAlex Deucher1-7/+7
Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add core driver (v4)Alex Deucher76-0/+33574
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add amdgpu.h (v2)Alex Deucher1-0/+2387
This is the main header file for amdgpu. v2: remove stable comments Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add amdgpu_family.hAlex Deucher1-0/+62
This header defines asic families and attributes. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add ppsmc.hAlex Deucher1-0/+196
This header provides the smc message interface for the driver. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add clearstate_defs.hAlex Deucher1-0/+44
This header provides for format for the GCA blocks clear state (i.e., default state). Each GCA version has a specific clear state. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add atombios headersAlex Deucher3-0/+9989
These headers define the atombios table structure and driver interface. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add VCE 3.0 register headersAlex Deucher2-0/+193
These are register headers for the VCE (Video Codec Engine) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add VCE 2.0 register headersAlex Deucher2-0/+172
These are register headers for the VCE (Video Codec Engine) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add UVD 6.0 register headersAlex Deucher3-0/+2230
These are register headers for the UVD (Universal Video Decoder) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add UVD 5.0 register headersAlex Deucher3-0/+2371
These are register headers for the UVD (Universal Video Decoder) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add UVD 4.2 register headersAlex Deucher2-0/+895
These are register headers for the UVD (Universal Video Decoder) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 8.0 register headersAlex Deucher3-0/+4707
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 7.1.2 register headersAlex Deucher3-0/+8353
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 7.1.1 register headersAlex Deucher3-0/+7192
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 7.1.0 register headersAlex Deucher3-0/+8183
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 7.0.1 register headersAlex Deucher2-0/+6770
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add SMU 7.0.0 register headersAlex Deucher2-0/+4583
These are register headers for the SMU (System Management Unit) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add OSS 3.0.1 register headersAlex Deucher3-0/+5615
These are register headers for the OSS (OS Services) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add OSS 3.0 register headersAlex Deucher3-0/+5845
These are register headers for the OSS (OS Services) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add OSS 2.4 register headersAlex Deucher3-0/+4355
These are register headers for the OSS (OS Services) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add OSS 2.0 register headersAlex Deucher2-0/+3118
These are register headers for the OSS (OS Services) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GMC 8.2 register headersAlex Deucher3-0/+9828
These are register headers for the GMC (Graphics Memory Controller) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GMC 8.1 register headersAlex Deucher3-0/+18588
These are register headers for the GMC (Graphics Memory Controller) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GMC 7.1 register headersAlex Deucher2-0/+15880
These are register headers for the GMC (Graphics Memory Controller) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GMC 7.0 register headersAlex Deucher2-0/+6773
These are register headers for the GMC (Graphics Memory Controller) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GCA 8.0 register headersAlex Deucher3-0/+30445
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GCA 7.2 register headersAlex Deucher3-0/+27275
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add GCA 7.0 register headersAlex Deucher1-0/+2532
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add DCE 11.0 register headersAlex Deucher3-0/+31334
These are register headers for the DCE (Display and Composition Engine) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add DCE 10.0 register headersAlex Deucher3-0/+25770
These are register headers for the DCE (Display and Composition Engine) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add DCE 8.0 register headersAlex Deucher2-0/+18812
These are register headers for the DCE (Display and Composition Engine) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add BIF 5.1 register headersAlex Deucher3-0/+37725
These are register headers for the BIF (Bus InterFace) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add BIF 5.0 register headersAlex Deucher3-0/+13760
These are register headers for the BIF (Bus InterFace) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add BIF 4.1 register headersAlex Deucher2-0/+11171
These are register headers for the BIF (Bus InterFace) block on the GPU. Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdkfd: fix topology bug with capability attr.Alexey Skidanov1-2/+2
This patch fixes a bug where the number of watch points was shown before it was actually calculated Signed-off-by: Alexey Skidanov <[email protected]> Cc: [email protected] Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Enforce kill all waves on process terminationBen Goz4-1/+90
This commit makes sure that on process termination, after we're destroying all the active queues, we're killing all the existing wave front of the current process. By doing this we're making sure that if any of the CUs were blocked by infinite loop we're enforcing it to end the shader explicitly. Signed-off-by: Ben Goz <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/radeon: Add ATC VMID<-->PASID functions to kfd->kgdAlexey Skidanov1-0/+8
This patch adds three new interfaces to kfd2kgd interface file of radeon. The interfaces are: - Check if a specific VMID has a valid PASID mapping - Retrieve the PASID which is mapped to a specific VMID - Issue a VMID invalidation request to the ATC Signed-off-by: Alexey Skidanov <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Implement address watch debugger IOCTLYair Shachar1-1/+101
v2: - rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it - change void* to uint64_t inside ioctl arguments - use kmalloc instead of kzalloc because we use copy_from_user immediately after it Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Implement wave control debugger IOCTLYair Shachar1-1/+87
v2: - rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it - change void* to uint64_t inside ioctl arguments - use kmalloc instead of kzalloc because we use copy_from_user immediately after it Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Implement (un)register debugger IOCTLsYair Shachar1-2/+70
v2: rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Add address watch operation to debuggerYair Shachar3-0/+295
The address watch operation gives the ability to specify watch points which will generate a shader breakpoint, based on a specified single address or range of addresses. There is support for read/write/any access modes. Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Add wave control operation to debuggerYair Shachar5-2/+430
The wave control operation supports several command types executed upon existing wave fronts that belong to the currently debugged process. The available commands are: HALT - Freeze wave front(s) execution RESUME - Resume freezed wave front(s) execution KILL - Kill existing wave front(s) Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Add skeleton H/W debugger module supportYair Shachar9-2/+1058
This patch adds the skeleton H/W debugger module support. This code enables registration and unregistration of a single HSA process at a time. The module saves the process's pasid and use it to verify that only the registered process is allowed to execute debugger operations through the kernel driver. v2: rename get_dbgmgr_mutex to kfd_get_dbgmgr_mutex to namespace it Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Add static user-mode queues supportYair Shachar7-19/+97
This patch adds support for static user-mode queues in QCM. Queues which are designated as static can NOT be preempted by the CP microcode when it is executing its scheduling algorithm. This is needed for supporting the debugger feature, because we can't allow the CP to preempt queues which are currently being debugged. The number of queues that can be designated as static is limited by the number of HQDs (Hardware Queue Descriptors). Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: add H/W debugger IOCTL set definitionsYair Shachar1-0/+54
This patch adds four new IOCTLs to amdkfd. These IOCTLs expose a H/W debugger functionality to the userspace. The IOCTLs are: - AMDKFD_IOC_DBG_REGISTER: The purpose of this IOCTL is to notify amdkfd that a process wants to use GPU debugging facilities on itself only. It is expected that this IOCTL would be called before any other H/W debugger requests are sent to amdkfd and for each GPU where the H/W debugging needs to be enabled. The use of this IOCTL ensures that only one instance of a debugger is active in the system. - AMDKFD_IOC_DBG_UNREGISTER: This IOCTL detaches the debugger/debugged process from the H/W Debug which was established by the AMDKFD_IOC_DBG_REGISTER IOCTL. - AMDKFD_IOC_DBG_ADDRESS_WATCH: This IOCTL allows to set different watchpoints with various conditions as indicated by the IOCTL's arguments. The available number of watchpoints is retrieved from topology. This operation is confined to the current debugged process, which was registered through AMDKFD_IOC_DBG_REGISTER. - AMDKFD_IOC_DBG_WAVE_CONTROL: This IOCTL allows to control a wavefront as indicated by the IOCTL's arguments. For example, you can halt/resume or kill either a single wavefront or a set of wavefronts. This operation is confined to the current debugged process, which was registered through AMDKFD_IOC_DBG_REGISTER. Because the arguments for the address watch IOCTL and wave control IOCTL are dynamic, meaning that they could vary in size, the userspace passes a pointer to a structure (in userspace) that contains the value of the arguments. The kernel driver is responsible to parse this structure and validate its contents. v2: change void* to uint64_t inside ioctl arguments Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/radeon: Add H/W debugger kfd->kgd functionsYair Shachar1-0/+13
This patch adds new interface functions to the kfd2kgd interface file. The new functions allow to perform H/W debugger operations by writing to GPU registers. Signed-off-by: Yair Shachar <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2015-06-03drm/amdkfd: Use DECLARE_BITMAPJoe Perches1-4/+2
Use the generic mechanism to declare a bitmap instead of unsigned long. It seems that "struct kfd_process.allocated_queue_bitmap" is unused. Maybe it could be deleted instead. Signed-off-by: Joe Perches <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
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