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2017-12-06drm/amd/display: Add check update surfaces for stream wrapperAndrew Jiang2-3/+23
This allows us to properly clear and set the update flags for all cases. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Rename pitch_alignment to linear_pitch_alignmentAndrew Jiang3-2/+2
Also initialize this to 64 for all ASICs. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Added Opp and Diags Interface for P to IArun Pandey6-43/+44
Signed-off-by: Arun Pandey <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix plane update prior to stream enablementTony Cheng1-2/+4
plane update prior to stream enablement is there to recombine pipe in case we need free pipe for new display. need to pass in new state or we will just re-applyingwhat we already have Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Add update flags in to determine surface update typeAndrew Jiang2-76/+140
This way, we can know exactly what triggered the update type we're looking at, and we can simplify the logic for determining what exactly needs to be updated in the future. Also allow a dst rect size increase to go through a medium update, since that does not require us to increase clock or bandwidth. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove legacy unused workaroundAndrew Jiang1-14/+5
We shouldn't be able to get a non-visible plane into DC anymore. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Early return on stream programming failureLeo (Sunpeng) Li1-2/+1
The fail goto is incorrect. It will incorrectly release the dc_states on stream programming failure. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Change frontend/backend programming sequenceLeo (Sunpeng) Li1-13/+28
This is a follow-up to the following change: Yongqiang Sun: Program front end first when set mode. Due to pipe-splitting features, how we handle stream enabling and disabling needs to change. In the case of pipe split disable, two planes need to be combined back into the same stream. This needs to be done before any stream programming happens. The previous patch addresses this, but breaks cross-platform compatibility. It's not guaranteed that a dc commit will be called separately to program planes and streams. Therefore, we handle the combined commit case by doing plane programming both before and after stream programming, to handle pipe split disable and plane enable respectively. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove dangling planes on dc commit stateLeo (Sunpeng) Li1-2/+0
When disabling pipe splitting, we need to make sure we disable both planes used. This should be done for Linux as well. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Optimize programming front endYongqiang Sun2-37/+27
In case of update type is medium, optimize squence, reduce programing time. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Fix unbalanced locking in surface applyRoman Li1-5/+2
also simplifying syntax and removing unused variable in dce110_apply_ctx_for_surface() Signed-off-by: Roman Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Apply work around for stutter.Yongqiang Sun6-95/+84
Power on one plane after disable all the planes, for a hw bug work around to resolve stutter efficiency issue. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: remove dcn10 wait on tg unlockDmytro Laktyushkin1-5/+0
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Loosen plane_info and scaling_info checksAndrew Jiang1-5/+12
Make it so that differing dcc and plane size fields don't necessarily result in a full update, along with upscaling modes. This allows us to save some unnecessary full updates. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Report pitch_alignment for DCNAndrew Jiang2-1/+2
Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: combine output signal and signalEric Yang2-11/+6
output signal used to be a public member to be used by DM to override the stream signal. Now since there is no longer separation between public and private part of stream, they are combined. The overriding was not working properly as well, which is addressed by this change Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: A few more color indentation changesHarry Wentland6-165/+96
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove unused register read in program_pwlHarry Wentland1-3/+0
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Bunch more color indentation cleanupsHarry Wentland2-89/+69
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove extra arr_points elementHarry Wentland5-17/+3
arr_points[1] and [2] were duplicated. Remove the extra one. If we ever need more points we can add them but the current state of affairs is confusing. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.16Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: always call set output tfEric Yang1-1/+7
Temporary solution to fix gamma adjustment not working. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Fixed not set scaler bug.Yongqiang Sun1-1/+3
New scaler parameter assign to dpp is after early return, cause next flip scaler not program. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.15Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove unused OPP functions from interfaceEric Bernstein1-9/+0
Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix dcn10_hubbub_wm_read_stateKen Chalmers1-8/+18
The ALLOW_SR registers might not always be available. Signed-off-by: Ken Chalmers <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Add transfer function to dc_surface_updateSivapiriyanKumarasamy1-0/+2
Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: send display_count msg so SMU can enter S0i2Hersen Wu5-2/+23
SMU can future lower voltages in long idle case when all display is off. If all display output is turned off via DPMS, send display_count = 0 after all output are turned off. otherwise send display_count msg before turning on display to make sure SMU exit S0i2 state. before is not neccessary as we are out of S0i2 when driver execute code, but send message before anyways for correctness. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Modified front end initiail in init_hwYongqiang Sun5-17/+74
Optimized front end initial sequence, reset MPC module properly. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: add warning on long reg_waitDmytro Laktyushkin1-1/+6
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: remove unnecessary waits in dcn10Dmytro Laktyushkin3-32/+3
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix uninitialized variable warningDmytro Laktyushkin1-1/+1
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix regamma programmingDmytro Laktyushkin4-25/+6
When new coefficients match cached we would skip setting regamma mode Also, when doing a stream update we would program regamma for all pipes, even thos that are not yet powered on. This resulted in never setting regamma since we would cache before the pipe is powered. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Fix some more color indentationsHarry Wentland4-61/+36
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Bunch of indentation cleanups in color stuffHarry Wentland2-112/+68
Trying to align with kernel coding style and make it a bit more readable. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Refactor disable front end pipes.Yongqiang Sun5-138/+154
There are different code to disable front end, it is difficult to debug and adding new process. This refactor makes all disable front end call the same functions. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.14Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: renaming dpp function to follow naming conventionYue Hin Lau3-42/+43
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Yuehin Lau <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.13Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: call set csc_default if enable adjustment is falseYue Hin Lau4-6/+6
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Add OPP DPG blank functionEric Bernstein3-62/+51
Added a function to blank data using OPP DPG. Clean up code to prepare for pseudocode review with HW. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.12Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: cache pwl params and scl_data to avoid extra programmingDmytro Laktyushkin5-38/+30
This saves us about 5000 reg writes per full update. This translates to about 40000 writes over the course of single eDP bootup. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Don't use dc_link in link_encoderAndrew Jiang10-55/+57
dc_link is at a higher level than link_encoder, and we only want higher-level components to be able to access lower-level ones, not the other way around. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Both timing_sync and multisync need stream_count > 1Harry Wentland1-1/+2
Previous code threw a warning about misleading indentation Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Mikita Lipski <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Add tg_init interface.Yongqiang Sun4-1/+15
Clear OPTC underflow status when init_hw. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Enalbe blank data double buffer after mpc disconnected.Yongqiang Sun2-5/+16
Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: get remote dpcd caps for timing validationEric Yang4-3/+30
Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Only update dchub if hubbub is availableYue Hin Lau1-1/+2
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Call ipp_program_bias_and_scale only if availableEric Bernstein2-9/+10
Also move some register definitions to common DCN regs. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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