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2018-07-31drm/amdgpu: Replace ttm_bo_unref with ttm_bo_putThomas Zimmermann1-3/+2
The function ttm_bo_put releases a reference to a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. A call to ttm_bo_unref takes the address of the TTM BO object's pointer and clears the pointer's value to NULL. This is not necessary in most cases and sometimes even worked around by the calling code. A call to ttm_bo_put only releases the reference without clearing the pointer. The current behaviour of cleaning the pointer is kept in the calling code, but should be removed if not required in a later patch. v2: * set prefix to drm/amdgpu Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: Replace ttm_bo_reference with ttm_bo_getThomas Zimmermann1-1/+1
The function ttm_bo_get acquires a reference on a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. v2: * changed prefix to drm/amdgpu Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: create an empty bo_list if no handle is providedChristian König1-65/+46
Instead of having extra handling just create an empty bo_list when no handle is provided. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: allocate the bo_list array after the listChristian König2-74/+57
This avoids multiple allocations for the head and the array. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: add bo_list iteratorsChristian König3-39/+43
Add helpers to iterate over all entries in a bo_list. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: nuke amdgpu_bo_list_freeChristian König3-14/+2
The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: always recreate bo_listChristian König3-15/+12
The bo_list handle is allocated by OP_CREATE, so in OP_UPDATE here we just re-create the bo_list object and replace the handle. This way we don't need locking to protect the bo_list because it's always re-created when changed. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: move bo_list defines to amdgpu_bo_list.hChristian König2-39/+71
Further demangle amdgpu.h Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: add new amdgpu_vm_bo_trace_cs() function v2Christian König4-0/+37
This allows us to trace all VM ranges which should be valid inside a CS. v2: dump mappings without BO as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-and-tested-by: Andrey Grodzovsky <[email protected]> (v1) Reviewed-by: Huang Rui <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: return error if both BOs and bo_list handle is givenChristian König1-3/+6
Return -EINVAL when both the BOs as well as a list handle is provided in the IOCTL. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: fix total size calculationChristian König1-1/+1
long might only be 32bit in size and we can easily use more than 4GB here. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: add proper error handling to amdgpu_bo_list_getChristian König3-23/+20
Otherwise we silently don't use a BO list when the handle is invalid. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: fix a reversed conditionRex Zhu1-1/+1
This test was reversed so it would end up leading to vddnb value can't be read via hwmon on APU. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-07-31drm/amd/pp: Convert voltage unit in mV*4 to mV on CZ/STRex Zhu1-2/+3
the voltage showed in debugfs and hwmon should be in mV Reviewed-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-07-31drm/amd/pp: Delete unused temp variablesRex Zhu1-16/+6
Only delete the dead temp variables in Polaris. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amd/pp/Polaris12: Fix a chunk of registers missed to programRex Zhu1-0/+43
DIDTConfig_Polaris12[] table missed a big chunk of data. Pointed by aidan.fabius <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-07-30BackMerge v4.18-rc7 into drm-nextDave Airlie8-16/+49
rmk requested this for armada and I think we've had a few conflicts build up. Signed-off-by: Dave Airlie <[email protected]>
2018-07-27drm/amdgpu: clean up the superfluous space and align the comment text for ↵Huang Rui1-56/+51
amdgpu_ttm This patch cleans up spaces and align the text to refine the comment for amdgpu_ttm. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amdgpu: correct evict flag for bo moveJunwei Zhang1-2/+2
pass the evict flag instead of hard code Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amdgpu: implement harvesting support for UVD 7.2 (v3)Alex Deucher5-12/+89
Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd: Add missing fields in atom_integrated_system_info_v1_11Harry Wentland1-4/+11
This structure needs to align with structure in atomfirmware table. Update it. Signed-off-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd/display: DC 3.1.59Harry Wentland1-1/+1
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd/display: Prevent PSR from being enabled if initialization failsAnthony Koo2-16/+24
[Why] PSR_SET command is sent to the microcontroller in order to initialize parameters needed for PSR feature, such as telling the microcontroller which pipe is driving the PSR supported panel. When this command is skipped or fails, the microcontroller may program the wrong thing if driver tries to enable PSR. [How] If PSR_SET fails, do not set psr_enable flag to indicate the feature is not yet initialized. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd/display: Fix Vega10 black screen after mode changeJerry (Fangzhi) Zuo3-1/+16
[Why] The sequence is slightly changed when bring .set_bandwidth out from the end of programming backend to the end of programming surface. Vega10 doesn't like to get clocks updated if stream_count is zero in the current context (Atomic Reset). [How] Do not update clocks if no stream is showing up in the context. Fixes 1b2b130192 "dc: Remove 300Mhz minimum disp clk limit." Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd/display: flatten aux_engine and engineBhawanpreet Lakha12-186/+140
[Why] engine and aux_engine are unnecessary layers we want to remove this layer. [How] flatten engine and aux engine structs into one struct called aux_engine and remove all references to the engine struct. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amd/display: Retry link training againBhawanpreet Lakha3-4/+24
[Why] Some receivers seem to fail the first link training but are good on subsequent tries. We want to retry link training again. This fixes HTC vive pro not lighting up after being disabled. [How] Check if the link training passed without fall back if this is not the case then we retry link training. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amdgpu: patch the IBs for the second UVD instance v2Christian König1-0/+29
Patch the IBs for the second UVD instance so that userspace don't need to care about the instance they submit to. v2: use direct IB patching Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-and-tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amdgpu: add support for inplace IB patching for MM engines v2Christian König3-7/+17
We are going to need that for the second UVD instance on Vega20. v2: rename to patch_cs_in_place Signed-off-by: Christian König <[email protected]> Reviewed-and-tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25gpu: drm: amdgpu: Replace mdelay with msleep in cik_pcie_gen3_enable()Jia-Ju Bai1-1/+1
cik_pcie_gen3_enable() is only called by cik_common_hw_init(), which is never called in atomic context. cik_pcie_gen3_enable() calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep(). This is found by a static analysis tool named DCNS written by myself. Signed-off-by: Jia-Ju Bai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu/gmc9: clarify GPUVM fault error messageAlex Deucher1-1/+1
The address printed is the actual address, not the page. Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/scheduler: remove sched field from the entityNayan Deshmukh3-6/+6
The scheduler of the entity is decided by the run queue on which it is queued. This patch avoids us the effort required to maintain a sync between rq and sched field when we start shifting entites among different rqs. Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/scheduler: modify API to avoid redundancyNayan Deshmukh7-17/+12
entity has a scheduler field and we don't need the sched argument in any of the functions where entity is provided. Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: reduce the number of placements for a BOChristian König2-1/+4
Make struct amdgpu_bo a bit smaller. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: consistenly name amdgpu_bo_ functionsChristian König10-38/+39
Just rename functions, no functional change. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: expose only the first UVD instance for nowChristian König2-15/+7
Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: clean up coding style a bitChristian König1-10/+10
No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: DC 3.1.58Harry Wentland1-1/+1
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: separate dc_debug into dc_debug_options and dc_debug dataJun Lei6-15/+18
[why] confusing as to which part of debug is informational, and which part causes behavioral change Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: Decouple aux from i2cBhawanpreet Lakha14-14/+1549
[Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions directly Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: DPP CM ICSC AYCRCB8888 format supportvikrant mhaske2-1/+5
[why] Diags has POR to run the video workload using AYCRCB8888 through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be able to convert from internal RGB to YUV420 Signed-off-by: vikrant mhaske <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: On dce100, set clocks to 0 on suspendDavid Francis1-3/+16
[Why] When a dce100 asic was suspended, the clocks were not set to 0. Upon resume, the new clock was compared to the existing clock, they were found to be the same, and so the clock was not set. This resulted in a pernicious blackscreen. [How] In atomic commit, check to see if there are any active pipes. If no, set clocks to 0 Signed-off-by: David Francis <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: allow diags to skip initial link trainingTony Cheng4-3/+9
[why] diag specify what the full config and is only concerned about pass/fail at the end having inter-op code like verifiying we can actually train at reported link rate slows down diag test and add complexity we don't need [how] add dc_debug option to skip capability link trianing also remove hbr in function name as verify is not specific to hbr Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Ken Chalmers <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/display: Remove unnecessary warningMikita Lipski1-4/+0
[why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when the pipe is not active. [how] remove the assert Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amdgpu: move the amdgpu_fbdev_set_suspend() further upShirish S1-3/+3
This patch moves amdgpu_fbdev_set_suspend() to the beginning of suspend sequence. This is to ensure fbcon does not to write to the VRAM after GPU is powerd down. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amdgpu: Don't warn on destroying a pinned BOMichel Dänzer1-1/+1
The warning turned out to be not so useful, as BO destruction tends to be deferred to a workqueue. Also, we should be preventing any damage from this now, so not really important anymore to fix code doing this. Acked-by: Alex Deucher <[email protected]> Tested-by: Mike Lothian <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/powerplay: allow slow switch only if NBPState enabled v2Evan Quan2-2/+4
Otherwise there may be potential SMU performance issues. v2: fix commit description and coding style Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/powerplay: correct the argument for PPSMC_MSG_SetUclkFastSwitchEvan Quan2-2/+2
The argument was set wrongly. Fast/slow switch was asked when there is actually a slow/fast switch needed. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amd/powerplay: slow UCLK switch when multiple displays not in syncEvan Quan1-1/+2
Slow switch for UCLK when there is multiple displays and they are not in sync. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-24drm/amdgpu: Fix RLC safe mode test in gfx_v9_0_enter_rlc_safe_modeMichel Dänzer1-1/+1
We were testing the register offset, instead of the value stored in the register, therefore always timing out the loop. This reduces suspend time of the system in the bug report below by ~600 ms. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/107277 Tested-by: Paul Menzel <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-20drm/amdgpu: rework suspend and resume to deal with atomic changesAlex Deucher1-41/+45
Use the newly split ip suspend functions to do suspend displays first (to deal with atomic so that FBs can be unpinned before attempting to evict vram), then evict vram, then suspend the other IPs. Also move the non-DC pinning code to only be called in the non-DC cases since atomic should take care of DC. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065 Fixes: e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers Acked-by: Harry Wentland <[email protected]> Reviewed-and-tested-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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