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2023-11-07drm/amd/display: Disable OTG for mode timing switch on DCN35Ovidiu Bunea1-1/+2
[why] Doing a mode timing change causes a hang when OTG is not disabled. [how] Add link_enc null check in disable_otg_wa to cover this case. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Ovidiu Bunea <[email protected]> Signed-off-by: Hersen Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Revise Replay Desync Error IRQ handleDennis Chan2-0/+4
[Why] Current Desync IRQ handler will have some potential do not hit the desync error case. We change to check both desync error HPD and DPCD. Signed-off-by: Dennis Chan <[email protected]> Acked-by: Hersen Wu <[email protected]> Reviewed-by: Robin Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: [FW Promotion] Release 0.0.190.0Anthony Koo1-2/+2
- Increase number of bits for IPS boot option Reviewed-by: Aric Cyr <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: 3.2.258Aric Cyr1-1/+1
This version brings along following fixes: Update test link rate DPCD bit field to match spec Enable RCO options for dcn35 Add missing dml2 init value for dcn35 Enable DCN clock gating DCN35 Disable cm power optimization Allow 16 max_slices for DP2 DSC Fix OTG disable workaround logic Enable more IPS options Fix FRL assertion on boot Fix missing blendTF programming Update DP HPO MSA with colorimetry from test request Fix handling duplicate planes on one stream Acked-by: Hersen Wu <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Add missing dml2 init value for dcn35Roman Li1-0/+1
[Why] For lighting up, some dml2 params needs to be initialized. One of them escaped initial patch under: "drm/amd/display: Add DCN35 DML2 support" [How] Add missing initialization. Fixes: 115009d11ccf ("drm/amd/display: Add DCN35 DML2 support") Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Fix OTG disable workaround logicTaimur Hassan1-4/+7
[Why] DENTIST was hanging when performing DISPCLK update with OTG enabled, as OTG disable workaround was not executing. [How] Workaround was checking against current_state before running, but when called from optimize_bandwidth (safe_to_lower), we should be checking against context instead. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: amend HPD handler for ReplayChunTao Tso1-7/+4
[Why] For Replay, if we receive HPD, it doesn’t need to reboot the display. We don’t need to return anything exactly. [How] Return nothing just because we don’t need to reboot the display. Signed-off-by: ChunTao Tso <[email protected]> Acked-by: Hersen Wu <[email protected]> Reviewed-by: Jerry Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Introduce flag for disabling Replay desync recoveryDennis Chan2-1/+5
[why] It's useful to disable the recovery mechanism when debugging replay desync errors. Signed-off-by: Dennis Chan <[email protected]> Acked-by: Hersen Wu <[email protected]> Reviewed-by: Robin Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: DCN35 Disable cm power optimizationYihan Zhu1-1/+1
[WHY & HOW] Enabling SCE after boot up will cause color distortion. Reviewed-by: Ovidiu Bunea <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Yihan Zhu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Update DP HPO MSA with colorimetry from test requestGeorge Shen1-5/+4
[Why] Some DP link layer tests request a different colorimetry than the default one that is used. Currently, our test automation logic does not update the MSA with the test request value for DP HPO case. [How] Update HPO MSA colorimetry with test automation request value. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: George Shen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Update test link rate DPCD bit field to match specGeorge Shen2-2/+9
[Why] An SCR was made to the DP2.0 spec that updated the bit field definition for UHBR13.5 in the test link rate DPCD register. [How] Add new translation to match the SCR update. Keep old translation for backwards compatibility. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: George Shen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Allow 16 max_slices for DP2 DSCFangzhi Zuo3-1/+22
Enable 12 and 16 max_slices for DP2 DSC Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Enable more IPS optionsSung Joon Kim3-8/+12
[why] To help isolate static screen and video playback tests, we want to enable an IPS option to allow IPS only on D3 cycle. [how] Add DISABLE_DYNAMIC and DISABLE_ALL IPS disable flags for user control. Reviewed-by: Jun Lei <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Enable RCO options for dcn35Daniel Miess2-8/+9
[Why & How] Enable root clock optimization options for dcn35 for power savings Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Fix FRL assertion on bootSung Joon Kim1-4/+5
[why] Make sure to ungate the clocks on boot so programming sequence is done successfully. [how] Move the ungate logic after bios init. Reviewed-by: Xi (Alex) Liu <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: Fix missing blendTF programmingIlya Bakoulin1-0/+3
[Why] When MPO surface pixel format is not ARGB8888, fast update can miss programming blendTF. [How] Set the gamma_change update flag on blend_tf change. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: 3.2.257Aric Cyr1-1/+1
This version brings along following fixes: On boot disable domain22 force power on decouple dmcub execution to reduce lock granularity Enable fast update on blendTF change Fix blend LUT programming Program plane color setting correctly amend HPD handler for Replay Avoid NULL dereference of timing generator Acked-by: Hersen Wu <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: decouple dmcub execution to reduce lock granularityJinZe.Xu2-0/+82
[Why] On some systems dmub commands run at high IRQ, so long running commands will block other interrupts. [How] Decouple wait_for_idle from dmcub queue/execute/wait. Reviewed-by: Josip Pavic <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: JinZe.Xu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: [FW Promotion] Release 0.0.189.0Anthony Koo1-7/+5
- Minor formatting changes - Update defines to match the bit width of the field it is used for - Add new boot up bits to control HW sub block regions power down Reviewed-by: Aric Cyr <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd/display: On boot disable domain22 force power onDaniel Miess4-1/+15
[Why] HDCP2 enablement fails when domain22 is set to force power on [How] Disable force power on for domain22 on startup Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-07drm/amd: Disable XNACK on SRIOV environmentSurbhi Kakarya4-2/+21
The purpose of this patch is to disable XNACK or set XNACK OFF mode on SRIOV platform which doesn't support it. This will prevent user-space application to fail or result into unexpected behaviour whenever the application need to run test-case in XNACK ON mode. Signed-off-by: Surbhi Kakarya <[email protected]> Reviewed-by: Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/display: Enable fast update on blendTF changeIlya Bakoulin1-1/+0
[Why] Full update is not required on surface blend TF change. [How] Update full_update_required condition. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/display: Fix blend LUT programmingIlya Bakoulin2-0/+6
[Why] LUT write index does not get reset to zero when writing the LUT values for each separate RGB component, which results in wrong data for 2 of the 3 components. [How] Reset LUT write index to zero before writing each component's data. Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/display: Program plane color setting correctlySung Joon Kim4-2/+156
[why] There are some registers for plane color that are skipped programming on resume. Need to add those as part of the sequence. [how] Add new function hook for programming plane color control. Reviewed-by: Duncan Ma <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: Query and report boot statusHawking Zhang1-0/+2
Query boot status and report boot errors. A follow up change is needed to stop GPU initialization if boot fails. v2: only invoke the call for dGPU (Le/Lijo) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: Add psp v13 function to query boot statusHawking Zhang3-0/+96
Add psp v13 function to query boot status. v2: limit the use case to dGPU only (Lijo) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/swsmu: remove fw version check in sw_init.Li Ma1-13/+4
dorp fw version check and using max table size to init table. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Yang Wang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/swsmu: update smu v14_0_0 driver if and metrics tableLi Ma5-318/+97
Update driver if headers and metrics table in smu v14_0_0 after smu fw promotion. Drop the legacy metrics table and add warning of checking pmfw version. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: Add C2PMSG_109/126 reg field shift/masksHawking Zhang1-0/+28
Add MP0_C2PMSG_109/126 register field shift/masks that are used to identify boot status by driver. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: Optimize the asic type fix codeMa Jun1-9/+26
Use a new struct array to define the asic information which asic type needs to be fixed. Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: fix GRBM read timeout when do mes_self_testTim Huang1-0/+16
Use a proper MEID to make sure the CP_HQD_* and CP_GFX_HQD_* registers can be touched when initialize the compute and gfx mqd in mes_self_test. Otherwise, we expect no response from CP and an GRBM eventual timeout. Signed-off-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amdgpu: check recovery status of xgmi hive in ras_reset_error_countTao Zhou1-1/+10
Handle xgmi hive case. Suggested-by: Hawking Zhang <[email protected]> Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Stanley.Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/pm: only check sriov vf flag once when creating hwmon sysfsMa Jun1-13/+14
The current code checks sriov vf flag multiple times when creating hwmon sysfs. So fix it. Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: Attach eviction fence on allocFelix Kuehling1-31/+48
Instead of attaching the eviction fence when a KFD BO is first mapped, attach it when it is allocated or imported. This in preparation to allow KFD BOs to be mapped using the render node API. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdkfd: Improve amdgpu_vm_handle_movedFelix Kuehling4-8/+23
Let amdgpu_vm_handle_moved update all BO VA mappings of BOs reserved by the caller. This will be useful for handling extra BO VA mappings in KFD VMs that are managed through the render node API. v2: rebase against drm_exec changes (Alex) Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/display: Increase frame warning limit with KASAN or KCSAN in dml2Nathan Chancellor1-0/+4
When building ARCH=x86_64 allmodconfig with clang, which will typically have sanitizers enabled, there is a warning about a large stack frame. drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c:6265:13: error: stack frame size (2520) exceeds limit (2048) in 'dml_prefetch_check' [-Werror,-Wframe-larger-than] 6265 | static void dml_prefetch_check(struct display_mode_lib_st *mode_lib) | ^ 1 error generated. Notably, GCC 13.2.0 does not do too much of a better job, as it is right at the current limit of 2048 (and others have reported being over with older GCC versions): drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c: In function 'dml_prefetch_check': drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c:6705:1: error: the frame size of 2048 bytes is larger than 1800 bytes [-Werror=frame-larger-than=] 6705 | } | ^ In the past, these warnings have been avoided by reducing the number of parameters to various functions so that not as many arguments need to be passed on the stack. However, these patches take a good amount of effort to write despite being mechanical due to code structure and complexity and they are never carried forward to new generations of the code so that effort has to be expended every new hardware generation, which becomes harder to justify as time goes on. To avoid having a noticeable or lengthy breakage in all{mod,yes}config, which are easy testing targets that have -Werror enabled, increase the limit for configurations that have KASAN or KCSAN enabled by 50% so that cases of extremely poor code generation can still be caught while not breaking the majority of builds. CONFIG_KMSAN also causes high stack usage but the frame limit is already set to zero when it is enabled, which is accounted for by the check for CONFIG_FRAME_WARN=0 in the dml2 Makefile. Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/display: Avoid NULL dereference of timing generatorWayne Lin1-2/+2
[Why & How] Check whether assigned timing generator is NULL or not before accessing its funcs to prevent NULL dereference. Reviewed-by: Jun Lei <[email protected]> Acked-by: Hersen Wu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdkfd: Update cache info for GFX 9.4.3Mukul Joshi1-2/+16
Update cache info reporting based on compute and memory partitioning modes. Signed-off-by: Mukul Joshi <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdkfd: Populate cache info for GFX 9.4.3Mukul Joshi1-1/+65
GFX 9.4.3 uses a new version of the GC info table which contains the cache info. This patch adds a new function to populate the cache info from IP discovery for GFX 9.4.3. Signed-off-by: Mukul Joshi <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: don't put MQDs in VRAM on ARM | ARM64Alex Deucher1-0/+2
Issues were reported with commit 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM") on an ADLINK Ampere Altra Developer Platform (AVA developer platform). Various ARM systems seem to have problems related to PCIe and MMIO access. In this case, I'm not sure if this is specific to the ADLINK platform or ARM in general. Seems to be some coherency issue with VRAM. For now, just don't put MQDs in VRAM on ARM. Link: https://lists.freedesktop.org/archives/amd-gfx/2023-October/100453.html Fixes: 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM") Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amdgpu/smu13: drop compute workload workaroundAlex Deucher1-30/+2
This was fixed in PMFW before launch and is no longer required. Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.1.x
2023-11-03drm/amdgpu: add a retry for IP discovery initAlex Deucher1-2/+21
AMD dGPUs have integrated FW that runs as soon as the device gets power and initializes the board (determines the amount of memory, provides configuration details to the driver, etc.). For direct PCIe attached cards this happens as soon as power is applied and normally completes well before the OS has even started loading. However, with hotpluggable ports like USB4, the driver needs to wait for this to complete before initializing the device. This normally takes 60-100ms, but could take longer on some older boards periodically due to memory training. Retry for up to a second. In the non-hotplug case, there should be no change in behavior and this should complete on the first try. v2: adjust test criteria v3: adjust checks for the masks, only enable on removable devices v4: skip bif_fb_en check Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2925 Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amdgpu: ungate power gating when system suspendPerry Yuan1-0/+9
[Why] During suspend, if GFX DPM is enabled and GFXOFF feature is enabled the system may get hung. So, it is suggested to disable GFXOFF feature during suspend and enable it after resume. [How] Update the code to disable GFXOFF feature during suspend and enable it after resume. [ 311.396526] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 311.396530] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features! [ 311.396531] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62 Acked-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Perry Yuan <[email protected]> Signed-off-by: Kun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amd: Fix UBSAN array-index-out-of-bounds for Powerplay headersAlex Deucher2-14/+14
For pptable structs that use flexible array sizes, use flexible arrays. Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2039926 Reviewed-by: Mario Limonciello <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: don't use pci_is_thunderbolt_attached()Alex Deucher2-6/+7
It's only valid on Intel systems with the Intel VSEC. Use dev_is_removable() instead. This should do the right thing regardless of the platform. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2925 Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amdgpu: don't use ATRM for external devicesAlex Deucher1-0/+5
The ATRM ACPI method is for fetching the dGPU vbios rom image on laptops and all-in-one systems. It should not be used for external add in cards. If the dGPU is thunderbolt connected, don't try ATRM. v2: pci_is_thunderbolt_attached only works for Intel. Use pdev->external_facing instead. v3: dev_is_removable() seems to be what we want Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2925 Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-11-03drm/amdgpu/gfx10,11: use memcpy_to/fromio for MQDsAlex Deucher2-12/+12
Since they were moved to VRAM, we need to use the IO variants of memcpy. Fixes: 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM") Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu: use mode-2 reset for RAS poison consumptionTao Zhou1-1/+5
Switch from mode-1 reset to mode-2 for poison consumption. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Stanley.Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amdgpu doorbell range should be set when gpu recoveryLin.Cao1-0/+7
GFX doorbell range should be set after flr otherwise the gfx doorbell range will be overlap with MEC. v2: remove "amdgpu_sriov_vf" and "amdgpu_in_reset" check, and add grbm select for the case of 2 gfx rings. Signed-off-by: Lin.Cao <[email protected]> Acked-by: ZhenGuo Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-03drm/amd/pm: Return 0 as default min power limit for legacy asicsMa Jun1-0/+3
Return 0 as the default min power limit for the asics use powerplay. Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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