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2023-10-04drm/amd: Fix logic error in sienna_cichlid_update_pcie_parameters()Mario Limonciello1-18/+23
While aligning SMU11 with SMU13 implementation an assumption was made that `dpm_context->dpm_tables.pcie_table` was populated in dpm table initialization like in SMU13 but it isn't. So restore some of the original logic and instead just check for amdgpu_device_pcie_dynamic_switching_supported() to decide whether to hardcode values; erring on the side of performance. Cc: [email protected] # 6.1+ Reported-and-tested-by: Umio Yasuno <[email protected]> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1447#note_2101382 Fixes: e701156ccc6c ("drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13") Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: Fix a memory leakLuben Tuikov1-0/+1
Fix a memory leak in amdgpu_fru_get_product_info(). Cc: Alex Deucher <[email protected]> Reported-by: Yang Wang <[email protected]> Fixes: 0dbf2c562625 ("drm/amdgpu: Interpret IPMI data for product information (v2)") Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/pm: add unique_id for gc 11.0.3Kenneth Feng1-0/+1
add unique_id for gc 11.0.3 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/pm: Add GC v9.4.3 thermal limits to hwmonLijo Lazar1-7/+12
Publish max operating temperature of SOC and memory as temp*_emergency nodes in hwmon. temp*_crit will show the throttle temperature limits. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/pm: Add throttle limit for SMU v13.0.6Lijo Lazar1-7/+27
CTF limit represents the max operating temperature and thermal limit gives the limit at which throttling starts. Add support for both limits. SOC and HBM may have different limit values.*_emergency_max gives max operating temperature and *_crit_max value represents throttle limit. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: 3.2.254Aric Cyr1-1/+1
DC v3.2.254 * Stability fixes through null pointer checks, blackscreen fixes on certain configurations * Improvements for various functionality like Idle optimization, ILR, DSC, IPS * Fixes for ILR functionality * Trivial code cleanups =================================================================== Acked-by: Aurabindo Pillai <[email protected]> Cc: Daniel Wheeler <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Adjust code style for hw_sequencer.hAurabindo Pillai8-102/+23
[Why&How] * Rearrange some definitions for consistency * Drop legacy code Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Adjust code style for dmub_cmd.hAurabindo Pillai1-81/+81
[Why&How] Make some formatting changes and rearranging of definitions for consistency. Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Update DMUB cmd headerAurabindo Pillai1-3/+28
[Why&How] * Add hints about the bits used in the packed struct. * Update new bitfields for ABM and IPS Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Add a check for idle power optimizationSung Joon Kim3-1/+21
[why] Need a helper function to check idle power is allowed so that dc doesn't access any registers that are power-gated. [how] Implement helper function to check idle power optimization. Enable a hook to check if detection is allowed. Signed-off-by: Sung Joon Kim <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: use full update for clip size increase of large plane sourceWenjing Liu2-2/+15
[why] Clip size increase will increase viewport, which could cause us to switch to MPC combine. If we skip full update, we are not able to change to MPC combine in fast update. This will cause corruption showing on the video plane. [how] treat clip size increase of a surface larger than 5k as a full update. Reviewed-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Clean up code warningsAric Cyr1-1/+1
- Fix constness of string parameters - Fix zero-initialization of structs which cannot take a 0 literal as the first field, for example enums Reviewed-by: Dillon Varone <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Make driver backwards-compatible with non-IPS PMFWOvidiu Bunea3-12/+19
[why] Driver needs to be compatible with PM FW that doesn't support IPS [how] Toggle internal control flag Reviewed-by: Charlene Liu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Ovidiu Bunea <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: refactor ILR to make it workSherry Wang4-12/+31
[Why] Current ILR toggle is on/off as a part of panel config for new function, which breaks original ILR logic [How] Refactor ILR and take panel config into account Reviewed-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Sherry Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: remove duplicated edp relink to fastbootChiawen Huang1-59/+0
[Why&How] enable_accelerated_mode function is fully to check whether fastboot support or not. It is no longer to disable_vbios_mode_if_required. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Chiawen Huang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: apply edge-case DISPCLK WDIVIDER changes to master OTG ↵Samson Tam2-4/+4
pipes only [Why] The edge-case DISPCLK WDIVIDER changes call stream_enc functions. But with MPC pipes, downstream pipes have null stream_enc and will cause crash. [How] Only call stream_enc functions for pipes that are OTG master. Reviewed-by: Alvin Lee <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Samson Tam <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: enable dsc_clk even if dsc_pg disabledMuhammad Ahmed3-5/+8
[why] need to enable dsc_clk regardless dsc_pg Reviewed-by: Charlene Liu <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Muhammad Ahmed <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdkfd: Fix EXT_COHERENT memory allocation crashPhilip Yang1-11/+7
If there is no VRAM domain, bo_node is NULL and this causes crash. Refactor the change, and use the module parameter as higher privilege. Need another patch to support override PTE flag on APU. Fixes: 5f248462c69d ("drm/amdgpu: Add EXT_COHERENT memory allocation flags") Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: ratelimited override pte flags messagesPhilip Yang2-16/+10
Use ratelimited version of dev_dbg to avoid flooding dmesg log. No functional change. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Add Null check for DPP resourceGabe Teeger1-1/+1
[what and why] Check whether dpp resource pointer is null in advance and return early if so. Reviewed-by: Charlene Liu <[email protected]> Reviewed-by: Martin Leung <[email protected]> Signed-off-by: Gabe Teeger <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd: Drop all hand-built MIN and MAX macros in the amdgpu base driverMario Limonciello11-28/+22
Several files declare MIN() or MAX() macros that ignore the types of the values being compared. Drop these macros and switch to min() min_t(), and max() from `linux/minmax.h`. Suggested-by: Hamza Mahfooz <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd: Update `update_pcie_parameters` functions to use uint8_t argumentsMario Limonciello6-12/+12
The matching values for `pcie_gen_cap` and `pcie_width_cap` when fetched from powerplay tables are 1 byte, so narrow the arguments to match to ensure min() and max() comparisons without casts. Signed-off-by: Mario Limonciello <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Bail from dm_check_crtc_cursor if no relevant changeMichel Dänzer1-1/+32
If no plane was newly enabled or changed scaling, there can be no new scaling mismatch with the cursor plane. By not pulling non-cursor plane states into all atomic commits while the cursor plane is enabled, this avoids synchronizing all cursor plane changes to vertical blank, which caused the following IGT tests to fail: kms_cursor_legacy@cursor-vs-flip.* kms_cursor_legacy@flip-vs-cursor.* Fixes: 003048ddf44b ("drm/amd/display: Check all enabled planes in dm_check_crtc_cursor") Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04Revert "drm/amd/display: Enable Replay for static screen use cases"Ivan Lipski3-33/+1
This reverts commit 44e60b14d5a72f91fd0bdeae8da59ae37a3ca8e5. Since, it causes a regression in which eDP displays with PSR support, but no Replay support (Sink support <= 0x03), fail to enable PSR and consequently all IGT amd_psr tests fail. So, revert this until a more suitable fix can be found. Cc: [email protected] Acked-by: Leo Li <[email protected]> Signed-off-by: Ivan Lipski <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: cache gpuvm fault information for gmc7+Alex Deucher5-4/+19
Cache the current fault info in the vm struct. This can be queried by userspace later to help debug UMDs. Cc: [email protected] Reviewed-by: Christian König <[email protected]> Acked-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: add cached GPU fault structure to vm structAlex Deucher2-0/+49
When we get a GPU page fault, cache the fault for later analysis. Cc: [email protected] Reviewed-by: Christian König <[email protected]> Acked-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: Refactor dm_get_plane_scale helperMichel Dänzer1-9/+14
Cleanup, no functional change intended. Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: Use ttm_pages_limit to override vram reportingRajneesh Bhardwaj2-10/+16
On GFXIP9.4.3 APU, allow the memory reporting as per the ttm pages limit in NPS1 mode. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: Rework KFD memory max limitsRajneesh Bhardwaj1-2/+8
To allow bigger allocations specially on systems such as GFXIP 9.4.3 that use GTT memory for VRAM allocations, relax the limits to maximize ROCm allocations. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu/gmc11: set gart placement GC11Alex Deucher1-1/+1
Needed to avoid a hardware issue. v2: force high for all GC11 parts for consistency (Alex) v3: rebase Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu/gmc: add a way to force a particular placement for GARTAlex Deucher8-12/+31
We normally place GART based on the location of VRAM and the available address space around that, but provide an option to force a particular location for hardware that needs it. v2: Switch to passing the placement via parameter Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amd/display: fix problems in power_helperWayne Lin1-10/+10
[Why & How] Fix following problems: - In abm config, forget to initialize config.ambient_thresholds_lux. - Adjust the coding style problem - Restrict to call psr_su_set_dsc_slice_height() under edp only Reviewed-by: Robin Chen <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-04drm/amdgpu: correct gpu clock counter query on cyan skilfishLang Yu1-0/+21
Cayn skilfish uses SMUIO v11.0.8 offset. Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: <[email protected]> # v5.15+
2023-10-03drm/amd: Fix detection of _PR3 on the PCIe root portMario Limonciello1-1/+1
On some systems with Navi3x dGPU will attempt to use BACO for runtime PM but fails to resume properly. This is because on these systems the root port goes into D3cold which is incompatible with BACO. This happens because in this case dGPU is connected to a bridge between root port which causes BOCO detection logic to fail. Fix the intent of the logic by looking at root port, not the immediate upstream bridge for _PR3. Cc: [email protected] Suggested-by: Jun Ma <[email protected]> Tested-by: David Perry <[email protected]> Fixes: b10c1c5b3a4e ("drm/amdgpu: add check for ACPI power resources") Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd: Fix logic error in sienna_cichlid_update_pcie_parameters()Mario Limonciello1-18/+23
While aligning SMU11 with SMU13 implementation an assumption was made that `dpm_context->dpm_tables.pcie_table` was populated in dpm table initialization like in SMU13 but it isn't. So restore some of the original logic and instead just check for amdgpu_device_pcie_dynamic_switching_supported() to decide whether to hardcode values; erring on the side of performance. Cc: [email protected] # 6.1+ Reported-and-tested-by: Umio Yasuno <[email protected]> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1447#note_2101382 Fixes: e701156ccc6c ("drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13") Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Disable DWB frame capture to emulate oneshotAlex Hung3-1/+44
[WHY] drm_writeback requires to capture exact one frame in each writeback call. [HOW] frame_capture is disabled after each writeback is completed. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Add new set_fc_enable to struct dwbc_funcsAlex Hung3-0/+29
[WHAT] Add a function to enable and disable DWB's frame captures. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Setup for mmhubbub3_warmup_mcif with big bufferAlex Hung1-0/+6
[WHY] Hardware may require different warmup approaches - big buffer or individual buffers. [HOW] Setup warmup for big buffer when it is required by specific hardware. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Add writeback enable field (wb_enabled)Alex Hung2-0/+9
[WHAT] Add a new field to keep track whether a crtc is previously writeback-enabled. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Fix writeback_info is not removedAlex Hung1-3/+4
[WHY] Counter j was not updated to present the num of writeback_info when writeback pipes are removed. [HOW] update j (num of writeback info) under the correct condition. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Validate hw_points_num before using itAlex Hung1-0/+3
[WHAT] hw_points_num is 0 before ogam LUT is programmed; however, function "dwb3_program_ogam_pwl" assumes hw_points_num is always greater than 0, i.e. substracting it by 1 as an array index. [HOW] Check hw_points_num is not equal to 0 before using it. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Fix writeback_info never got updatedAlex Hung1-9/+4
[WHY] wb_enabled field is set to false before it is used, and the following code will never be executed. [HOW] Setting wb_enable to false after all removal work is completed. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Add writeback enable/disable in dcAlex Hung2-0/+37
[WHAT] The enable and disable writeback calls need to be included in the coressponding functions in dc_stream. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Hande writeback request from userspaceAlex Hung2-0/+162
[WHAT] Handle writeback requests and fill in the required information for DWB programming and setup. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Create fake sink and stream for writeback connectorHarry Wentland1-11/+22
[WHAT] Writeback connectors don't have a physical sink but DC still needs a sink to function. Create a fake sink and stream for writeback connectors Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Create amdgpu_dm_wb_connectorHarry Wentland4-8/+24
[WHY] We need to track the dc_link and it would get confusing if re-using the amdgpu_dm_connector. [HOW] Creating new amdgpu_dm_wb_connector. Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Use drm_connector in create_validate_stream_for_sinkHarry Wentland3-11/+19
[WHAT] Again, we need to use this function for writeback connectors, which are not of type amdgpu_dm_connector. Use the common base drm_connector instead. Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Address 'srf_updates' not described in ↵Srinivasan Shanmugam1-0/+1
'could_mpcc_tree_change_for_active_pipes' Fixes the following: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3928: warning: Function parameter or member 'srf_updates' not described in 'could_mpcc_tree_change_for_active_pipes' Cc: Harry Wentland <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/pm: delete dead codeDan Carpenter1-3/+0
"ret" was checked earlier inside the loop, so we know it is zero here. No need to check a second time. Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-03drm/amd/display: Use drm_connector in create_stream_for_sinkHarry Wentland1-28/+37
[WHAT] We need to use this function for both amdgpu_dm_connectors and drm_writeback_connectors. Modify it to operate on a drm_connector as a common base. Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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