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path: root/drivers/gpu/drm/amd
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2017-12-18drm/amdgpu: move atom functions from amdgpu_device.cAlex Deucher3-235/+236
and move them to amdgpu_atombios.c for consistency. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/amd/display: remove redundant null check of array 'data'Colin Ian King1-2/+1
The null check on aconnector->base.edid_blob_ptr->data is redundant since data is an array and can never be null. Remove it. Detected by CoverityScan, CID#1460369 ("Array compared against 0") Acked-by: Christian König <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/amdgpu: setup the shared and private apertures on gfx9Alex Deucher2-5/+20
Same as previous asics. This was not yet set for gfx9. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/amdgpu: Simplify amdgpu_lockup_timeout usage.Andrey Grodzovsky5-18/+11
With introduction of amdgpu_gpu_recovery we don't need any more to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/amdgpu: Add gpu_recovery parameterAndrey Grodzovsky8-7/+19
Add new parameter to control GPU recovery procedure. v2: Add auto logic where reset is disabled for bare metal and enabled for SR-IOV. Allow forced reset from debugfs. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/ttm: use an ttm operation ctx for ttm_bo_move_xxxRoger He1-4/+3
include ttm_bo_move_memcpy and ttm_bo_move_ttm Signed-off-by: Roger He <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-15drm/amdgpu: set allow_reserved_eviction and resv when bo allocation and csRoger He2-2/+12
enable eviction of other per VM BOs during allocation and allows reaping of deleted BOs during CS. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amdgpu: add enumerate for PDB/PTB v3Chunming Zhou2-19/+61
v2: remove SUBPTB member v3: remove last_level, use AMDGPU_VM_PTB directly instead. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: dal 3.1.25Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add TODO item to remove vector.cHarry Wentland1-0/+3
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Jordan Lazare <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Remove grph_object_id.c and move function to bios_parserHarry Wentland4-80/+47
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Jordan Lazare <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Remove redundant NULL check in DCE11 HWSSHarry Wentland1-2/+1
We already check this a couple lines earlier. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Jordan Lazare <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: use clamping rather than truncation for CM fp conversionsDmytro Laktyushkin3-13/+29
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: remove format_control from set_cursor_attributesYue Hin Lau1-7/+0
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Move wait for hpd ready out from edp power control.Yongqiang Sun7-39/+36
It may take over 200ms for wait hpd ready. To optimize the resume time, we can power on eDP in init_hw, wait for hpd ready when doing link training. also create separate eDP enable function to make sure eDP is powered up before doing and DPCD access, as HPD low will result in DPDC transaction failure. After optimization, setpowerstate 145ms -> 9.8ms, DPMS 387ms -> 18.9ms Signed-off-by: Yongqiang Sun <[email protected]> Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: fix missing pixel clock adjustment for dongleEric Yang1-1/+3
Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Reviewed-by: Andrew Jiang <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Move OPP mpc tree initialization to hw_initEric Bernstein3-7/+3
Move OPP initialization of mpc tree parameters to hw_init function. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: use REG_UPDATE for MPC muxEric Bernstein1-4/+4
Use REG_UPDATE instead of REG_SET for programming MPC out mux. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Correct fixed point calculation.Vitaly Prosyak1-1/+1
When convert from fixed31_32 to other fixed point format use math operation round instead of floor. Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Roman Li <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: OPTC cleanup/implementationYue Hin Lau4-174/+244
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Move unity TF type to predefined typesVitaly Prosyak3-5/+6
Also handle fixpoint y values for CM curves Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: dpp clean upYue Hin Lau2-7/+4
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: add assert to verify dcn_calc input validityDmytro Laktyushkin1-0/+11
This reverts commit 978482d0de86 Revert noisy assert messages Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add dppclk to dcn_bw_clocksDmytro Laktyushkin3-2/+3
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: set chroma taps to 1 when not scalingDmytro Laktyushkin2-5/+13
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Print DC_VER at DC initHarry Wentland1-2/+2
This has proven helpful on other OSes to give a quick state of the DC driver when a bug is reported. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: really fix time out in init sequenceTony Cheng1-2/+3
REG_UPDATE_2 return the reg value it write out through MMIO we need to do a REG_READ to confirm the value is written out Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add disclaimer to BW and DML code provided by HWHarry Wentland8-0/+73
This code can sometimes look troubling but we trust it as it comes from HW teams with a guarantee of correctness. Add a note to these files to explain this. v2: thing -> things Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Use macro for isnan checkHarry Wentland1-10/+8
In code provided by HW teams we do a NaN check on floats by comparing the number against itself. This confuses most people including myself. Macro it out to make it self-explanatory. Don't do a NaN check for int. v2: parantheses around 'number' expression Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: dal 3.1.24Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Set mpcc_disconnect_pending during MPC resetTony Cheng2-6/+16
This prevents an issue where the MPCC will not go to idle due to us not waiting for it to become idle during disable plane. Signed-off-by: Andrew Jiang <[email protected]> Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Refine update flags usage in update_dchubp_dppAndrew Jiang1-2/+3
- Only update DPP clock if it's a full update. - Program viewport on position change. This caused SLS regressions. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Cache cursor position.Yongqiang Sun2-0/+3
When programming cursor position after front end programmed, if position is already set previously, it doesn't make sense to program position with all 0. Cache position and use the parameter after front end programming. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Program cursor regs after context swapped.Yongqiang Sun1-14/+1
Cursor is abnormal after pipe_ctx is changed in context. Cause: cursor attributes is programmed right after front end programming, but it use old pipe_ctx to program which is not updated yet. Solution: Program cursor regs after context swapped. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: fix recout_skip calculation when rotating 180 or 270Yongqiang Sun1-34/+60
Fixed fliped landscape and fliped portrait hard hang. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add is_tiling_rotated flag to plane_stateEric Murphy-Zaremba1-0/+1
Signed-off-by: Eric Murphy-Zaremba <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: OPP DPG test patternEric Bernstein3-38/+43
Create opp_set_test_pattern function with similar interface and implementation as timing generator test pattern. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Build unity lut for shaperVitaly Prosyak6-274/+325
Add color module to diagnostic compilation Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Reset MPCC muxes during initEric Bernstein4-49/+35
During HW initialization, instead of assuming or detecting the existing MPCC mux configuration and then removing existing planes, reset all the MPCC muxes. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: CNVC pseudocode review follow upYue Hin Lau4-247/+244
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Disable plane right after disconnectedYongqiang Sun1-1/+2
HDR display playing video underflow is observed when switching to full screen due to program a lower watermark right after unlock otg. Instead of disable plane in next flip coming, if there is a plane disconnected, after otg unlock wait for mpcc idle and disable the plane, then program watermark. So there is enough warter mark to make sure current frame data pass through. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: dal 3.1.23Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Clean up os_types.h a bitHarry Wentland1-6/+2
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Fix access of wrong array element TF format conversionHarry Wentland1-2/+2
Found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:357 convert_to_custom_float() error: buffer overflow 'arr_points' 2 <= 2 drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:358 convert_to_custom_float() warn: buffer overflow 'arr_points' 2 <= 2 Regression: drm/amd/display: Remove extra arr_points element Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: dal 3.1.22Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add dcc_change surface update flagAndrew Jiang3-0/+7
Program the DCC registers when dcc_change is true. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Implement work around for optc underflow.Yongqiang Sun5-11/+62
Work around for a hw bug causing optc underflow if blank data double buffer disable and remove mpcc. Checking optc status after otg unlock, after wait mpcc idle check status again, if optc underflow just happens after wait mpcc idle, clear underflow status and enable blank data double buffer. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Change optimized_required logicAndrew Jiang1-0/+3
Rather than setting it every time there's a full update with surface count > 0, set it when we need to do plane_atomic_disconnect. Also make sure that we unset the flag in plane_atomic_disable, so that in the event we run through a sequence where we do disconnect followed by an immediate disable, we do not do unnecessarily request a passive flip to do the optimization. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Add optimized_required flagHarry Wentland2-0/+4
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Leo (Sunpeng) Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-14drm/amd/display: Use same wait mpcc idle function.Yongqiang Sun1-15/+12
There is already wait mpcc idle function. It is better to use the same function for all wait mpcc idle. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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