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2022-09-19drm/amd/display: Removing 2 physPavle Kotarac1-1/+3
[WHY] New dcn301 has 2 less phys Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Added new DCN301 Asic IdPavle Kotarac1-0/+1
[WHY] Adding new asic id for dcn301 Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: correct hostvm flagSherry Wang1-1/+1
[Why] Hostvm should be enabled/disabled accordding to the status of riommu_active, but hostvm always be disabled on DCN31 which causes underflow [How] Set correct hostvm flag on DCN31 Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Sherry Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Fix urgent latency override for DCN32/DCN321George Shen2-0/+2
[Why] The urgent latency override is useful when debugging issues relating to underflow. Current overridden variable is not correct and has no effect on DCN3.2 and DCN3.21 DML calculations. [How] For DCN3.2 and DCN3.21, override the correct urgent latency variable when bounding box override is present. Reviewed-by: Alvin Lee <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: George Shen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Uncomment SubVP pipe split assignment in driverAlvin Lee1-4/+0
[Why & How] Uncomment SubVP pipe split assignment in driver since FW headers are now promoted Reviewed-by: Martin Leung <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: skip audio setup when audio stream is enabledzhikzhai1-2/+4
[why] We have minimal pipe split transition method to avoid pipe allocation outage.However, this method will invoke audio setup which cause audio output stuck once pipe reallocate. [how] skip audio setup for pipelines which audio stream has been enabled Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: zhikzhai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: update gamut remap if plane has changedHugo Hu1-0/+1
[Why] The desktop plane and full-screen game plane may have different gamut remap coefficients, if switching between desktop and full-screen game without updating the gamut remap will cause incorrect color. [How] Update gamut remap if planes change. Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Hugo Hu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Refactor edp panel power sequencer(PPS) codesIan Chen6-22/+47
[Why & How] Move extra panel power sequencer settings into panel_cofig struct. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Ian Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: 3.2.203Aric Cyr1-1/+1
This version brings along following fixes: - Port DCN30 420 logic to DCN32 - Remove some unused definitions from DCN32/321 - Remove dp dig pixle rate div policy from dcn314 - Fix dcn315 reading of memory channel count and width - Fix SubVP and ODM relevant issues - Fix pipe split, MPO and ODM relevant issues - Support proper mst payload removal when link is not in mst mode in dc - Assume an LTTPR is always present on fixed_vs links - Rework recent update PHY state commit - Add debug option and logs Acked-by: Wayne Lin <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: [FW Promotion] Release 0.0.134.0Anthony Koo1-1/+2
- Handle pipe split case for SubVP: Pass in pipe split index for main and phantom pipes Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Fix SubVP way calculationAlvin Lee1-4/+7
[Why and How] - Don't skip bottom and next odm pipe when calculating num ways for subvp - Don't need to double cache lines for DCC (divide by 256) Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Disable SubVP on driver disableAlvin Lee2-1/+21
[Why and How] - For driver disable cases in current implementation, if P-State is unsupported or still supported by firmware, we force it supported by DCN. - SubVP now needs to be included in this case along with FPO. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: SubVP pipe split caseAlvin Lee3-11/+47
[Why and How] For SubVP pipe split case, pass in split index for main and phantom pipes to ensure that the P-State sequence will force P-State for all required pipes. Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Add debug option for allocating extra way for cursorAlvin Lee4-4/+9
[Why and How] - Add a debug option for allocating extra way for cursor - Remove usage of cache_cursor_addr since it's not gaurenteed to be populated - Include cursor size in MALL calculation if it exceeds the DCN cursor buffer size (and don't need extra way for cursor) Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: For ODM seamless transition require AUTO modeAlvin Lee3-1/+26
[Why & How] ODM seamless transitions require DIV_MODE_AUTO. However, DIV_MODE_AUTO only works when all the horizontal timing params are divisible by the ODM combine factor. Therefore, disable the ODM 2:1 policy when the horizontal timing params are not divisible by 2. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: support proper mst payload removal when link is not in mst ↵Wenjing Liu1-21/+49
mode in dc [why] When user unplugs mst hubs, the current code will forcefully zero entire mst payload allocation table structure stored in link before we deallocate actual payload when disabling stream. During the first disable stream sequence, we will use current mst payload allocation table to determine if link should be turned off. Because we zero out it before we are disabling stream, the payload allocation table stored in link doesn't represent the actual allocation status, so we turn off link at the first disable stream without waiting until all streams' payloads have been deallocated. This avoilates the designed deallocation sequence and caused system hang in DP2 scenario. [how] Remove payload during deallocation and never zero payload allocation structure without actually deallocating payload. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: rework recent update PHY state commitWenjing Liu28-177/+357
[why] Original change 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") was implemented by assuming stream's dpms off is equivalent to PHY power off. This assumption doesn't hold in following situations: 1. MST multiple stream scenario, where multiple streams are sharing the same PHY output. Toggle dpms off for one of the stream doesn't power off the PHY due to the presence of other streams. 2. enable stream failure scenario, where enable stream fails due to failure of link training. This will cause DPMS off is set to false, while the actual PHY power state is off in certain cases. Due to the problematic assumption, the logic will skip disabling other streams for MST multiple stream scenario, therefore PHY is not actually powered off. [how] 1. Rework this refactor by moving PHY state update down to hardware level, where we update PHY state in place when hardware sequencer is actually changing the power state of the PHY hardware. 2. Reimplement symclk on TX off workaround in place when we are actually calling transmitter control to power off PHY in dcn32. Note the workaround is added due to the lack of proper software interface to set TX while keeping symclk on. We plan to address this interface problem so we can set TX off only without affecting symclk in future dcn versions. Fixes: 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: add MES and MES-KIQ version in debugfsYifan Zhang1-0/+24
This patch addes MES and MES-KIQ version in debugfs. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Assume an LTTPR is always present on fixed_vs linksMichael Strauss1-0/+8
[WHY] LTTPRs can in very rare instsances fail to increment DPCD LTTPR count. This results in aux-i LTTPR requests to be sent to the wrong DPCD address, which causes link training failure. [HOW] Override internal repeater count if fixed_vs flag is set for a given link Reviewed-by: George Shen <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: fix dcn315 memory channel count and width readDmytro Laktyushkin2-3/+7
[Why & How] Correctly set ddr5 channel width to 8 bytes Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Fix double cursor on non-video RGB MPOLeo Li1-2/+10
[Why] DC makes use of layer_index (zpos) when picking the HW plane to enable HW cursor on. However, some compositors will not attach zpos information to each DRM plane. Consequently, in amdgpu, we default layer_index to 0 and do not update it. This causes said DC logic to enable HW cursor on all planes of the same layer_index, which manifests as a double cursor issue if one of the planes is scaled (and hence scaling the cursor as well). [How] Use DRM core helpers to calculate a normalized_zpos value for each drm_plane_state under each crtc, within the atomic state. This helper will first consider existing zpos values, and if identical/unset, fallback to plane ID ordering. The normalized_zpos is then passed to dc_plane_info during atomic check for later use by the cursor logic. Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Leo Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Only consider pixle rate div policy for DCN32+Alvin Lee3-17/+2
[Why and How] - Only consider pixel rate div policy for DCN32+ Reviewed-by: Martin Leung <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Various logs addedLeo Chen1-14/+40
[Why & How] Added logs for panel delays, spread_spectrum_percentage, and gpuclk_ss_percentage to facilitate debugging. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Leo Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: add debug option for dramclk_change_latency in apuCharlene Liu3-0/+27
[Why & How] Support dramclk change latency change via debug option and add some code isolation. Reviewed-by: Martin Leung <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Fix pipe split predictionAlvin Lee5-68/+194
[Why & How] - Pipe split prediction previously only took into account MPC split. We must also consider when ODM combine is required, and when we apply ODM combine by policy. - Also re-work DET allocation function as it wasn't properly splitting the DET per stream, per plane. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Remove some unused definitions from DCN32/321Aurabindo Pillai2-48/+0
[Why&How] After reg offset initialization was switched to runtime rather than compile time, some of the defintions are not needed anymore and can be removed. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Port DCN30 420 logic to DCN32Chris Park3-0/+29
[Why] 420 modes are limited by FMT buffer width of 4096 which requires multi-pipe support in form of ODM combine. If 420 modes have greater HActive than 4096, the DML logic should accomodate whether it should be rejected, or ODM combine 2:1 or 4:1 is triggered accordingly. [How] FMT Buffer limit of 4096 in DCN32. Force ODM combine depending on HActive and FMT Buffer limit. Reject modes if TMDS 420 and above 4096. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-1/+1
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2182 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-1/+1
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2181 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-13/+13
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2180 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-4/+4
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2179 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-8/+8
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2178 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: clean up some inconsistent indentingsYang Li1-2/+2
clean up some inconsistent indentings Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2177 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdkfd: Fix spelling mistake "detroyed" -> "destroyed"Colin Ian King1-1/+1
There is a spelling mistake in a pr_debug message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: add rlcv/rlcp version info to debugfsHawking Zhang1-0/+24
amdgpu_firmware_info debugfs will show rlcv/rlcp ucode version info Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: support print rlc v2_x ucode hdrHawking Zhang1-50/+118
add rlc v2_x support to print_rlc_hdr helper Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: save rlcv/rlcp ucode version in amdgpu_gfxHawking Zhang3-0/+13
cache rlcv/rlcvp ucode version info in amdgpu_gfx structure Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdkfd: Use the consolidated MQD manager functions for GFX11Shiwu Zhang1-73/+12
To remove duplication for GFX11 as well, use the common MQD manager functions defined in kfd_mqd_manager.c for all version of managers Signed-off-by: Shiwu Zhang <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: Update PTE flags with TF enabledMukul Joshi2-4/+6
This patch updates the PTE flags when translate further (TF) is enabled: - With translate_further enabled, invalid PTEs can be 0. Reading consecutive invalid PTEs as 0 is considered a fault. To prevent this, ensure invalid PTEs have at least 1 bit set. - The current invalid PTE flags settings to translate a retry fault into a no-retry fault, doesn't work with TF enabled. As a result, update invalid PTE flags settings which works for both TF enabled and disabled case. Fixes: 352e683b72e79d ("drm/amdgpu: Enable translate_further to extend UTCL2 reach") Reviewed-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amdgpu: SDMA update use unlocked iteratorPhilip Yang1-3/+6
SDMA update page table may be called from unlocked context, this generate below warning. Use unlocked iterator to handle this case. WARNING: CPU: 0 PID: 1475 at drivers/dma-buf/dma-resv.c:483 dma_resv_iter_next Call Trace: dma_resv_iter_first+0x43/0xa0 amdgpu_vm_sdma_update+0x69/0x2d0 [amdgpu] amdgpu_vm_ptes_update+0x29c/0x870 [amdgpu] amdgpu_vm_update_range+0x2f6/0x6c0 [amdgpu] svm_range_unmap_from_gpus+0x115/0x300 [amdgpu] svm_range_cpu_invalidate_pagetables+0x510/0x5e0 [amdgpu] __mmu_notifier_invalidate_range_start+0x1d3/0x230 unmap_vmas+0x140/0x150 unmap_region+0xa8/0x110 Signed-off-by: Philip Yang <[email protected]> Suggested-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1Yifan Zhang1-0/+3
there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd engine exists and map/unmap SDMA queues to the non-existent engine. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amdgpu: make sure to init common IP before gmcAlex Deucher1-3/+11
Move common IP init before GMC init so that HDP gets remapped before GMC init which uses it. This fixes the Unsupported Request error reported through AER during driver load. The error happens as a write happens to the remap offset before real remapping is done. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 The error was unnoticed before and got visible because of the commit referenced below. This doesn't fix anything in the commit below, rather fixes the issue in amdgpu exposed by the commit. The reference is only to associate this commit with below one so that both go together. Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-09-14drm/amdgpu: move nbio sdma_doorbell_range() into sdma code for vegaAlex Deucher2-22/+5
This mirrors what we do for other asics and this way we are sure the sdma doorbell range is properly initialized. There is a comment about the way doorbells on gfx9 work that requires that they are initialized for other IPs before GFX is initialized. However, the statement says that it applies to multimedia as well, but the VCN code currently initializes doorbells after GFX and there are no known issues there. In my testing at least I don't see any problems on SDMA. This is a prerequisite for fixing the Unsupported Request error reported through AER during driver load. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 The error was unnoticed before and got visible because of the commit referenced below. This doesn't fix anything in the commit below, rather fixes the issue in amdgpu exposed by the commit. The reference is only to associate this commit with below one so that both go together. Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-09-14drm/amdgpu: move nbio ih_doorbell_range() into ih code for vegaAlex Deucher3-3/+8
This mirrors what we do for other asics and this way we are sure the ih doorbell range is properly initialized. There is a comment about the way doorbells on gfx9 work that requires that they are initialized for other IPs before GFX is initialized. In this case IH is initialized before GFX, so there should be no issue. This is a prerequisite for fixing the Unsupported Request error reported through AER during driver load. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 The error was unnoticed before and got visible because of the commit referenced below. This doesn't fix anything in the commit below, rather fixes the issue in amdgpu exposed by the commit. The reference is only to associate this commit with below one so that both go together. Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-09-14drm/amd/display: fix boolconv.cocci warningYihao Han1-1/+1
./drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c:729:63-68: WARNING: conversion to bool not needed here Generated by: scripts/coccinelle/misc/boolconv.cocci Signed-off-by: Yihao Han <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amd/display: make optc32_phantom_crtc_post_enable, ↵Jiapeng Chong1-3/+3
optc32_setup_manual_trigger and optc32_set_drr static These three functions are not used outside the function dcn32_optc.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:159:6: warning: no previous prototype for function 'optc32_phantom_crtc_post_enable'. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:218:6: warning: no previous prototype for ‘optc32_set_drr’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:193:6: warning: no previous prototype for ‘optc32_setup_manual_trigger’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2140 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amd/display: make some functions staticJiapeng Chong1-4/+4
These functions are not used outside the file dcn32_dccg.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dccg.c:257:6: warning: no previous prototype for ‘dccg32_otg_drop_pixel’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dccg.c:248:6: warning: no previous prototype for ‘dccg32_otg_add_pixel’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dccg.c:211:6: warning: no previous prototype for ‘dccg32_set_dpstreamclk’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dccg.c:136:6: warning: no previous prototype for ‘dccg32_set_dtbclk_dto’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2142 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amd/display: make some functions staticJiapeng Chong1-4/+4
These functions are not used outside the file dcn32_hubbub.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hubbub.c:912:6: warning: no previous prototype for ‘hubbub32_force_wm_propagate_to_pipes’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hubbub.c:823:6: warning: no previous prototype for ‘hubbub32_wm_read_state’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hubbub.c:772:6: warning: no previous prototype for ‘hubbub32_init_watermarks’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hubbub.c:712:6: warning: no previous prototype for ‘hubbub32_force_usr_retraining_allow’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2141 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amd/display: make mmhubbub32_config_mcif_buf staticJiapeng Chong1-1/+1
This symbol is not used outside of dcn32_mmhubbub.c, so marks it static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mmhubbub.c:103:6: warning: no previous prototype for ‘mmhubbub32_config_mcif_buf’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2145 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-14drm/amd/display: make some functions staticJiapeng Chong1-3/+3
These functions are not used outside the file dcn32_hubbub.c, so the modification is defined as static. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_dccg.c:223:6: warning: no previous prototype for ‘dccg314_set_valid_pixel_rate’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_dccg.c:184:6: warning: no previous prototype for ‘dccg314_set_dpstreamclk’. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_dccg.c:140:6: warning: no previous prototype for ‘dccg314_set_dtbclk_dto’. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2144 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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