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2017-04-04drm/amdgpu: when resume failed, return error to avoid system hang.Rex Zhu1-2/+3
Continuing if the GPU fails to resume will end in pain. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-04-04drm/amdgpu: use a 64bit interval tree for VM management v2Christian König7-62/+71
This only makes a difference for 32-bit systems. The idea is to have a fixed virtual address space size with 4-level page tables and to minimize differences between 32 and 64-bit systems. v2: Update commit message. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-04-04drm/amdgpu: fix semicolon.cocci warningskbuild test robot1-1/+1
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:133:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Acked-by: Huang Rui <[email protected]> CC: Huang Rui <[email protected]> Signed-off-by: Fengguang Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-04-04drm/amdgpu/powerplay: fix locking typoAlex Deucher1-1/+1
Fixes: 2a5071056e6a601e ("drm/amd/powerplay: add global PowerPlay mutex.") Reported-by: Julia Lawall <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-04-03Merge tag 'drm-misc-next-2017-03-31' of ↵Dave Airlie4-8/+16
git://anongit.freedesktop.org/git/drm-misc into drm-next drm-misc for 4.12: Core: - Removed some fb subsampling dimension checks from core (Ville) - Some MST slot cleanup (Dhinakaran) - Extracted drm_debugfs.h & drm_ioctl.h from drmP.h (Daniel) - Added drm_atomic_helper_shutdown() to compliment suspend/resume counterparts (Daniel) - Pipe context through legacy modeset to remove legacy_backoff nasties (Daniel) - Cleanups around vblank as well as allowing lockless counter reads (Chris W.) - VGA Switcheroo added to MAINTAINERS with Lukas Wunner as reviewer (Lukas) Drivers: - Enhancements to rockchip driver probe (Jeffy) and dsi (Chris Z.) - Thunderbolt external GPU awareness added (Lukas) * tag 'drm-misc-next-2017-03-31' of git://anongit.freedesktop.org/git/drm-misc: (63 commits) apple-gmux: Don't switch external DP port on 2011+ MacBook Pros drm/nouveau: Don't register Thunderbolt eGPU with vga_switcheroo drm/amdgpu: Don't register Thunderbolt eGPU with vga_switcheroo drm/radeon: Don't register Thunderbolt eGPU with vga_switcheroo PCI: Recognize Thunderbolt devices MAINTAINERS: Add Lukas Wunner as reviewer for vga_switcheroo drm: Fix locking gotcha in page_flip ioctl drm: Clarify the role of plane_state argument to drm_simple update(). drm: Clear e after kfree in drm_mode_page_flip_ioctl drm: Convert cmpxchg(bool) back to a two step operation drm/bridge: ti-tfp410: support hpd via gpio drm: use .hword to represent 16-bit numbers Revert unrelated part of "drm: simplify the locking in the GETCRTC ioctl" drm: Fixup failure paths in drm_atomic_helper_set_config drm: Peek at the current counter/timestamp for vblank queries drm: Refactor vblank sequence number comparison drm: vblank cannot be enabled if dev->irq_enabled is false drm: Mark up accesses of vblank->enabled outside of its spinlock drm: Make the decision to keep vblank irq enabled earlier drm/atomic-helper: Remove the backoff hack from set_config ...
2017-03-30drm/amdgpu: Don't register Thunderbolt eGPU with vga_switcherooLukas Wunner2-3/+7
An external Thunderbolt GPU can neither drive the laptop's panel nor be powered off by the platform, so there's no point in registering it with vga_switcheroo. In fact, when the external GPU is runtime suspended, vga_switcheroo will cut power to the internal discrete GPU, resulting in a lockup. Moreover AMD's Windows driver special-cases Thunderbolt as well. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Lukas Wunner <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/701a8e89ce8ac39734736ab779558b6a4042a19e.1489145162.git.lukas@wunner.de
2017-03-30drm/amdgpu: Fix 32bit x86 compilation warningAlex Xie3-3/+3
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:187:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:173:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/vega10_ih.c:106:3: warning: right shift count >= width of type [enabled by default] v2: Add a space between "&" and "0xff" Reported by: [email protected] Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-30drm/amdgpu: just disallow reading untouched registersChristian König1-6/+0
Not sure what the original intention was here, but returning a random piece of kernel memory to userspace because we didn't set the value at all is clearly not a good idea. This patch disallows reading the register and returns a proper error code instead. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-30drm/amdgpu: remove duplicate allowed reg CP_CPF_BUSY_STATChristian König1-1/+0
Remove duplicate mmCP_CPF_BUSY_STAT from the allowed registers. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: enable psp block for SRIOVXiangliang Yu1-3/+2
SRIOV can support for loading ucode with PSP block, enable it. Signed-off-by: Xiangliang Yu <[email protected]> Acked-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: bypass pp block for vfXiangliang Yu1-2/+3
Disable pp block if device is vf. Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/psp: add check sOS signXiangliang Yu1-2/+16
Confirm if sys driver and sOS are already been loaded through sOS sign register, skip loading sys driver and sOS if finding the sign. Signed-off-by: Xiangliang Yu <[email protected]> Acked-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: Correct ring wptr address in debugfs (v2)Tom St Denis1-2/+2
On gfx9 hardware the value is not wrapped and is a 64-bit value. So we reduce it modulo the ring size. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> (v2) use buf_mask instead of computing on the fly Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Fix multi-level page table bugs for large BOs v3Felix Kuehling1-6/+18
Fix the start/end address calculation for address ranges that span multiple page directories in amdgpu_vm_alloc_levels. Add error messages if page tables aren't found. Otherwise the page table update would just fail silently. v2: * Change WARN_ON to WARN_ON_ONCE * Move masking of high address bits to caller * Add range-check for "from" and "to" v3: * Replace WARN_ON_ONCE in get_pt with pr_err in caller Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Fix Vega10 VM initializationFelix Kuehling2-13/+10
adev->family is not initialized yet when amdgpu_get_block_size is called. Use adev->asic_type instead. Minimum VM size is 512GB, not 256GB, for a single page table entry in the root page table. gmc_v9_0_vm_init is called after adev->vm_manager.max_pfn is initialized. Move the minimum VM-size enforcement ahead of max_pfn initializtion. Cast to 64-bit before the left-shift. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Make max_pfn 64-bitFelix Kuehling4-7/+9
With 4-level page tables the maximum VM size is 256TB. That's 64G pages, which can't be represented in 32-bit. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: drop GB_GPU_ID from the golden settingsChristian König1-1/+0
That register is marked deprecated, reading it results in a bus error. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3)Junwei Zhang5-10/+10
v2: fix for all sdma engines v3: squash in fix for SI/CI Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8Jim Qu1-3/+0
1. security firmware loading has moved to sw init, so this code is useless. 2. it seems that driver could not call request_firmware on kernel 2.6, when S3 resume. for request firmware depends on userspace, at this time, userspace is freeze. Signed-off-by: Jim Qu <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: fix performance drop when VRAM pressureRoger.He1-3/+1
When VRAM pressue and trigger huge evictions there is performance drop, this patch fix it. Signed-off-by: Roger.He <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Couple small warning fixesHarry Wentland2-2/+3
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Clean up GFX 9 VM fault messagesFelix Kuehling1-13/+14
Clean up the VM fault message format and use rate-limiting similar to other ASICs. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Register UTCL2 as a source of VM faultsFelix Kuehling1-0/+2
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: drop support for reading some registersAlex Deucher1-3/+0
The RB harvest registers are not necessary, the driver already exposes this info via the info ioctl. GB_BACKEND_MAP has been deprecated since SI and is not relevant to the RB mapping. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: return cached values for some registers (v2)Alex Deucher1-8/+22
Required for SR-IOV and saves MMIO transactions. v2: drop cached RB harvest registers Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/gfx9: use hweight for calculating num_rbsAlex Deucher1-5/+2
Match what we do for other asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: refine the logic in amdgpu_need_post()Alex Deucher1-1/+1
We check the mem config register to make sure it's been programmed by the vbios to determine if we need to post so we check for a non-0 value. However, when the asic comes out of reset, we may see all ones here, so check for that too. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Add interrupt entries for CRTC_VERTICAL_INTERRUPT0.Andrey Grodzovsky1-0/+99
This used by DAL ISR logic for VBLANK handling. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:changes in gfx DMAframe scheme (v2)Monk Liu5-57/+88
1) Adapt to vulkan: Now use double SWITCH BUFFER to replace the 128 nops w/a, because when vulkan introduced, umd can insert 7 ~ 16 IBs per submit which makes 256 DW size cannot hold the whole DMAframe (if we still insert those 128 nops), CP team suggests use double SWITCH_BUFFERs, instead of tricky 128 NOPs w/a. 2) To fix the CE VM fault issue when MCBP introduced: Need one more COND_EXEC wrapping IB part (original one us for VM switch part). this change can fix vm fault issue caused by below scenario without this change: >CE passed original COND_EXEC (no MCBP issued this moment), proceed as normal. >DE catch up to this COND_EXEC, but this time MCBP issued, thus DE treats all following packages as NOP. The following VM switch packages now looks just as NOP to DE, so DE dosen't do VM flush at all. >Now CE proceeds to the first IBc, and triggers VM fault, because DE didn't do VM flush for this DMAframe. 3) change estimated alloc size for gfx9. with new DMAframe scheme, we need modify emit_frame_size for gfx9 4) No need to insert 128 nops after gfx8 vm flush anymore because there was double SWITCH_BUFFER append to vm flush, and for gfx7 we already use double SWITCH_BUFFER following after vm_flush so no change needed for it. 5) Change emit_frame_size for gfx8 v2: squash in BUG removal from Monk Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix missing programing critical registersMonk Liu3-1/+21
those MC_VM registers won't be programed by VBIOS in VF so driver is responsible to programe them. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix ring_write_multipleMonk Liu1-2/+2
ring_write_multiple should use buf_mask instead of ptr_mask Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix gmc_v9 vm fault process for SRIOVMonk Liu1-8/+16
for SRIOV we cannot use access register when in IRQ routine with regular KIQ method Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:no cg for soc15 of SRIOVMonk Liu1-0/+3
no CG for SRIOV on SOC15 Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:two fixings for sdma v4 for SRIOVMonk Liu1-0/+6
no hw_fini for SRIOV, otherwise other VF will be affected no CG for SRIOV Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:change sequence of SDMA v4 initMonk Liu1-10/+27
must set minor_update.enable before write smaller value to wptr/doorbell, so for sriov we need set that register bit in hw_init period. this could fix the SDMA ring test fail after guest reboot Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix ring init sequenceMonk Liu2-4/+4
ring->buf_mask need be set prior to ring_clear_ring invoke and fix ring_clear_ring as well which should use buf_mask instead of ptr_mask Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:virt_init_setting invoke is missed!Monk Liu1-0/+4
this must be invoked during early init Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:enable MCBP for SR-IOV (v2)Monk Liu2-0/+4
Apply the new IB during IB emit for SRIOV with MCBP v2: agd: use define instead of magic number Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:enable mcbp for gfx9(v2)Monk Liu2-0/+4
set bit 21 of IB.control filed to actually enable MCBP for SRIOV v2: add flag for preemption enable bit for soc15 and use this flag instead of hardcode. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:implement cond_exec for gfx8Monk Liu1-0/+30
when MCBP enabled for gfx8, the cond_exec must also be implemented, otherwise there will be odds to meet cross engine (ce and me) deadlock when world switch happens. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix the check in cs_ib_fill for SRIOVMonk Liu1-9/+10
1,the check is only appliable for SRIOV GFX engine. 2,use chunk_ib instead of ib. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:protect cs submitMonk Liu1-1/+12
to prevent submit two or more IBs with PREEMPT flags. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix cs_ib_fillMonk Liu1-1/+1
should use chunk_ib instead of ib, otherwise the logic is incorrect. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: clear freed mappings immediately when BO may be freedNicolai Hähnle1-0/+12
Also, add the fence of the clear operations to the BO to ensure that the underlying memory can only be re-used after all PTEs pointing to it have been cleared. This avoids the following sequence of events that could be triggered by user space: 1. Submit a CS that accesses some BO _without_ adding that BO to the buffer list. 2. Free that BO. 3. Some other task re-uses the memory underlying the BO. 4. The CS is submitted to the hardware and accesses memory that is now already in use by somebody else. By clearing the page tables immediately in step 2, a GPU VM fault will be triggered in step 4 instead of wild memory accesses. v2: use amdgpu_bo_fence directly Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: enable four level VMPT for gmc9Chunming Zhou1-1/+1
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: set page table depth by num_levelChunming Zhou2-2/+3
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: adapt vm size for multi vmptChunming Zhou1-0/+6
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: limit block size to one pageChunming Zhou1-0/+8
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: abstract block size to one functionChunming Zhou1-27/+32
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add alloc/free for multi level PDs V2Christian König1-69/+106
Allocate and free page directories on demand. V2: a. clear entries allocation b. fix entries index calculation c. need alloc sub level even parent bo was allocated Signed-off-by: Christian König <[email protected]> (v1) Reviewed-by: Alex Deucher <[email protected]> (v1) Signed-off-by: Chunming Zhou <[email protected]> (v2) Acked-by: Alex Deucher <[email protected]> (v2) Signed-off-by: Alex Deucher <[email protected]>
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