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2018-07-16drm/amdgpu: remove ring parameter from amdgpu_job_submitChristian König9-21/+20
We know the ring through the entity anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu: remove fence context from the jobChristian König4-4/+1
Can be obtained directly from the fence as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu: cleanup job headerChristian König2-45/+75
Move job related defines, structure and function declarations to amdgpu_job.h Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Fix some checkpatch.pl errors and warnings in dc_link_dp.cHarry Wentland1-17/+18
[Why] Any Linux kernel code should pass checkpatch.pl with no errors and little, if any, warning. [How] Fixing some spacing errors and warnings. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Null ptr check for set_sdr_white_levelKrunoslav Kovac1-1/+2
[Why&How] Cursor boosting can only be done on DCN+ Check for nullptr since DCE doesn't implement it. Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Sivapiriyan Kumarasamy <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: dal 3.1.56Harry Wentland1-1/+1
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Steven Chiu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: add new dc debug structure to track debug dataJun Lei2-0/+8
[why] Some DTN tests still failing @ 2% Need to reduce. [how] add instrumentation code to driver so we can get more information from failed runs. Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Move address tracking out of HUBPTony Cheng3-9/+15
[Why] We sometime require remapping of FB address space to UMA [How] Move address tracking up a layer before we apply address translation Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Add hook for MST root branch infoNikola Cornij3-0/+17
This allows DM to do any necessary updates before MST discovery starts. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: add HDR visual confirmGloria Li6-11/+63
[Why] Testing team wants a way to tell if HDR is on or not [How] Program the overscan color to visually indicate the HDR state of the top-most plane Signed-off-by: Gloria Li <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Refactor SDR cursor boosting in HDR modeKrunoslav Kovac10-26/+70
[Why] Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP Previous commit was implementing it in HUBP functions, and also breaking diags tests. [How] 1. Undo original commit as well as Eric's diags test fix, almost completely 2. Move programming to DPP and call via new dc_stream function 3. Also removing cur_rom_en from dpp_cursor_attributes and programming as part of normal cursor attributes as it depends on cursor color format Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amd/display: Add headers for hardcoded 1d luts.Vitaly Prosyak1-0/+51
Hard-coded luts are needed since complex algorithms are used for color and tone mapping. Add the headers for future use. Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu: Allow to create BO lists in CS ioctl v3Andrey Grodzovsky4-40/+107
This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16Revert "drm/amd/powerplay: fix performance drop on Vega10"Eric Huang1-5/+0
This reverts commit b87079ec7b4d38efee015367315958ce5495ba93. SMU FW team ask to remove this version specific code. Signed-off-by: Eric Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu/pp: switch smu callback type for get_argument()Alex Deucher7-8/+8
return a uint32_t rather than an int to properly reflect what the function does. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu/pp: split out common smumgr smu9 codeAlex Deucher8-354/+242
Split out the shared smumgr code for vega10 and 12 so we don't have duplicate code for both. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-16drm/amdgpu/pp: remove dead vega12 codeAlex Deucher1-29/+0
Commented out. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu/pp/smu7: cache smu firmware tocAlex Deucher2-39/+54
Rather than calculating it everytime we rebuild the toc buffer, calculate it once initially and then just copy the cached results to the vram buffer. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu/pp/smu7: remove local mc_addr variableAlex Deucher1-6/+2
use the structure member directly. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu/pp/smu7: drop unused values in smu data structureAlex Deucher2-4/+1
use kaddr directly rather than secondary variable. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu/pp/smu7: use a local variable for toc indexingAlex Deucher1-11/+12
Rather than using the index variable stored in vram. If the device fails to come back online after a resume cycle, reads from vram will return all 1s which will cause a segfault. Based on a patch from Thomas Martitz <[email protected]>. This avoids the segfault, but we still need to sort out why the GPU does not come back online after a resume. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105760 Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu/vi: fix mixed up state in smu clockgating setupAlex Deucher1-6/+6
Use the PP_STATE_SUPPORT_* rather than AMD_CG_SUPPORT_* when communicating with the SMU. Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: properly turn autocal offDmytro Laktyushkin1-6/+6
[why] Currently we do not turn off autocal when scaling is in bypass. In case vbios enalbes auto scale and our first mode set is a non-scaled mode we have autocal on causing screen corruption. [how] moves turning autocal off to be first thing done during scaler setup Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Initialize data structure for DalMpVisualConfirm.Hugo Hu1-1/+1
[Why] Prevent unexpected color shows if DalMpVisualConfirm enable. [How] Zero out color configuration data for DalMpVisualConfirm when initiating. Signed-off-by: Hugo Hu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: dal 3.1.55Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: update dml to match DV dmlDmytro Laktyushkin1-0/+1
DV updated their dml with an option to use max vstartup, this updates dc dml with the same option Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add max scl ratio to soc bounding boxDmytro Laktyushkin1-0/+2
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Fix new stream count check in dc_add_stream_to_ctxKen Chalmers1-2/+2
[Why] The previous code could allow through attempts to enable more streams than there are timing generators, in designs where the number of pipes is greater than the number of timing generators. [How] Compare the new stream count to the resource pool's timing generator count, instead of its pipe count. Also correct a typo in the error message. Signed-off-by: Ken Chalmers <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: dp debugfs allow link rate lane count greater than dp rx ↵Hersen Wu1-2/+1
reported caps [Why] when hw team does phy parameters tuning, there is need to force dp link rate or lane count grater than the values from dp receiver to check dp tx. current debufs limit link rate, lane count no more than rx caps. [How] remove force settings less than rx caps check v2: Fix typo in title Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Expose couple OPTC functions through headerDavid Francis1-0/+11
Signed-off-by: David Francis <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Add CRC support for DCNDavid Francis2-3/+114
[Why] Regamma/CTM tests require CRC support [How] The CRC registers that were used in DCE exist under different names in DCN. The code was copied from DCE (in dc/dce110/dce110_timing_generator.c) into DCN, and changed to use the DCN register access helper functions. Signed-off-by: David Francis <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Return out_link_loss from interrupt handlerFatemeh Darbehani3-3/+9
Signed-off-by: Fatemeh Darbehani <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Add NULL check for local sink in edp_power_controlYue Hin Lau1-2/+4
[WHY] PNP cause bsod regression fix [HOW] Add NULL check Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Hugo Hu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add pp to dc powerlevel enum translatorMikita Lipski1-1/+28
[why] Add a switch statement to translate pp's powerlevel enum to dc powerlevel statement enum [how] Add a translator function Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Sun peng Li <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add DalEnableHDMI20 key supportCharlene Liu3-0/+13
[why] "DalEnableHDMI20" set to 0, disallow HDMI YCbCr420 and pixel clock > 340Mhz Default is enabled. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: introduce concept of send_reset_length for i2c enginesCharlene Liu5-12/+43
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Read AUX channel even if only status byte is returnedLeo (Sunpeng) Li1-1/+1
[Why] get_channel_status() can return 0 in returned_bytes, and report a successful operation result. This is because it prunes the first status byte out. This was preventing read_channel_reply() from being called (due to the faulty condition), and consequently preventing the AUX reply status from being set. [How] Fix the conditional so that it accounts for when get_channel_status() returns 0 bytes read. [Fixes] Fixes possible edid read failures during S3 resume, where we are now relying on DRM's DP AUX handling. This was an regression introduced by: Author: Harry Wentland <[email protected]> drm/amd/display: Return aux replies directly to DRM Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Right shift AUX reply value sooner than laterLeo (Sunpeng) Li1-2/+2
[Why] There is no point in keeping the AUX reply value in the raw format as returned from reading the AUX_SW_DATA register. [How] Shift it within read_channel_reply(), where the register is read, before returning it. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Expose bunch of functions from dcn10_hw_sequencerEric Bernstein3-25/+49
v2: Remove spurious newline changes Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Add YCbCr420 only support for HDMI 4K@60Jerry (Fangzhi) Zuo1-1/+4
[Why] Some monitors mark 4K@60 capable HDMI port only have 300MHz TMDS maximum, but the edid includes 4K@60 mode in cea extension block. [How] To enable 4K@60, need to limit BW by allowing YCbCr420 ONLY mode. Add YCbCr420 only support for monitors that do not fully support HDMI2.0, e.g., ASUS PA328. The YCbCr420 only support applies to DCN, DCE112 or higher. Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: dal 3.1.54Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Linux hook test pattern through debufsHersen Wu1-15/+55
bug fix: phy test PLTAT is special 80bit test pattern. The 80bit data should be hard coded within driver so that user does not need input the deata. previous driver does not have hard coded 80 bits pattern data for PLTPAT. Other than this PLTPAT, user has to input 80 bits pattern data. In case user input less than 10 bytes data, un-input data byte will be filled by 0x00. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: expose dcn10_aux_initialize in headerYongqiang Sun2-8/+4
Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add dcn cursor hotsport rotation and mirror supportDmytro Laktyushkin4-5/+22
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: set default GPIO_ID_HPDCharlene Liu1-0/+1
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add missing mask for dcnCharlene Liu1-1/+2
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Reviewed-by: Duke Du <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Fix compile error on older GCC versionsLeo (Sunpeng) Li1-2/+2
GCC 4.9 reports a 'missing braces around initializer' error. This is a bug, documented here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119 Fix it by adding another brace. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Mikita Lipski <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Linux set/read lane settings through debugfsHersen Wu1-59/+207
function: get current DP PHY settings: voltage swing, pre-emphasis, post-cursor2 (defined by VESA DP specification) valid values: voltage swing: 0,1,2,3 pre-emphasis : 0,1,2,3 post cursor2 : 0,1,2,3 debugfs file phy_setings is located at /sys/kernel/debug/dri/0/DP-x there will be directories, like DP-1, DP-2,DP-3, etc. for DP display --- to figure out which DP-x is the display for DP to be check, cd DP-x ls -ll There should be debugfs file, like link_settings, phy_settings. cat link_settings from lane_count, link_rate to figure which DP-x is for display to be worked on --- to get current DP PHY settings, cat phy_settings --- to change DP PHY settings, echo <voltage_swing> <pre-emphasis> <post_cursor2> > phy_settings for examle, to change voltage swing to 2, pre-emphasis to 3, post_cursor2 to 0, echo 2 3 0 > phy_settings --- to check if change be applied, get current phy settings by cat phy_settings --- in case invalid values are set by user, like echo 1 4 0 > phy_settings HW will NOT be programmed by these settings. cat phy_settings will show the previous valid settings. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Patch for extend time to panel poweron.Hugo Hu2-3/+7
[WHY] In eDP spec, the min duration in LCDVDD on-off-on sequence should be 500ms, some BOE panels need 700ms to pass. [HOW] Add patch to wait more time when eDP power on. Signed-off-by: Hugo Hu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: add additional info for cursor position programmingDmytro Laktyushkin5-12/+15
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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