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2018-07-05drm/amd/display: Convert 10kHz clks from PPLib into kHzMikita Lipski1-6/+9
The driver is expecting clock frequency in kHz, while SMU returns the values in 10kHz, which causes the bandwidth validation to fail Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Add dmpp clks types for conversionMikita Lipski1-23/+18
Add more cases for dm_pp clks translator into pp clks so we can pass the right structures to the powerplay. Use clks translator instead of massive switch statement. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Enable PPLib calls from DC on linuxMikita Lipski1-1/+1
Set the powerplay debug flag to false for both Windows and Linux to allow the calls to pplib. So we can retrieve the clock values from powerplay instead of using default hardcoded values. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: fix potential infinite loop in fbc pathRoman Li1-2/+2
- Fixing integer overflow bug in wait_for_fbc_state_changed() - Correct the max value of retries for the corresponding warning Signed-off-by: Roman Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: dal 3.1.51Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: clean rq/dlg/ttu reg structs before calculationsDmytro Laktyushkin3-4/+10
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: dal 3.1.50Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Add front end for dp debugfs filesDavid Francis4-1/+215
As part of hardware certification, read-write access to the link rate, lane count, voltage swing, pre-emphasis, and PHY test pattern of DP connectors is required. This commit adds debugfs files that will correspond to these values. The file operations are not yet implemented: currently writing or reading them does nothing. Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: dal 3.1.49Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: fix use of uninitialized memoryWesley Chalmers1-0/+2
DML does not calculate chroma values for RQ when surface is not YUV, but DC will unconditionally use the uninitialized values for HW programming. This does not cause visual corruption since HW will ignore garbage chroma values when surface is not YUV, but causes presubmission tests to fail golden value comparison. Signed-off-by: Wesley Chalmers <[email protected]> Signed-off-by: Eryk Brol <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: support ACrYCb2101010Zheng, XueLai(Eric)2-1/+2
Signed-off-by: XueLai(Eric), Zheng <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: add safe_to_lower support to dcn wm programmingDmytro Laktyushkin3-138/+214
This will prevent watermarks from lowering when unsafe to do so. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: change dentist DID enum values to uppercaseDmytro Laktyushkin1-25/+25
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: add CHG_DONE mash/sh defines for dentistDmytro Laktyushkin1-2/+6
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: fix pplib voltage requestDmytro Laktyushkin1-27/+32
This fixes incorrect clock caching and by extension fixes the clock reporting. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: fix dccg dcn1 ifdefDmytro Laktyushkin2-4/+8
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Define dp_alt_modeCharlene Liu3-29/+24
Also cleanup command_table2.c. No need for a lot of forward declarations. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Temporarily remove Chroma logsWesley Chalmers1-6/+2
To ensure tests continue to pass Signed-off-by: Wesley Chalmers <[email protected]> Reviewed-by: Shahin Khayyer <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: remove unnecessary pplib volage requests that are assertingDmytro Laktyushkin1-8/+0
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: clean up set_bandwidth usageDmytro Laktyushkin3-18/+3
This removes redundant set_bandwidth calls as well as fixes a bug in post_set_address_update where dcn1 would never get to lower clocks. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: rename dce_disp_clk to dccgDmytro Laktyushkin7-95/+88
No functional change. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: clean up dccg divider calc and dcn constructorDmytro Laktyushkin2-155/+68
No functional change. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: move dcn1 dispclk programming to dccgDmytro Laktyushkin4-115/+90
No functional change. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: get rid of cur_clks from dcn_bw_outputDmytro Laktyushkin6-74/+72
Cleans up dcn_bw_output to only contain calculated info, actual programmed values will now be stored in respective blocks. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Add clock types to applying clk for voltageMikita Lipski1-0/+8
Add DCF and FCLK clock case statements for changing raven's clocks for voltage request. Also maintain DCEF clock for DCE120 calls. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Use local structs instead of struct pointersMikita Lipski1-11/+11
Change struct pointers to creating structs on a stack. Thats fixing a mistake in a previous patch introducing dm_pplib functions Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Use tg count for opp init.Yongqiang Sun1-1/+1
In case of tg count not equal to FE pipe count, if use pipe count to iterate the tgs, it will cause BSOD. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: remove invalid assert when no max_pixel_clk is foundDmytro Laktyushkin1-3/+0
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Introduce pp-smu raven functionsMikita Lipski3-6/+92
DM powerplay calls for DCN10 allowing to bypass PPLib and call directly to the SMU functions. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: dal 3.1.48Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Adding Get static clocks for dm_pp interfaceMikita Lipski1-2/+16
Adding a call to powerplay to get system clocks and translate to dm structure Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Apply clock for voltage requestMikita Lipski1-2/+29
Translate dm_pp tructure to pp type Call PP lib to apply clock voltage request for display Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Adding dm-pp clocks getting by voltageMikita Lipski1-2/+41
Function to get clock levels by voltage from PPLib Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: move clock programming from set_bandwidth to dccgDmytro Laktyushkin3-70/+51
This change moves dcn clock programming(with exception of dispclk) into dccg. This should have no functional effect. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: rename display clock block to dccgDmytro Laktyushkin14-100/+100
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: redesign dce/dcn clock voltage update requestDmytro Laktyushkin10-322/+250
The goal of this change is to move clock programming and voltage requests to a single function. As of this change only dce is affected. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: replace clocks_value struct with dc_clocksDmytro Laktyushkin7-86/+49
This will avoid structs with duplicate information. Also removes pixel clock voltage request. This has no effect since pixel clock does not affect dcn voltage and this function only matters for dcn. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05Revert "drm/amdgpu: avoid sleep while executing atombios table (V2)"Alex Deucher1-1/+1
This reverts commit 8f4805a265fd710a2827b2c0e10c08ef2b526870. This change was mistakenly committed and should have been dropped with the rest of the series. Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH v3.Andrey Grodzovsky2-13/+76
Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually succeed for the first one but fail for the rest since the work takes time to process. To avoid losing info about other interrupt instances call the parsing function directly from high IRQ when current work hasn't finished and avoid accessing SQ_EDC_INFO in that case. v2: Simplify high IRQ and BH handlers synchronization using work_pending. Remove {READ,WRITE}_ONCE notations since smp_{r,w}mb are implicit compiler barriers. v3: Remove exlicit memory barriers as scedule_work has r/w barriers. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Polish SQ IH.Andrey Grodzovsky1-16/+20
Switch to using reg fields defines istead of magic values. Add SH_ID and PRIV fields reading for instr. and err cases. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/amdgpu: Add a GPU_LOAD entry to sysfs (v3)Tom St Denis1-0/+40
This adds what should be a stable interface to read GPU load from userspace. (v2): Fix comments and name of file per recommendations. (v3): Add chapter to amdgpu.rst as well. Signed-off-by: Tom St Denis <[email protected]> Acked-by: Slava Abramov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: band aid validating VM PTsChristian König1-1/+1
Always validating the VM PTs takes to much time. Only always validate the per VM BOs for now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-04Merge v4.18-rc3 into drm-nextDave Airlie11-45/+106
Two requests have come in for a backmerge, and I've got some pull reqs on rc2, so this just makes sense. Signed-off-by: Dave Airlie <[email protected]>
2018-07-03drm/amdgpu: Remove unecessary dma_fence_opsDaniel Vetter2-3/+0
dma_fence_default_wait is the default now. Reviewed-by: Christian König <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: Monk Liu <[email protected]> Cc: pding <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Evan Quan <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Kees Cook <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-28Merge tag 'ib-fbdev-drm-v4.19-deferred-console-takeover' of ↵Gustavo Padovan7-27/+65
https://github.com/bzolnier/linux into drm-misc-next Immutable branch between fbdev and drm for the v4.19 merge window (contains the deferred console takeover feature) Signed-off-by: Gustavo Padovan <[email protected]> # gpg: Signature made Thu 28 Jun 2018 10:24:50 AM -03 # gpg: using RSA key 7E33B63FA047C20B # gpg: Can't check signature: public key not found # Conflicts: # drivers/gpu/drm/i915/i915_gem.c # drivers/gpu/drm/i915/intel_crt.c # drivers/gpu/drm/i915/intel_display.c # drivers/gpu/drm/i915/intel_lrc.c Link: https://patchwork.freedesktop.org/patch/msgid/2462549.rLSfW9kX99@amdc3058
2018-06-27drm/amd/display: release spinlock before committing updates to streamShirish S1-4/+2
Currently, amdgpu_do_flip() spinlocks crtc->dev->event_lock and releases it only after committing updates to the stream. dc_commit_updates_for_stream() should be moved out of spinlock for the below reasons: 1. event_lock is supposed to protect access to acrct->pflip_status _only_ 2. dc_commit_updates_for_stream() has potential sleep's and also its not appropriate to be in an atomic state for such long sequences of code. Signed-off-by: Shirish S <[email protected]> Suggested-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-06-27drm/amdgpu:Support new VCN FW version naming conventionJames Zhu1-6/+27
Support new VCN FW version naming convention: [31, 28] for VEP interface major version if applicable [27, 24] for decode interface major version [23, 20] for encode interface major version [19, 12] for encode interface minor version [11, 0] for firmware revision Bit 20-23, it is encode major and non-zero for new naming convention. This field is part of version minor and DRM_DISABLED_FLAG in old naming convention. Since the latest version minor is 0x5B and DRM_DISABLED_FLAG is zero in old naming convention, this field is always zero so far. These four bits are used to tell which naming convention is present. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Fang, Peter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-27drm/amdgpu: fix UBSAN: Undefined behaviour for amdgpu_fence.cLeo Liu1-1/+1
Here is the UBSAN dump: [ 3.866656] index 2 is out of range for type 'amdgpu_uvd_inst [2]' [ 3.866693] Workqueue: events work_for_cpu_fn [ 3.866702] Call Trace: [ 3.866710] dump_stack+0x85/0xc5 [ 3.866719] ubsan_epilogue+0x9/0x40 [ 3.866727] __ubsan_handle_out_of_bounds+0x89/0x90 [ 3.866737] ? rcu_read_lock_sched_held+0x58/0x60 [ 3.866746] ? __kmalloc+0x26c/0x2d0 [ 3.866846] amdgpu_fence_driver_start_ring+0x259/0x280 [amdgpu] [ 3.866896] amdgpu_ring_init+0x12c/0x710 [amdgpu] [ 3.866906] ? sprintf+0x42/0x50 [ 3.866956] amdgpu_gfx_kiq_init_ring+0x1bc/0x3a0 [amdgpu] [ 3.867009] gfx_v8_0_sw_init+0x1ad3/0x2360 [amdgpu] [ 3.867062] ? smu7_init+0xec/0x160 [amdgpu] [ 3.867109] amdgpu_device_init+0x112c/0x1dc0 [amdgpu] 'ring->me' might be set as 2 with 'amdgpu_gfx_kiq_init_ring', that would cause out of range for 'amdgpu_uvd_inst[2]'. v2: simplified with ring type Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-22drm/amdgpu: GPU vs CPU page size fixes in amdgpu_vm_bo_split_mappingMichel Dänzer1-3/+5
start / last / max_entries are numbers of GPU pages, pfn / count are numbers of CPU pages. Convert between them accordingly. Fixes badness on systems with > 4K page size. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106258 Reported-by: Matt Corallo <[email protected]> Tested-by: [email protected] Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-22drm/amdgpu: Count disabled CRTCs in commit tail earlierLyude Paul1-4/+6
This fixes a regression I accidentally reduced that was picked up by kasan, where we were checking the CRTC atomic states after DRM's helpers had already freed them. Example: ================================================================== BUG: KASAN: use-after-free in amdgpu_dm_atomic_commit_tail.cold.50+0x13d/0x15a [amdgpu] Read of size 1 at addr ffff8803a697b071 by task kworker/u16:0/7 CPU: 7 PID: 7 Comm: kworker/u16:0 Tainted: G O 4.18.0-rc1Lyude-Upstream+ #1 Hardware name: HP HP ZBook 15 G4/8275, BIOS P70 Ver. 01.21 05/02/2018 Workqueue: events_unbound commit_work [drm_kms_helper] Call Trace: dump_stack+0xc1/0x169 ? dump_stack_print_info.cold.1+0x42/0x42 ? kmsg_dump_rewind_nolock+0xd9/0xd9 ? printk+0x9f/0xc5 ? amdgpu_dm_atomic_commit_tail.cold.50+0x13d/0x15a [amdgpu] print_address_description+0x6c/0x23c ? amdgpu_dm_atomic_commit_tail.cold.50+0x13d/0x15a [amdgpu] kasan_report.cold.6+0x241/0x2fd amdgpu_dm_atomic_commit_tail.cold.50+0x13d/0x15a [amdgpu] ? commit_planes_to_stream.constprop.45+0x13b0/0x13b0 [amdgpu] ? cpu_load_update_active+0x290/0x290 ? finish_task_switch+0x2bd/0x840 ? __switch_to_asm+0x34/0x70 ? read_word_at_a_time+0xe/0x20 ? strscpy+0x14b/0x460 ? drm_atomic_helper_wait_for_dependencies+0x47d/0x7e0 [drm_kms_helper] commit_tail+0x96/0xe0 [drm_kms_helper] process_one_work+0x88a/0x1360 ? create_worker+0x540/0x540 ? __sched_text_start+0x8/0x8 ? move_queued_task+0x760/0x760 ? call_rcu_sched+0x20/0x20 ? vsnprintf+0xcda/0x1350 ? wait_woken+0x1c0/0x1c0 ? mutex_unlock+0x1d/0x40 ? init_timer_key+0x190/0x230 ? schedule+0xea/0x390 ? __schedule+0x1ea0/0x1ea0 ? need_to_create_worker+0xe4/0x210 ? init_worker_pool+0x700/0x700 ? try_to_del_timer_sync+0xbf/0x110 ? del_timer+0x120/0x120 ? __mutex_lock_slowpath+0x10/0x10 worker_thread+0x196/0x11f0 ? flush_rcu_work+0x50/0x50 ? __switch_to_asm+0x34/0x70 ? __switch_to_asm+0x34/0x70 ? __switch_to_asm+0x40/0x70 ? __switch_to_asm+0x34/0x70 ? __switch_to_asm+0x40/0x70 ? __switch_to_asm+0x34/0x70 ? __switch_to_asm+0x40/0x70 ? __schedule+0x7d6/0x1ea0 ? migrate_swap_stop+0x850/0x880 ? __sched_text_start+0x8/0x8 ? save_stack+0x8c/0xb0 ? kasan_kmalloc+0xbf/0xe0 ? kmem_cache_alloc_trace+0xe4/0x190 ? kthread+0x98/0x390 ? ret_from_fork+0x35/0x40 ? ret_from_fork+0x35/0x40 ? deactivate_slab.isra.67+0x3c4/0x5c0 ? kthread+0x98/0x390 ? kthread+0x98/0x390 ? set_track+0x76/0x120 ? schedule+0xea/0x390 ? __schedule+0x1ea0/0x1ea0 ? wait_woken+0x1c0/0x1c0 ? kasan_unpoison_shadow+0x30/0x40 ? parse_args.cold.15+0x17a/0x17a ? flush_rcu_work+0x50/0x50 kthread+0x2d4/0x390 ? kthread_create_worker_on_cpu+0xc0/0xc0 ret_from_fork+0x35/0x40 Allocated by task 1124: kasan_kmalloc+0xbf/0xe0 kmem_cache_alloc_trace+0xe4/0x190 dm_crtc_duplicate_state+0x78/0x130 [amdgpu] drm_atomic_get_crtc_state+0x147/0x410 [drm] page_flip_common+0x57/0x230 [drm_kms_helper] drm_atomic_helper_page_flip+0xa6/0x110 [drm_kms_helper] drm_mode_page_flip_ioctl+0xc4b/0x10a0 [drm] drm_ioctl_kernel+0x1d4/0x260 [drm] drm_ioctl+0x433/0x920 [drm] amdgpu_drm_ioctl+0x11d/0x290 [amdgpu] do_vfs_ioctl+0x1a1/0x13d0 ksys_ioctl+0x60/0x90 __x64_sys_ioctl+0x6f/0xb0 do_syscall_64+0x147/0x440 entry_SYSCALL_64_after_hwframe+0x44/0xa9 Freed by task 1124: __kasan_slab_free+0x12e/0x180 kfree+0x92/0x1a0 drm_atomic_state_default_clear+0x315/0xc40 [drm] __drm_atomic_state_free+0x35/0xd0 [drm] drm_atomic_helper_update_plane+0xac/0x350 [drm_kms_helper] __setplane_internal+0x2d6/0x840 [drm] drm_mode_cursor_universal+0x41e/0xbe0 [drm] drm_mode_cursor_common+0x49f/0x880 [drm] drm_mode_cursor_ioctl+0xd8/0x130 [drm] drm_ioctl_kernel+0x1d4/0x260 [drm] drm_ioctl+0x433/0x920 [drm] amdgpu_drm_ioctl+0x11d/0x290 [amdgpu] do_vfs_ioctl+0x1a1/0x13d0 ksys_ioctl+0x60/0x90 __x64_sys_ioctl+0x6f/0xb0 do_syscall_64+0x147/0x440 entry_SYSCALL_64_after_hwframe+0x44/0xa9 The buggy address belongs to the object at ffff8803a697b068 which belongs to the cache kmalloc-1024 of size 1024 The buggy address is located 9 bytes inside of 1024-byte region [ffff8803a697b068, ffff8803a697b468) The buggy address belongs to the page: page:ffffea000e9a5e00 count:1 mapcount:0 mapping:ffff88041e00efc0 index:0x0 compound_mapcount: 0 flags: 0x8000000000008100(slab|head) raw: 8000000000008100 ffffea000ecbc208 ffff88041e000c70 ffff88041e00efc0 raw: 0000000000000000 0000000000170017 00000001ffffffff 0000000000000000 page dumped because: kasan: bad access detected Memory state around the buggy address: ffff8803a697af00: fb fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ffff8803a697af80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc >ffff8803a697b000: fc fc fc fc fc fc fc fc fc fc fc fc fc fb fb fb ^ ffff8803a697b080: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb ffff8803a697b100: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb ================================================================== So, we fix this by counting the number of CRTCs this atomic commit disabled early on in the function before their atomic states have been freed, then use that count later to do the appropriate number of RPM puts at the end of the function. Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Cc: [email protected] Fixes: 97028037a38ae ("drm/amdgpu: Grab/put runtime PM references in atomic_commit_tail()") Signed-off-by: Lyude Paul <[email protected]> Cc: Michel Dänzer <[email protected]> Reported-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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