aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/pm
AgeCommit message (Collapse)AuthorFilesLines
2021-05-19drm/amd/amdgpu: add smu support for beige_gobyChengming Gui3-2/+12
Use soft-pptable for beige_goby v2: fix format Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/pm: Reset max GFX clock after disabling determinismLijo Lazar1-3/+8
When determinism mode is disabled on aldebaran, max GFX clock will be reset to default max frequency value. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/pm: Fix showing incorrect frequencies on aldebaranLijo Lazar2-25/+55
v1: Use the current and custom pstate frequencies to track the current and user-set min/max values in manual and determinism mode. Previously, only actual_* value was used to track the currrent and user requested value. The value will get reassigned whenever user requests a new value with pp_od_clk_voltage node. Hence it will show incorrect values when user requests an invalid value or tries a partial request without committing the values. Separating out to custom and current variable fixes such issues. v2: Remove redundant if-else check Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/pm: Add custom/current freq to pstatesLijo Lazar1-0/+8
Add custom member for user requested custom frequency, level mask or min/max frequencies. Add curr member to keep track of the current active values. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amdgpu: Fill adev->unique_id with data from PF2VF msgJiawei Gu1-1/+2
Initialize unique_id from PF2VF under virtualization. V2: skip smu_get_unique_id() under virtualization Signed-off-by: Jiawei Gu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/pm: Update aldebaran pmfw interfaceLijo Lazar2-3/+6
Update aldebaran driver-PMFW interface to version 0x07 Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/pm: enable ASPM by defaultKenneth Feng1-1/+1
Since ASPM function has been stable, we don't need to add the modprobe parameter and we can enable ASPM by default. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm: Fix out-of-bounds bugGustavo A. R. Silva2-99/+109
Create new structure SISLANDS_SMC_SWSTATE_SINGLE, as initialState.levels and ACPIState.levels are never actually used as flexible arrays. Those arrays can be used as simple objects of type SISLANDS_SMC_HW_PERFORMANCE_LEVEL, instead. Currently, the code fails because flexible array _levels_ in struct SISLANDS_SMC_SWSTATE doesn't allow for code that accesses the first element of initialState.levels and ACPIState.levels arrays: drivers/gpu/drm/amd/pm/powerplay/si_dpm.c: 4820: table->initialState.levels[0].mclk.vDLL_CNTL = 4821: cpu_to_be32(si_pi->clock_registers.dll_cntl); ... 5021: table->ACPIState.levels[0].mclk.vDLL_CNTL = 5022: cpu_to_be32(dll_cntl); because such element cannot be accessed without previously allocating enough dynamic memory for it to exist (which never actually happens). So, there is an out-of-bounds bug in this case. That's why struct SISLANDS_SMC_SWSTATE should only be used as type for object driverState and new struct SISLANDS_SMC_SWSTATE_SINGLE is created as type for objects initialState, ACPIState and ULVState. Also, with the change from one-element array to flexible-array member in commit 0e1aa13ca3ff ("drm/amd/pm: Replace one-element array with flexible-array in struct SISLANDS_SMC_SWSTATE"), the size of dpmLevels in struct SISLANDS_SMC_STATETABLE should be fixed to be SISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE instead of SISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1. Fixes: 0e1aa13ca3ff ("drm/amd/pm: Replace one-element array with flexible-array in struct SISLANDS_SMC_SWSTATE") Cc: [email protected] Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu: Rename to ras_*_enabledLuben Tuikov2-2/+2
Rename, ras_hw_supported --> ras_hw_enabled, and ras_features --> ras_enabled, to show that ras_enabled is a subset of ras_hw_enabled, which itself is a subset of the ASIC capability. Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu: Remove redundant ras->supportedLuben Tuikov2-2/+3
Remove redundant ras->supported, as this value is also stored in adev->ras_features. Use adev->ras_features, as that supercedes "ras", since the latter is its member. The dependency goes like this: ras <== adev->ras_features <== hw_supported, and is read as "ras depends on ras_features, which depends on hw_supported." The arrows show the flow of information, i.e. the dependency update. "hw_supported" should also live in "adev". Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu/pm: add documentation for pp_od_clock_voltage for vangoghAlex Deucher1-1/+13
Vangogh follows other APUs, but also allows core clock adjustments. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUsAlex Deucher1-0/+8
APUs only support adjusting the SCLK domain. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm: expose pmfw attached timestamp on AldebaranEvan Quan2-5/+11
Available with 68.18.0 and later PMFWs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm: initialize variableTom Rix1-1/+1
Static analysis reports this problem amdgpu_pm.c:478:16: warning: The right operand of '<' is a garbage value for (i = 0; i < data.nums; i++) { ^ ~~~~~~~~~ In some cases data is not set. Initialize to 0 and flag not setting data as an error with the existing check. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm: Add debugfs node to read private bufferLijo Lazar1-0/+44
Add debugfs interface to read region allocated for FW private buffer Signed-off-by: Lijo Lazar <[email protected]> Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm: Add interface to get FW private bufferLijo Lazar2-0/+42
v1: Add new interface to get FW private buffer details v2: Drop domain check v3: Use amdgpu_bo_kmap to get cpu address Signed-off-by: Lijo Lazar <[email protected]> Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amd/pm/powerplay/hwmgr: Fix kernel-doc syntax in documentationFabio M. De Francesco1-4/+4
Fixed kernel-doc syntax errors in documentation of functions. Signed-off-by: Fabio M. De Francesco <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28amdgpu/pm: set pp_dpm_dcefclk to readonly on NAVI10 and newer gpusDarren Powell1-0/+8
v2 : change condition to apply to all chips after NAVI10 Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot. Patch prevents user from successfully writing to file pp_dpm_dcefclk on parts NAVI10 and newer, and gives better user feedback that this operation is not allowed. Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28amdgpu/pm: Prevent force of DCEFCLK on NAVI10 and SIENNA_CICHLIDDarren Powell2-2/+7
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot. Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an info message. Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28amdgpu/pm: add extra info to SMU msg pre-check failed messageDarren Powell1-2/+2
Insert the value of the response to error message emitted when the SMU msg pre-check failes Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28drm/amd/pm: Update energy_accumulator in gpu metricsHarish Kasiviswanathan1-1/+3
Now that it is available. v2: squash in typecast fix (Alex) Signed-off-by: Harish Kasiviswanathan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: fix error code in smu_set_power_limit()Dan Carpenter1-0/+1
We should return -EINVAL instead of success if the "limit" is too high. Fixes: e098bc9612c2 ("drm/amd/pm: optimize the power related source code layout") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: revise two names of sensor values for vangoghXiaojian Du1-6/+6
This patch is to revise two names of sensor values for vangogh. New smu metrics table is supported by new pmfw (from version 4.63.36.00 ), it includes two parts, one part is the current smu metrics table data and the other part is the average smu metrics table data. The hwmon will read the current gfxclk and mclk from the current smu metrics table data. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: remove the "set" function of pp_dpm_mclk for vangoghXiaojian Du1-6/+0
This patch is to remove the "set" function of pp_dpm_mclk for vangogh. For vangogh, mclk bonds with fclk, they will lock each other on the same perfomance level. But according to the smu message from pmfw, only fclk is allowed to set value manually, so remove the unnecessary code of "set" function for mclk. Signed-off-by: Xiaojian Du <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: add the callback to get the bootup values for renoirXiaojian Du3-0/+126
This patch is to add the callback to get the bootup values for renoir. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: Show updated clocks on aldebaranLijo Lazar1-11/+41
When GFXCLK range is updated in manual/determinism mode, show the updated min/max clock range. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amdgpu: Ensure dcefclk isn't created on AldebaranKent Russell1-1/+3
Like Arcturus, this isn't available on Aldebaran, so remove it accordingly Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: add support for new smu metrics table for vangoghXiaojian Du1-26/+338
This patch is to add support for new smu metrics table for vangogh. It will support new and legacy smu metrics table in the meanwhile. New pmfw version is 4.63.36.00, and new smu interface version is #3. v1: check smu pmfw version to determine to use new or legacy smu metrics table v2: check smu interface version to determine to use new or legacy smu metrics table v3: revise wrong symbol Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: update the driver interface header for vangoghXiaojian Du2-2/+40
This patch is to update the driver interface header for vangogh. New version driver interface header will support new version pmfw (from version 4.63.36.00) which uses new smu metrics table. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-15drm/amd/pm: Use VBIOS PPTable for aldebaranLijo Lazar2-2/+3
Keep the logic to force-use VBIOS PPTable in aldebaran rather than in generic SMU13. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu/smu7: fix CAC setting on TOPAZAlex Deucher1-1/+2
We need to enable MC CAC for mclk switching to work. Fixes: d765129a719f ("drm/amd/pm: correct sclk/mclk dpm enablement") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1561 Tested-by: Konstantin Kharlamov <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: add ras aldebaran ras eeprom driverJohn Clements1-0/+229
added host to smu cmd to access i2c eeprom Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: increase time out value when sending msg to SMUcharles sun1-1/+1
when do S3 stress, low rate that PowerUpVcn message will get response more than 1s, so here increase the timeout to 2s Signed-off-by: charles sun <[email protected]> Reviewed-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: add the callback to get vbios bootup values for vangoghXiaojian Du2-0/+2
This patch is to add the callback to get vbios bootup values for vangogh, it will get the bootup values of gfxclk, mclk, socclk and so on. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu/vangogh: don't check for dpm in is_dpm_running when in suspendAlex Deucher1-0/+5
Do the same thing we do for Renoir. We can check, but since the sbios has started DPM, it will always return true which causes the driver to skip some of the SMU init when it shouldn't. Reviewed-by: Zhan Liu <[email protected]> Acked-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Fix DPM level count on aldebaranLijo Lazar1-4/+8
Firmware returns zero-based max level, increment by one to get total levels. This fixes the issue of not showing all levels and current frequency when frequency is at max DPM level. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: unify the interface for gfx state settingEvan Quan2-3/+4
No need to have special handling for swSMU supported ASICs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: unify the interface for power gatingEvan Quan3-15/+3
No need to have special handling for swSMU supported ASICs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: fix missing static declarationsEvan Quan1-7/+7
Add "static" declarations for those APIs used internally. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: unify the interface for loading SMU microcodeEvan Quan3-26/+24
No need to have special handling for swSMU supported ASICs. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: no need to force MCLK to highest when no display connectedEvan Quan1-1/+2
Correct the check for vblank short. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Tested-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: Fix build warningsLijo Lazar1-1/+1
Fix header guard and make internal functions static. Fixes the below warnings: drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_reset.h:24:9: warning: '__AMDUGPU_RESET_H__' is used as a header guard here, followed by #define of a different macro [-Wheader-guard] drivers/gpu/drm/amd/amdgpu/aldebaran.c:110:6: warning: no previous prototype for function 'aldebaran_async_reset' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/aldebaran_ppt.c:1435:5: warning: no previous prototype for function 'aldebaran_mode2_reset' [-Wmissing-prototypes] Signed-off-by: Lijo Lazar <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Add support for reset completion on aldebaranLijo Lazar5-2/+36
v1: On aldebaran, after hardware context restore, another handshake needs to happen with PMFW so that reset recovery is complete from PMFW side. Treat this as RESET_COMPLETE event for aldebaran. v2: Cleanup coding style, info logs Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Add function to wait for smu eventsLijo Lazar2-1/+29
v1: Add function to wait for specific event/states from PMFW v2: Add mutex lock, simplify sequence Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Modify mode2 msg sequence on aldebaranLijo Lazar4-11/+61
v1: During mode2 reset, PCI space is lost after message is sent. Restore PCI space before waiting for response from firmware. v2: Move mode2 sequence to aldebaran and update PMFW version. Handle generic sequence in smu13 without PMFW version check. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Convert sysfs sprintf/snprintf family to sysfs_emitTian Tao1-45/+45
Fix the following coccicheck warning: drivers/gpu/drm/amd/pm/amdgpu_pm.c:1940:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:1978:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2022:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:294:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:154:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:496:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:512:9-17: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:1740:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:1667:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2074:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2047:9-17: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2768:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2738:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2442:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3246:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3253:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2458:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3047:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3133:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3209:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3216:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2410:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2496:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2470:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2426:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2965:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:2972:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3006:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/amd/pm/amdgpu_pm.c:3013:8-16: WARNING: use scnprintf or sprintf Signed-off-by: Tian Tao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu/pm: bail on sysfs/debugfs queries during platform suspendAlex Deucher1-0/+98
The GPU is in the process of being shutdown. Spurious queries during suspend and resume can put the SMU into a bad state. Runtime PM is handled dynamically so we check if we are in non-runtime suspend. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu/pm: mark pcie link/speed arrays as constAlex Deucher4-8/+8
They are read only. Noticed-by: Dave Airlie <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: Update aldebaran pmfw interfaceLijo Lazar2-3/+10
Update aldebaran PMFW interfaces to version 0x6 Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/pm: drop redundant and unneeded BACO APIs V2Evan Quan2-104/+0
Use other APIs which are with the same functionality but much more clean. V2: drop mediate unneeded interface Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>