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path: root/drivers/gpu/drm/amd/include
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2019-04-23drm/amd/include: Add HUBPREQ_DEBUG register offsetsLeo Li1-0/+8
They will be used by DC when runing ASIC-specific HUBP initialization. Signed-off-by: Leo Li <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-19drm/amd/include: Add USB_C_TYPE to atom_encoder_cap_defsLeo Li1-0/+1
This is needed by DC to support EDID emulation on USB-C ports. CC: Samson Tam <[email protected]> CC: Harry Wentland <[email protected]> CC: Alex Deucher <[email protected]> Signed-off-by: Leo Li <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-19drm/amdgpu: get_fw_version isn't ASIC specificAmber Lin1-16/+0
Method of getting firmware version is the same across ASICs, so remove them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new created get_fw_version simply reads fw_version from adev->gfx than parsing the ucode header. Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amdgpu: remove chashChristian König1-366/+0
Remove the chash implementation for now since it isn't used any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amdgpu: update atomfirmware header with ecc related membersHawking Zhang1-0/+53
add new umc_info structures and new firmware_capability defines Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headersTom St Denis2-0/+7
Signed-off-by: Tom St Denis <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add enable_umd_pstate functions for SMU11Chengming Gui1-0/+3
add enable_umd_pstate to support sys interface for SMU11. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amdgpu: update atomfirmware header for smu11Huang Rui1-7/+37
This patch updates atomfirmware header on smu11 for future use. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resourcesYong Zhao1-2/+2
We can directly calculate sdma doorbell indexes in the process doorbell pages through the doorbell_index structure in amdgpu_device, so no need to cache them in kgd2kfd_shared_resources any more. This alleviates the adaptation needs when new SDMA configurations are introduced. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdkfd: Fix bugs regarding CP queue doorbell mask on SOC15Yong Zhao1-9/+6
Reserved doorbells for SDMA IH and VCN were not properly masked out when allocating doorbells for CP user queues. This patch fixed that. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amd/powerplay: support retrieving and adjusting dcefclock power levels V2Evan Quan1-0/+1
User can use "pp_dpm_dcefclk" to retrieve and adjust dcefclock power levels. V2: expose this interface for Vega10 and later ASICs only Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amd/powerplay: support retrieving and adjusting fclock power levels V2Evan Quan1-0/+1
User can use "pp_dpm_fclk" to retrieve and adjust fclock power levels. V2: expose this interface for Vega20 and later ASICs only Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amd/powerplay: support retrieving and adjusting SOC clock power levels V2Evan Quan1-0/+1
User can use "pp_dpm_socclk" to retrieve and adjust SOC clock power levels. V2: expose this interface for Vega10 and later ASICs only Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amd/powerplay: support enabled ppfeatures retrieving and setting V3Evan Quan1-0/+2
User can use "ppfeatures" sysfs interface to retrieve and set enabled powerplay features. V2: expose this feature for Vega10 and later dGPUs V3: squash in removal of unused variable (Alex) Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amd: fix typoMatteo Croce1-1/+1
Fix spelling mistake: "lenght" -> "length" Signed-off-by: Matteo Croce <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: update THM IP register header to support BACOJim Qu1-0/+3
Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: update NBIO v7.4 to support BACOJim Qu2-0/+5
Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: add BACO interfaces in pm and hwmgr function tableJim Qu1-0/+3
Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: update nbio v6.1 register/master to support BACOJim Qu2-0/+6
Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: Add NBIO SMN headers v2Kent Russell3-0/+165
We need these offsets for PCIE perf counters, so include them as well as the the previously-used defines from the nbio_*.c files v2: Return NBIF definitions back to previous files Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: Remove kgd2kfd function pointersAmber Lin1-50/+0
kgd2kfd function pointers and global kgd2kfd pointer are no longer in use. Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: Relocate kgd2kfd function declarationAmber Lin1-3/+0
Since amdkfd is merged into amdgpu module and amdgpu can access amdkfd directly, move declaration of kgd2kfd functions from kfd_priv.h to amdgpu_amdkfd.h Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amd/powerplay: support BOOTUP_DEFAULT power profile modeEvan Quan1-6/+7
This can avoid unexpected profile mode change after running compute workload. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-07drm/amdkfd: Add support for doorbell BOsFelix Kuehling1-2/+2
This allows user mode to map doorbell pages into GPUVM address space. That way GPUs can submit to user mode queues (self-dispatch). Acked-by: Alex Deucher <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-07drm/amd/powerplay: rv dal-pplib interface refactor powerplay parthersen wu1-0/+4
[WHY] clarify dal input parameters to pplib interface, remove un-used parameters. dal knows exactly which parameters needed and their effects at pplib and smu sides. current dal sequence for dcn1_update_clock to pplib: 1.smu10_display_clock_voltage_request for dcefclk 2.smu10_display_clock_voltage_request for fclk 3.phm_store_dal_configuration_data { set_min_deep_sleep_dcfclk set_active_display_count store_cc6_data --- this data never be referenced new sequence will be: 1. set_display_count --- need add new pplib interface 2. set_min_deep_sleep_dcfclk -- new pplib interface 3. set_hard_min_dcfclk_by_freq 4. set_hard_min_fclk_by_freq after this code refactor, smu10_display_clock_voltage_request, phm_store_dal_configuration_data will not be needed for rv. [HOW] step 1: add new functions at pplib interface step 2: add new functions at amdgpu dm and dc Signed-off-by: hersen wu <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-05drm/amd/include: Add mmhub 9.4 reg offsets and shift-maskLeo Li2-0/+67
In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for determining if xGMI is enabled on VG20. This will be used by DC to determine the correct spread spectrum adjustment for display and audio clocks. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-26drm/amd: Query and use ACPI backlight capsDavid Francis1-0/+24
ACPI ATIF has a function called query backlight transfer characteristics. Among the information returned by this function is the minimum and maximum input signals for the backlight Call that function on ACPI init. When DM backlight device is updated, copy over the backlight caps into DM, but only once. Use the backlight caps in the backlight-to-dc calculation Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-26drm/amd: update ATIF functions in AMD ACPI headerDavid Francis1-104/+47
The ACPI interface in AMD was a few years out of date and contained some unused and deprecated functions Remove functions: Select Active Displays, Get Lid State, Get TV Standard, Set TV Standard, Get Panel Expansion Mode, Set Panel Expansion Mode, Get Graphics Device Types Add functions: Query Backlight Transfer Characteristics, Ready To Undock Notification Changed functions: Get System Parameters, Get System BIOS Requests All changes are right from the standard ATI ACPI Control Methods V0.44 Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-07drm/amdgpu: add DC feature mask module parameterAlex Deucher1-0/+4
Similar to ppfeaturemask. Allows you to selectively enable/disable DC features. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-06drm/amd: Update atom_smu_info_v3_3 structureLeo Li1-2/+5
Mainly adding the WAFL spread spectrum info, for adjusting display clocks when XGMI is enabled. Signed-off-by: Leo Li <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-05drm/amdgpu: Remove unused function pointersAmber Lin1-115/+0
Remove unused function pointers in kfd2kgd structure. Signed-off-by: Amber Lin <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-16drm/amd/powerplay: added I2C controller configurationEvan Quan1-0/+88
PPTABLE structure is stretched to add I2C controller configuration. Hold on the PPTABLE_V20_SMU_VERSION bump until the VBIOS is ready. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-12drm/amdgpu/vcn:Add new register offset/mask for VCNJames Zhu2-0/+32
Add new register offset/mask for VCN to support latest VCN implementation. Signed-off-by: James Zhu <[email protected]> Acked-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: add CP_DEBUG register definition for GC9.0Tao Zhou1-0/+2
Add CP_DEBUG register definition. Signed-off-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: Add fan RPM setting via sysfsRex Zhu1-0/+1
Add fan1_target for get/set fan speed in RPM unit Add fan1_min/fan1_max for get min, max fan speed in RPM unit Add fan1_enable to enable/disable the fan1 sensor v3: drop the hardcode value of min/max rpm in comments pointed out by Alex. v2: query the min/max rpm gpu support instand of hardcode value. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: Add new AMDGPU_PP_SENSOR_MIN/MAX_FAN_RPM sensorRex Zhu1-0/+2
For getting the min/max fan speed in RPM units. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay: helper interfaces for MGPU fan boost featureEvan Quan1-0/+1
MGPU fan boost feature is enabled only when two or more dGPUs in the system. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay/vega20: enable fan RPM and pwm settings V2Evan Quan2-0/+22
Manual fan RPM and pwm setting on vega20 are available now. V2: correct the register for fan speed setting and avoid divide-by-zero Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay/vega20: tell the correct gfx voltage V2Evan Quan2-0/+6
Export the correct gfx voltage by hwmon interface. V2: update the register naming for consistency Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu:Add DPG support flagJames Zhu1-0/+1
Add DPG support flag for VCN DPG mode. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu:Add new register offset/mask to support VCN DPG modeJames Zhu2-0/+33
New register offset/mask need to be added to support VCN DPG mode. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd: Interface change to support 64 bit page_table_baseShaoyun Liu1-2/+2
amdgpu_gpuvm_get_process_page_dir should return the page table address in the format expected by the pm4_map_process packet for all ASIC generations. Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: Doorbell assignment for 8 sdma user queue per engineShaoyun Liu1-3/+3
Change doorbell assignments to allow routing doorbells for 8 user mode SDMA queues per engine. Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: add new AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK sensorAlex Deucher1-0/+1
For getting the 64 bit enabled smc feature mask from vega parts. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-27BackMerge v4.19-rc5 into drm-nextDave Airlie1-1/+1
Sean Paul requested an -rc5 backmerge from some sun4i fixes. Signed-off-by: Dave Airlie <[email protected]>
2018-09-20drm/amdkfd: Change the control stack MTYPE from UC to NC on GFX9Yong Zhao1-1/+1
CWSR fails on Raven if the control stack is MTYPE_UC, which is used for regular GART mappings. As a workaround we map it using MTYPE_NC. The MEC firmware expects the control stack at one page offset from the start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU added a memory allocation flag just for this purpose. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-19drm/amdgpu: update vram_info structure in atomfirmware.hHawking Zhang1-9/+11
atomfirmware has structure changes in varm_info. Updated it to the latest one. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-10drm/amd/include: Add get_hive_id interface in kfd2kgdShaoyun Liu1-0/+5
KFD need to get hive id from amdgpu to build up the XGMI topology Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-10drm/amd/include: update the bitfield define for PF_MAX_REGIONShaoyun Liu1-2/+2
Correct the definition based on vega20 register spec Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-10drm/amd/powerplay: added vega20 overdrive support V3Evan Quan1-0/+2
Added vega20 overdrive support based on existing OD sysfs APIs. However, the OD logics are simplified on vega20. So, the behavior will be a little different and works only on some limited levels. V2: fix typo fix commit description revise error logs add support for clock OD V3: separate clock from voltage OD settings Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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