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path: root/drivers/gpu/drm/amd/include
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2018-03-05drm/amd/pp: Remove the wrap functions for acpi in powerplayRex Zhu1-44/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Simplify the create of powerplay instanceRex Zhu2-15/+0
use adev as input parameter to create powerplay instance directly. delete cgs wrap layer for power play create. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amdgpu: Add query vram width in CGS query system infoRex Zhu1-0/+1
powerplay need vram width to set default mclk optimization settings(uphyst/downhyst/activity threshold) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Expose set/get_power_limit for DGPURex Zhu1-0/+2
User can change power limit between [0, 1] * max power limit. Set power limit to 0, restore to max power limit. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: add an interface of amdgpu_dpm_set_mmhub_powergating_by_smuEric Huang1-0/+1
Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Adding missing TMZ sh/mask entries for DCN1 SURFACE_CONTROLHarry Wentland1-0/+14
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/pp: remove the get_temperature APIAlex Deucher1-1/+0
This is also supported with the read_sensor API and there were no more users of the get_temperature API. Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Add edit/commit/show OD clock/voltage support in sysfsRex Zhu1-0/+1
when cat pp_od_clk_voltage it show OD_SCLK: 0: 300Mhz 800 mV 1: 466Mhz 818 mV 2: 751Mhz 824 mV 3: 1019Mhz 987 mV 4: 1074Mhz 1037 mV 5: 1126Mhz 1087 mV 6: 1169Mhz 1137 mV 7: 1206Mhz 1150 mV OD_MCLK: 0: 300Mhz 800 mV 1: 1650Mhz 1000 mV echo "s/m level clock voltage" to change sclk/mclk's clock and voltage echo "r" to restore default value. echo "c" to commit the user setting. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Add hwmgr interface for edit dpm tableRex Zhu1-0/+7
Add odn_edit_dpm_table function points for setting user assigned clock/voltage. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: retire soc15ip.hHawking Zhang1-1343/+0
Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: split soc15ip header into ip and ip_offset headerHawking Zhang2-0/+1363
ip base could be different per ASIC since from soc15. split soc15 header into common ip/hw_id header and asic specific ip offset header Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Add OD driver clock/voltage display on smu7Rex Zhu1-0/+2
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Add stable Pstate clk display support in debugfsRex Zhu1-0/+2
The additional output are: PSTATE_SCLK and PSTATE_MCLK value in MHz as: 300 MHz (PSTATE_SCLK) 300 MHz (PSTATE_MCLK) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: add custom power policy support in sysfsRex Zhu1-1/+11
when cat pp_power_profile_mode on Vega10 NUM MODE_NAME BUSY_SET_POINT FPS USE_RLC_BUSY MIN_ACTIVE_LEVEL 0 3D_FULL_SCREEN : 70 60 1 3 1 POWER_SAVING : 90 60 0 0 2 VIDEO*: 70 60 0 0 3 VR : 70 90 0 0 4 COMPUTER : 30 60 0 6 5 CUSTOM : 0 0 0 0 the result show all the profile mode we can support and custom mode. user can echo the num(0-4) to pp_power_profile_mode to select the profile mode or can echo "5 value value value value" to enter CUSTOM mode. the four parameter is set_point/FPS/USER_RLC_BUSY/MIN_ACTIVE_LEVEL. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Export registers for read vddc on VI/Vega10Rex Zhu4-2/+11
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: new cgs interface setting dpm thermal rangeEvan Quan1-0/+7
This will be used by powerplay to update the dpm temp range structure used to interface with hwmon. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a ↵Evan Quan1-1/+1
better name for other parameter Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-08drm/amdgpu: Add support for reporting VRAM usageKent Russell1-0/+3
Add functions to report the vram_usage from the amdgpu_device Signed-off-by: Kent Russell <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-12-08drm/amd: Remove get_vmem_size from KGD-KFD interfaceHarish Kasiviswanathan1-3/+0
Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-12-08drm/amd: Add get_local_mem_info to KGD-KFD interfaceHarish Kasiviswanathan1-0/+12
Add get_local_mem_info which provides more information about local memory than get_vmem_size: - public and private framebuffer size - memory clock Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Ben Goz <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-12-08drm/amd: add new interface to query cu infoFlora Cui1-0/+19
Signed-off-by: Flora Cui <[email protected]> Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-11-27drm/amdgpu: Add kfd2kgd APIs for dumping HQDsFelix Kuehling1-0/+14
This can be used by KFD for debugging features, such as dumping HQDs in debugfs. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-11-01drm/amdgpu: Implement amdgpu SDMA functions for VIPhilip Cox1-0/+2
Signed-off-by: Philip Cox <[email protected]> Signed-off-by: shaoyun liu <[email protected]> Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-11-01drm/amd: Update kgd_kfd interface for resuming SDMA queuesFelix Kuehling1-1/+2
Add wptr and mm parameters to hqd_sdma_load and pass these parameters from device_queue_manager through the mqd_manager. SDMA doesn't support polling while the engine believes it's idle. The driver must update the wptr. The new parameters will be used for looking up the updated value from the specified mm when SDMA queues are resumed after being disabled. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2017-12-13drm/amdgpu: remove some old gc 9.x registersAlex Deucher4-80/+0
Leftover from bring up. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 vcn header files.Feifei Xu3-202/+0
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 thm header files.Feifei Xu3-0/+0
Cleanup asic_reg/raven1/THM folder. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 nbio header files.Feifei Xu3-0/+0
Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 mp header files.Feifei Xu3-0/+0
Cleanup asic_reg/raven1/MP folder. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu3-1028/+0
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 gc header files.Feifei Xu3-35196/+0
Cleanup asic_reg/raven1/GC folder. Remove unused files: gc_9_1_default.h gc_9_1_sh_mask.h Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 dcn header files.Feifei Xu3-7988/+0
Cleanup asic_reg/raven1/DCN folder.Remove unused dcn_1_0_default.h. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup raven1 sdma header files.Feifei Xu3-1658/+0
Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h. Signed-off-by: Feifei Xu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu2-0/+0
Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 osssys header files.Feifei Xu3-176/+0
Cleanup asic_reg/vega10/OSSSYS folder. Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 smuio header files.Feifei Xu3-100/+0
Cleanup asic_reg/vega10/SMUIO folder. Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 nbif header files.Feifei Xu3-1271/+0
Cleanup asic_reg/vega10/NBIF folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 nbio header files.Feifei Xu3-0/+0
Cleanup asic_reg/vega10/NBIO folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 mmhub header files.Feifei Xu3-0/+0
Cleanup asic_reg/vega10/MMHUB folder. Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 gc header files.Feifei Xu3-0/+0
Cleanup asic_reg/vega10/GC folder. Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 vce header files.Feifei Xu3-0/+0
Cleanup asic_reg/vega10/VCE folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 uvd header files.Feifei Xu3-127/+0
Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 dce header files.Feifei Xu3-9868/+0
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include: cleanup vega10 umc header files.Feifei Xu3-0/+0
Remove asic/vega10/UMC folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 thm header files.Feifei Xu3-0/+0
Cleanup asic_reg/vega10/THM folder. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 athub header files.Feifei Xu5-2739/+2498
Cleanup asic_reg/vega10/ATHUB folder,remove unused files. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 mp header files.Feifei Xu5-2180/+1838
Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 hdp header files.Feifei Xu5-927/+810
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/include:cleanup vega10 sdma0/1 header files.Feifei Xu12-5316/+5316
To remove include/asic_reg/vega10 folder,create IP folders sdma0/1. This patch cleanup asic_reg/vega10/SDMA folders. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Fix missing newlines at end of fileErnst Sjöstrand1-1/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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