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path: root/drivers/gpu/drm/amd/include/amd_shared.h
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2023-06-09drm/amdgpu: add the accelerator PCIe classShiwu Zhang1-1/+0
Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by: Shiwu Zhang <[email protected]> Acked-by: Lijo Lazar <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> # pci_ids.h Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: add the accelerator pcie classShiwu Zhang1-0/+1
v2: add the base class id for accelerator (lijo) v3: add the new pci class in amdgpu tree (hawking) Signed-off-by: Shiwu Zhang <[email protected]> Acked-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-24Revert "drm/amd/display: disable SubVP + DRR to prevent underflow"Aurabindo Pillai1-1/+0
This reverts commit 80c6d6804f31451848a3956a70c2bcb1f07cfcb0. The orignal commit was intended as a workaround to prevent underflow and flickering when using one normal monitor and the other high refresh rate monitor (> 120Hz). This patch is being reverted in favour of a software solution to enable SubVP+DRR Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-02-15drm/amd/display: disable SubVP + DRR to prevent underflowAurabindo Pillai1-0/+1
[Why&How] Temporarily disable SubVP+DRR since Xorg has an architectural limitation where freesync will not work in a multi monitor configuration. SubVP+DRR requires that freesync be working. Whether OS has variable refresh setting enabled or not, the state on the crtc remains same unless an application requests VRR. Due to this, there is no way to know whether freesync will actually work or not while we are on the desktop from the kernel's perspective. If userspace does not have a limitation with multi-display freesync (for example wayland), then this feature can be enabled by adding a dcfeaturemask option to amdgpu on the kernel cmdline like: amdgpu.dcfeaturemask=0x200 Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add dcdebugmask option for disabling MPOLeo Li1-0/+1
[Why & How] It's useful to disable MPO when debugging or testing. Therefore, add a dcdebugmask option to disable MPO. Signed-off-by: Leo Li <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-05drm/amd: Add debug mask for subviewport mclk switchAurabindo Pillai1-0/+1
[Why&How] Expose a new dc debug mask enum to force a subviewport memory clock switch to facilitate easy testing. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-29drm/amd/amd_shared.h: Add missing doc for PP_GFX_DCS_MASKMauro Carvalho Chehab1-0/+1
This symbol is missing documentation: drivers/gpu/drm/amd/include/amd_shared.h:224: warning: Enum value 'PP_GFX_DCS_MASK' not described in enum 'PP_FEATURE_MASK' Document it. Fixes: 680602d6c2d6 ("drm/amd/pm: enable DCS") Signed-off-by: Mauro Carvalho Chehab <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-05drm/amdgpu: enable more GFX clockgating features for GC 11.0.0Evan Quan1-0/+1
Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: add FGCG supportEvan Quan1-0/+1
Add the CG flag for Fine Grained Clock Gating. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: add ih v6_0 ip block v2Stanley.Yang1-0/+1
This adds ih v6_0 ip block support. IH is the interrupt handler. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-26drm/amd: add dc feature mask flags for PSR allow smu and multi-display ↵David Zhang1-0/+2
optimizations [Why] Allow for PSR SMU optimization and PSR multiple display optimization. [How] Add feature flags of PSR smu optimization and PSR multiple display optimiztaion, and set them during init sequence. By default, flags are disabled. Signed-off-by: David Zhang <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-08drm/amdgpu: expand cg_flags from u32 to u64Evan Quan1-33/+33
With this, we can support more CG flags. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: suppress the warning about enum value 'AMD_IP_BLOCK_TYPE_NUM'Evan Quan1-0/+1
Suppress the warning below on building htmldocs: drivers/gpu/drm/amd/include/amd_shared.h:103: warning: Enum value 'AMD_IP_BLOCK_TYPE_NUM' not described in enum 'amd_ip_block_type' Fixes: 6ee27ee27ba8 ("drm/amd/pm: avoid duplicate powergate/ungate setting") Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amd/pm: revise the performance level setting APIsEvan Quan1-2/+0
Avoid cross callings which make lock protection enforcement on amdgpu_dpm_force_performance_level() impossible. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13drm/amd/display: Add feature flags to disable LTTPRAurabindo Pillai1-0/+2
[Why] Allow for disabling non transparent mode of LTTPR for running tests. [How] Add a feature flag and set them during init sequence. The flags are already being used in DC. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-22drm/amd/pm: avoid duplicate powergate/ungate settingEvan Quan1-1/+2
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues. Link: https://lore.kernel.org/all/[email protected]/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Signed-off-by: Evan Quan <[email protected]> Tested-by: Borislav Petkov <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-13drm/amd/display: Enable PSR by default on newer DCNNicholas Kazlauskas1-2/+3
[Why] For optimal power savings on panels that can support it. This was previously left disabled by default because of issues with compositors that do not pageflip and scan out directly to the frontbuffer. For these compositors we now have detection methods that wait for x number of pageflips after a full update - triggered by a buffer or format change typically. This may introduce bugs or new cases not tested by users so this is only currently targeting newer DCN. [How] Add code in DM to set PSR state by default for newer DCN while falling back to the feature mask for older. Add a global debug flag that can be set to disable it for either. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add cyan_skillfish asic typeTao Zhou1-0/+1
Add cyan_skillfish asic family. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-29drm/amd/display: Enabling eDP no power sequencing with DAL feature maskZhan Liu1-4/+6
[Why] Sometimes, DP receiver chip power-controlled externally by an Embedded Controller could be treated and used as eDP, if it drives mobile display. In this case, we shouldn't be doing power-sequencing, hence we can skip waiting for T7-ready and T9-ready." [How] Added a feature mask to enable eDP no power sequencing feature. To enable this, set 0x10 flag in amdgpu.dcfeaturemask on Linux command line. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-22Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-0/+6
Backmerging from drm/drm-next to the patches for AMD devices for v5.14. Signed-off-by: Thomas Zimmermann <[email protected]>
2021-05-19drm/amdgpu: Add early fini callbackAndrey Grodzovsky1-0/+2
Use it to call disply code dependent on device->drv_data before it's set to NULL on device unplug v5: Move HW finilization into this callback to prevent MMIO accesses post cpi remove. v7: Split kfd suspend from device exit to expdite HW related stuff to amdgpu_pci_remove v8: Squash previous KFD commit into this commit to avoid compile break. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-13drm/amdgpu: add judgement when add ip blocks (v2)Likun GAO1-0/+6
Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-02-09drm/amd/pm: enable DCSKenneth Feng1-0/+1
Enable DCS V1: Enable Async DCS. V2: Add the ppfeaturemask bit to enable from the modprobe parameter. V3: 1. add the flag to skip APU support. 2. remove the hunk for workload selection since it doesn't impact the function. Signed-off-by: Kenneth Feng <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-04drm/amdgpu: Add GFX Fine Grain Clock Gating flagJinzhou.Su1-0/+1
Add AMD_CG_SUPPORT_GFX_FGCG for FGCG Signed-off-by: Jinzhou.Su <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-27drm/amdgpu: add vangogh apu flagHuang Rui1-0/+1
This patch is to add vangogh apu flag to support more kickers that belongs vangogh series. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-07drm/amdgpu: add Green_Sardine APU flagAlex Deucher1-0/+1
Will be used for Green_Sardine which is a new APU. Signed-off-by: Alex Deucher <[email protected]>
2020-09-25drm/include: add PP_FEATURE_MASK comments (v3)Ryan Taylor1-0/+28
Documents PP_FEATURE_MASK enum. Provides instructions on how to use ppfeaturemasks. v2: improve enum definitions and add kernel command line parameters to ppfeaturemask instructions v3: fix alignment issues Signed-off-by: Ryan Taylor <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-22drm/amdgpu: Add initial kernel documentation for the amd_ip_block_type ↵Ryan Taylor1-25/+62
structure. v3 Added IP block section to amdgpu.rst. Added more documentation to amd_ip_funcs. Created documentation for amd_ip_block_type. v2: Provides a more detailed DOC section on IP blocks v3: Clarifies the IP block list. Adds info on IP block enumeration. Signed-off-by: Ryan Taylor <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-22drm/amdgpu: add apu flags (v2)Alex Deucher1-0/+7
Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-21drm/amd/display: Add DC Debug mask to disable features for bringupHarry Wentland1-0/+7
[Why] At bringup we want to be able to disable various power features. [How] These features are already exposed as dc_debug_options and exercised on other OSes. Create a new dc_debug_mask module parameter and expose relevant bits, in particular * DC_DISABLE_PIPE_SPLIT * DC_DISABLE_STUTTER * DC_DISABLE_DSC * DC_DISABLE_CLOCK_GATING Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-19drm/amdgpu: add JPEG PG and CG interfaceLeo Liu1-0/+2
From JPEG2.0, it will use its own PG/CG Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-19drm/amdgpu: add JPEG IP block typeLeo Liu1-1/+2
From VCN2.0, JPEG2.0 is a separated IP block. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: Add DC feature mask to disable fractional pwmLeo Li1-0/+1
[Why] Some LED panel drivers might not like fractional PWM. In such cases, backlight flickering may be observed. [How] Add a DC feature mask to disable fractional PWM, and associate it with the preexisting dc_config flag. The flag is only plumbed through the dmcu firmware, so plumb it through the driver path as well. To disable, add the following to the linux cmdline: amdgpu.dcfeaturemask=0x4 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204957 Signed-off-by: Leo Li <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Tested-by: Lukáš Krejčí <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/display: add dc feature mask for psr enablementRoman Li1-0/+1
[Why] Adding psr mask to dc features allows selectively disable/enable psr. Current psr implementation may not work with non-pageflipping application. Until resolved it should be disabled by default. [How] Add dcfeaturemask for psr enablement. Disable by default. To enable set amdgpu.dcfeaturemask=0x8 in grub kernel command line. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu/display: add flag for multi-display mclk switchingAlex Deucher1-0/+1
Add a dcfeaturemask flag for mclk switching. Disable by default; enable once the feature has seen more testing. Set amdgpu.dcfeaturemask=2 on the kernel command line in grub to enable this. Acked-by: Evan Quan <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-11drm/amd/powerplay: increase the SMU msg response waiting timeEvan Quan1-1/+1
This is expected to fix some mode1 reset failures. And this affects SMU part only as the timeout setting for other parts is controlled by a different macro. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/powerplay: make athub pg bit configured by pg_flagsHuang Rui1-1/+2
The athub pg features enabling should be indicated by pg_flags. Reported-by: Lijo Lazar <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/mes10.1: add ip block mes10.1 (v2)Jack Xiao1-1/+2
MES takes over the scheduling capability of GFX and SDMA, add MES as a standalone ip. v2: squash in updates (Alex) Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Jack Xiao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu/athub2: enable athub2 clock gatingJack Xiao1-0/+2
Enable athub2 clock gating and light sleep Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu: add flag to support IH clock gatingHawking Zhang1-0/+1
Add new flag for IH (interrupt handler) clockgating. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu: add new HDP CG flagsHawking Zhang1-0/+2
HDP 5.0 supports SRAM power gating. all the LS (Light Sleep)/ DS (Deep Sleep)/SD (Shut Down) modes are supported. However, only one of these modes can be enabled at one time. There is no dynamic power mode switch support. clock/power gating has to be disabled before making any power mode change. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add enable_umd_pstate functions for SMU11Chengming Gui1-0/+3
add enable_umd_pstate to support sys interface for SMU11. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-06drm/amdgpu: add DC feature mask module parameterAlex Deucher1-0/+4
Similar to ppfeaturemask. Allows you to selectively enable/disable DC features. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu:Add DPG support flagJames Zhu1-0/+1
Add DPG support flag for VCN DPG mode. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: add AVFS control to PP_FEATURE_MASKAlex Deucher1-0/+1
Add a ppfeaturemask flag to disable AVFS control. Reviewed-by: Rex Zhu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd: Add sphinx documentation for amd_ip_funcsDarren Powell1-18/+27
Signed-off-by: Darren Powell <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Add stutter mode ctrl in module parameterrex zhu1-0/+1
Enable stutter mode can save power in low DRAM use cases including but not limited to productivity application use, web browsing, and video playback. Currently this feature is disabled by default. Make bit 17 in module parameter amdgpu_pp_feature_mask as stutter mode mask, so user can enable/disable this feature easily. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-24drm/amdgpu: Add CG/PG flags for VCNRex Zhu1-1/+2
Define new clock and powergating flags for VCN block. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: add gfxoff feature maskHuang Rui1-0/+1
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: move PP_FEATURE_MASK to amd_shared headerHuang Rui1-0/+19
It will be used not only for powerplay but also on amdgpu part in future patches. So move it into amd_shared header file. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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