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2023-04-18drm/amd/display: Disable migration to ensure consistency of per-CPU variableTianci Yin1-0/+2
[why] Since the variable fpu_recursion_depth is per-CPU type, it has one copy on each CPU, thread migration causes data consistency issue, then the call trace shows up. And preemption disabling can't prevent migration. [how] Disable migration to ensure consistency of fpu_recursion_depth. Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Tianci Yin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Write TEST_EDID_CHECKSUM_WRITE for EDID testsMikita Lipski1-3/+27
Extract edid's checksum and send it back for verification if EDID_TEST is requested. Signed-off-by: Mikita Lipski <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: remove incorrect early returnAurabindo Pillai1-1/+0
[Why&How] Remove incorrect early return in a device specific fifo reset workaround Reviewed-by: Leo Li <[email protected]> Reviewed-by: Qingqing Zhuo <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Return error code on DSC atomic check failureHersen Wu2-0/+2
[Why&How] We were not returning -EINVAL on DSC atomic check fail. Add it. Fixes: 71be4b16d39a ("drm/amd/display: dsc validate fail not pass to atomic check") Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Hersen Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: add mechanism to skip DCN initEric Yang8-61/+12
[Why] If optimized init is done in FW. DCN init can be skipped in driver. This need to be communicated between driver and fw and maintain backwards compatibility. [How] Use DMUB scratch 0 bit 2 to indicate optimized init done in fw and use DMUB scatch 4 bit 0 to indicate drive supports the optimized flow so FW will perform it. Signed-off-by: Eric Yang <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: set dcn315 lb bpp to 48Dmytro Laktyushkin1-1/+1
[Why & How] Fix a typo for dcn315 line buffer bpp. Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: limit timing for single dimm memoryDaniel Miess1-0/+20
[Why] 1. It could hit bandwidth limitdation under single dimm memory when connecting 8K external monitor. 2. IsSupportedVidPn got validation failed with 2K240Hz eDP + 8K24Hz external monitor. 3. It's better to filter out such combination in EnumVidPnCofuncModality 4. For short term, filter out in dc bandwidth validation. [How] Force 2K@240Hz+8K@24Hz timing validation false in dc. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Improvement for handling edp link training failsJingwen Zhu2-8/+16
[Why] The eDP retrain will cause the DPCD 300 to be reset to default. And cause the brightness can't be set correctly. [How] delete the call to edp panel power control in both enable_link_output/disable_link_output entirely and only call edp panel control in enable_link_dp and  disable_link_dp once. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Jingwen Zhu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Apply correct panel mode when reinitializing hardwareMichael Mityushkin3-1/+6
[Why] When link training during engine recovery, ASSR might fail causing panel mode to be reset to default. This should not happen for eDP as it will prevent the panel from turning back on. [How] Added dp_panel_mode to struct dc_link to remember previously applied panel mode. Do not reset panel mode to default while performing link training if previously used panel mode = eDP. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Michael Mityushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: add extra dc odm debug optionsDmytro Laktyushkin2-0/+7
[Why & How] Add options for dc odm debug. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: fix a divided-by-zero errorAlex Hung1-0/+4
[Why & How] timing.dsc_cfg.num_slices_v can be zero and it is necessary to check before using it. This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI". Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: [FW Promotion] Release 0.0.162.0Anthony Koo1-3/+6
- Add DMUB_CMD__IDLE_OPT_DCN_NOTIFY_IDLE command - Remove d3 entry event and instead check for stream mask - dmu: Enable timeout recovery and detection for p-state Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Enable FPO + VactiveAlvin Lee2-2/+2
[Description] - Enable FPO + Vactive Reviewed-by: George Shen <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Set watermarks set D equal to AAlvin Lee1-0/+5
[Description] - Since we do not use optimized watermark settings for MALL, set D = A - PMFW uses Set D for d0i3.1, so driver should make D = A for the time being - If we choose to optimize in the future we can set watermarks D correctly Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Correct output color space during HW reinitializeMichael Mityushkin3-0/+6
[Why] Doing core_link_disable_stream or set_dpms_off when reinitializing hardware causes issue to repro with external display connected. This is unnecessary, blanking pixel data should be sufficient. [How] Call disable_pixel_data while reinitializing hardware instead of core_link_disable_stream or set_dpms_off. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Michael Mityushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: DSC policy override when ODM combine is forcedNasir Osman2-1/+10
[why] When we force ODM combine with DSC, we lose several 8 bit and 10 bit modes in validation and thus not able to use HDR. This is due to the number of horizontal slices used in DSC not properly being accounted for currently when 2:1 ODM Combine is forced. [how] Enforce at least two horizontal slices are used for DSC when ODM combine is forced. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Nasir Osman <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Adding support for VESA SCRIswara Nagulendran3-5/+40
[HOW&WHY] Write DPCD 721 bit 7 to high, and the appropriate luminance level to DPCD 734-736 if bit 4 from DPCD register 734 is high, indicating that the panel luminance control is enabled from the panel side. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Iswara Nagulendran <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Add FAMS validation before trying to use itRodrigo Siqueira4-2/+14
To ensure that FAMS can be used, DC must check if there is VRR support. This commit adds the required configuration to ensure FAMS can be executed in the target system. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: fix access hdcp_workqueue assertHersen Wu2-6/+16
[Why] hdcp are enabled for asics from raven. for old asics which hdcp are not enabled, hdcp_workqueue are null. some access to hdcp work queue are not guarded with pointer check. [How] add hdcp_workqueue pointer check before access workqueue. Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Hersen Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: drain dmub inbox if queue is fullJosip Pavic1-0/+9
[Why & How] If dmub command queuing fails due to the inbox being full, flush the inbox and resubmit the comamnd. This was previously the default behavior but was lost in a refactor. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: refactor dmub commands into single functionJosip Pavic26-283/+148
[Why & How] Consolidate dmub access to a single interface. This makes it easier to add code in the future that needs to run every time a dmub command is requested (e.g. instrumentation, locking etc). Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Reduce SubVP + DRR stretch marginAlvin Lee1-1/+1
[Description] - Having excessively large margin causes failure in the static schedulability check in some cases for SubVP + DRR - 100us of DRR margin is sufficient based on a weeks worth of stress testing on different display configs Reviewed-by: Michael Strauss <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Only consider DISPCLK when using optimized boot pathAlvin Lee1-3/+3
[Description] - Previous bug fix for audio issue included dtbclk and p-state on the optimized boot path which is incorarect - We only care about DISPCLK in the optimized vs. non-optimized boot path to avoid audio issues Reviewed-by: Saaem Rizvi <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: update max streams per surfaceDmytro Laktyushkin1-1/+1
Increse to 6 as that is the max surfaces supported asics can have. The is no practical use case yet, but this is valuable for pre-si validation. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: fix memleak in aconnector->timing_requestedHersen Wu1-3/+6
[Why] when amdgpu_dm_update_connector_after_detect is called two times successively with valid sink, memory allocated of aconnector->timing_requested for the first call is not free. this causes memeleak. [How] allocate memory only when aconnector->timing_requested is null. Reviewed-by: Qingqing Zhuo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Hersen Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Fix hang when skipping modesetAurabindo Pillai2-1/+7
[Why&How] When skipping full modeset since the only state change was a front porch change, the DC commit sequence requires extra checks to handle non existant plane states being asked to be removed from context. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Fix in disabling secure displayAlan Liu1-18/+13
[Why] Currently we don't check if secure display is enabled before we send command to disable secure display in dmub. It will accidentally cause some other igt tests to fail, eg, crtc-linear-degamma. [How] Refactor the code we reset the secure display state to check secure display was enabled or not before stopping it in dmub. Reviewed-by: Wayne Lin <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alan Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: set variable dccg314_init storage-class-specifier to staticTom Rix1-1/+1
smatch reports drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_dccg.c:277:6: warning: symbol 'dccg314_init' was not declared. Should it be static? This variable is only used in one file so should be static. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: allow edp updates for virtual signalAlex Hung1-0/+1
[Why] When IGT's kms_hdmi_inject forces EDID for HDMI audio, dc rejects the request because virtual signal is not in dc_is_audio_capable_signal function. [How] Includes SIGNAL_TYPE_VIRTUAL as audio capable. Reviewed-by: Chao-kai Wang <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Wenchieh Chien <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Use pointer in the memcpyRodrigo Siqueira1-1/+1
Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: copy dmub caps to dc on dcn31Josip Pavic1-0/+4
[Why & How] Add code path to copy dmub caps to dc, which is missing on dcn31 Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Remove wrong assignment of DP link rateRodrigo Siqueira1-1/+0
Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Add missing WA and MCLK validationRodrigo Siqueira3-2/+19
When the commit fff7eb56b376 ("drm/amd/display: Don't set dram clock change requirement for SubVP") was merged, we missed some parts associated with the MCLK switch. This commit adds all the missing parts. Fixes: fff7eb56b376 ("drm/amd/display: Don't set dram clock change requirement for SubVP") Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Set dp_rate to dm_dp_rate_na by defaultRodrigo Siqueira1-2/+1
Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Block optimize on consecutive FAMS enablesWesley Chalmers2-3/+22
[WHY] It is possible to commit state multiple times in rapid succession with FAMS enabled; if each of these commits were to set optimized_required, then the user may see latency. [HOW] fw_based_mclk_switching is currently not used in dc->clk_mgr; use it to track whether the current state has FAMS enabled; if it has, then do not disable FAMS in prepare_bandwidth, and do not set optimized_required. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wesley Chalmers <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Do not set drr on pipe commitWesley Chalmers2-0/+13
[WHY] Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a pipe commit can cause underflow. [HOW] Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets optimized_required. This change expects that Freesync requests are blocked when optimized_required is true. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wesley Chalmers <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Fix ABM pipe/backlight issues when change backlightLeon Huang1-17/+47
[Why] set ABM pipe/backlight gets some issues when abm callback func pointers are NULL. For some usecase, driver would like to control PWM level before ABM resource is ready. However, recent flow refactor of ABM didn't consider that use case. [How] Rollback flow that sending inbox command to dmub directly when ABM function pointers aren't ready. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Leon Huang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Check & log if receiver supports MST, DSC & FEC.Srinivasan Shanmugam1-0/+16
After reading from receiver via DPCD, check & log if it supports MST, DSC & FEC Cc: Aurabindo Pillai <[email protected]> Cc: Fangzhi Zuo <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Unconditionally print when DP sink power state failsSrinivasan Shanmugam1-3/+1
The previous 'commit ca9beb8aac68 ("drm/amd/display: Add logging when setting DP sink power state fails")', it is better to unconditionally print "failed to power up sink", because we are returning DC_ERROR_UNEXPECTED. Fixes: ca9beb8aac68 ("drm/amd/display: Add logging when setting DP sink power state fails") Cc: Aurabindo Pillai <[email protected]> Cc: Fangzhi Zuo <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Refactor ABM featureLeon Huang5-162/+442
[Why] Refactor ABM feature and implement inbox command for DMUB. [How] Implement the ioctl to send inbox command to DMUB. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Leon Huang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Set maximum VStartup if is DCN201Rodrigo Siqueira1-0/+2
Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Adjust code identation and other minor detailsRodrigo Siqueira2-105/+109
This commit replaces spaces with tabs in multiple functions and adjusts the indentation in some other parts of the code to improve readability. Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Add missing mclk updateRodrigo Siqueira1-0/+5
When using FPO, there is some misconfiguration that happens for the lack of configuration of the MCLK switch in some circumstances. This commit adds the required field update when using the MCLK switch. Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-18drm/amd/display: Update bouding box values for DCN32Rodrigo Siqueira1-3/+3
All clock values came from firmware, but bounding box values can be helpful in some debug situations. This commit updates some of the values associated with clock speed and memory channels. Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-14drm/amd/display: Add logging when DP link training Clock recovery is SuccessfulSrinivasan Shanmugam2-1/+5
Log when Clock recovery is successful, as part of DP link training process. Cc: Aurabindo Pillai <[email protected]> Cc: Fangzhi Zuo <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-14drm/amd/display: Add logging when setting DP sink power state failsSrinivasan Shanmugam1-0/+3
Log if we fail to setup sink power states. Cc: Fangzhi Zuo <[email protected]> Cc: Aurabindo Pillai <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-12drm/amd/display: Pass the right info to drm_dp_remove_payloadWayne Lin1-7/+50
[Why & How] drm_dp_remove_payload() interface was changed. Correct amdgpu dm code to pass the right parameter to the drm helper function. Reviewed-by: Jerry Zuo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-11drm/amd/display: Add logging for DP link traning Test Pattern SeqeuncesSrinivasan Shanmugam1-0/+9
Add some more logging for DP link traning test pattern seqeunces for better debugging. Cc: Fangzhi Zuo <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Fangzhi Zuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-11drm/amd/display : Log DP link training downspread infoSrinivasan Shanmugam1-6/+8
Update the existing log with DP LT downspread info: [Downstream devices shall support down spreading of the link clock. The down-spread amplitude shall either be disabled (0.0%) or up to 0.5%, as written by the upstream device to the DOWNSPREAD_CTRL register (DPCD 00107h). The modulation frequency range shall be 30 to 33 kHz] Besides, fix checkpatch warning: CHECK: Alignment should match open parenthesis Cc: Mario Limonciello <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-11drm/amd/display: remove unused matching_stream_ptrs variableTom Rix1-4/+1
clang with W=1 reports drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_enc_cfg.c:625:6: error: variable 'matching_stream_ptrs' set but not used [-Werror,-Wunused-but-set-variable] int matching_stream_ptrs = 0; ^ This variable is not used so remove it. Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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