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path: root/drivers/gpu/drm/amd/display/modules
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2021-10-28drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1Ahmad Othman1-0/+2
[Why] Created new fields that matches new B0 structs On DCN31 the mapping of DIO output to PHY differs from A0 to B0 boards with new PHY C20 & this new mapping needed to be handled. [How] Mapped new structure based on new structs Added logic for mapping over A0 and B0 boards Hooked all new structs together. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Ahmad Othman <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: Get ceiling for v_total calcGuo, Bing1-3/+12
Updating certain variable blanking calculations to use ceiling function. Reviewed-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Bing Guo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Revert adding degamma coefficientsJaehyun Chung1-39/+25
[Why] Degamma coefficients are calculated in our degamma formula using the regamma coefficients. We do not need to add separate degamma coefficients. [How] Remove the change to add separate degamma coefficients. Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Jaehyun Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Correct degamma coefficientsJaehyun Chung1-1/+1
[Why] Some incorrect coefficients were being used Reviewed-by: Michael Strauss <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Jaehyun Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709Jaehyun Chung1-20/+40
[Why] In YUV case, need to set the input TF to sRGB instead of BT709, even though the input TF type is distributed. SRGB was not being used because pixel format was not being set in the surface update sequence. Also, we were using the same coefficients for degamma and regamma formula, causing the cutoff point of the linear section of the curve to be incorrect. [How] Set pixel format in the surface update sequence. Add separate coefficient arrays for regamma and degamma. Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Jaehyun Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-18drm/amd: consolidate TA shared memory structuresCandice Li1-28/+28
Signed-off-by: Candice Li <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-09drm/amd/display: add authentication_complete in hdcp outputWenjing Liu7-79/+93
[why] DM needs to be notified when hdcp module has completed authentication attempt. Reviewed-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Anson Jacob <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amd/display: remove unused functionsWenjing Liu6-50/+21
[why] It has been decided that opm state query support will be dropped. Therefore link encryption enabled and save current encryption states won't be used anymore and there are no foreseeable usages in the future. We will remove these two interfaces for clean up. Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amd/display: add update authentication interfaceWenjing Liu2-6/+69
[why] Previously to toggle authentication, we need to remove and add the same display back with modified adjustment. This method will toggle DTM state without actual hardware changes. This is not per design and would cause potential issues in the long run. [how] We are creating a dedicated interface that does the same thing as remove and add back the display without changing DTM state. Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-22drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCNAlex Deucher4-37/+6
No need for a separate flag now that DCN3.1 is not in bring up. Fold into DRM_AMD_DC_DCN like previous DCN IPs. Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amd/display: tune backlight ramping profilesJosip Pavic1-10/+10
[Why & How] Tune backlight ramping profiles for each Vari-Bright level to suit customer preferences Signed-off-by: Josip Pavic <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-08drm/amd/display: delay 100ms before restart after failing to read CP_IRQWenjing Liu1-1/+1
[why] Some DPRX will issue CP_IRQ when user disconnects a display that has been authenticated. Since display is being disconnecting dpcd read will fail. This will cause us to attempt HDCP retry on disconnection. We are adding a 100ms delay before retry. So we will only start retry if within 100ms there is no disconnection call to HDCP module. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04drm/amd/display: Add DCN3.1 HDCP supportNicholas Kazlauskas4-4/+196
New DTM interface is V3 and we need to extend our existing support to enable HDCP on DCN3.1. Version the helpers and fallback to the older versions on failure in the new interfaces. Acked-by: Huang Rui <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-01drm/amd/display: Avoid HDCP over-read and corruptionKees Cook1-1/+3
Instead of reading the desired 5 bytes of the actual target field, the code was reading 8. This could result in a corrupted value if the trailing 3 bytes were non-zero, so instead use an appropriately sized and zero-initialized bounce buffer, and read only 5 bytes before casting to u64. Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-27drm/amd/display/modules/hdcp/hdcp_psp: Remove unused function ↵Lee Jones1-13/+0
'mod_hdcp_hdcp1_get_link_encryption_status()' Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:374:22: warning: no previous prototype for ‘mod_hdcp_hdcp1_get_link_encryption_status’ [-Wmissing-prototypes] Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-27drm/amd/display: disable desktop VRR when using older flip modelhvanzyll1-10/+19
[WHY] OS uses older flip model which does not work with desktop VRR causing memory allocations at the wrong IRQ level. [HOW] Checks added to flip model to verify model is 2.2 or greater when doing any of the desktop VRR checks for full updates. This prevents full updates when VRR changes until a mode change. Signed-off-by: Harry VanZyllDeJong <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-27drm/amd/display: Added support for individual control for multiple ↵Jake Wang2-8/+10
back-light instances. [Why & How] Added support for individual control for multiple back-light instances. Signed-off-by: Jake Wang <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28drm/amd/display: avoid to authentication when DEVICE_COUNT=0Yu-ting Shen2-0/+10
[why] we don't support authentication with DEVICE_COUNT=0 [how] check value DEVICE_COUNT before doing authentication Signed-off-by: Yu-ting Shen <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-28drm/amd/display: fix HDCP reset sequence on reinitializeBrandon Syu1-1/+0
[why] When setup is called after hdcp has already setup, it would cause to disable HDCP flow won’t execute. [how] Don't clean up hdcp content to be 0. Signed-off-by: Brandon Syu <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-20drm/amd/display: Always poll for rxstatus in authenticateNicholas Kazlauskas2-4/+0
[Why] Requirement from the spec - we shouldn't be potentially exiting out early based on encryption status. [How] Drop the calls from HDCP1 and HDCP2 execution that exit out early based on link encryption status. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-20drm/amd/display: add handling for hdcp2 rx id list validationDingchen (David) Zhang1-0/+2
[why] the current implementation of hdcp2 rx id list validation does not have handler/checker for invalid message status, e.g. HMAC, the V parameter calculated from PSP not matching the V prime from Rx. [how] return a generic FAILURE for any message status not SUCCESS or REVOKED. Signed-off-by: Dingchen (David) Zhang <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/display: Fixed corruption on 4K tvsHarry VanZyllDeJong1-2/+2
[WHY] When on the desktop freesync is not enabled, doing a frame stretch causes the TV to display undesired output. [HOW] By changing the logic so that when ever fresync is supported the TV is notified we are in fressync instead on a non fresync state. Signed-off-by: Harry VanZyllDeJong <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09amd: display: modules: Remove repeated struct declarationWan Jiabing1-2/+0
struct mod_hdcp is declared twice. One is declared at 33rd line. The blew one is not needed. Remove the duplicate. Signed-off-by: Wan Jiabing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/display: Rename fs_params to hdr_tm_paramsKrunoslav Kovac2-5/+5
[Why&How] Renaming structure to better indicate its meaning. Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Anson Jacob <[email protected]> Acked-by: Anthony Koo <[email protected]> Tested-by: Dan Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/display: add mod hdcp interface for supporting encryption state queryWenjing Liu7-29/+54
Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Dan Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/display: define mod_hdcp_display_disable_option structWenjing Liu2-4/+10
Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Dan Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amd/display: Change input parameter for set_drrAlvin Lee2-12/+32
[Why] Change set_drr to pass in the entire dc_crtc_timing_adjust structure instead of passing in the parameters individually. This is to more easily pass in required parameters in the adjust structure when it gets updated. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-02drm/amd/display: Add flag for building infopacketMax.Tseng2-3/+28
[why] Add flag to build infopacket in SDP v1.3 format Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Max.Tseng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-02-09drm/amd/display: DP HDCP Compliance 1A-08/09 tests failQingqing Zhuo1-0/+2
[Why] Current implementation of mod_hdcp_hdcp2_validate_ake_cert() does not process HDCP status message TA_HDCP2_MSG_AUTHENTICATION_STATUS__SIGNATURE_CERTIFICAT_ERROR. As a result, when there is a signature certificate error, mod_hdcp_hdcp2_validate_ake_cert would return the default status, which is success. [How] For all messages other than TA_HDCP2_MSG_AUTHENTICATION_STATUS__SUCCESS and TA_HDCP2_MSG_AUTHENTICATION_STATUS__RECEIVERID_REVOKED, return status as failure. Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Anson Jacob <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-02-02drm/amd/display: fix calculation for the pwl backlight curveAnthony Koo1-1/+1
[Why] The PWL backlight curve is used by the firmware to convert between brightness and linear PWM value. Driver has a backlight LUT, but the firmware holds a PWL curve and interpolates between points. The calculations are incorrect leading to slightly off backlight values being programmed. [How] Fix the PWL backlight curve threshold/offset calculations Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Josip Pavic <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-02-02drm/amd/display: correct some hdcp variable namingWenjing Liu3-4/+4
[why] In HDCP update stream config interface, some variables are named as xxx_supported, but in fact the variable indicates whether or not xxx_enabled. Correct the naming so it is less confusing to read the code. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-01-25drm/amd/display: change license of color_table.cJonathan Gray1-5/+21
Change the license of color_table.c to match color_table.h granting permission to modify and distribute. Signed-off-by: Jonathan Gray <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-01-14drm/amd/display/modules/info_packet/info_packet: Correct kernel-doc formattingLee Jones1-9/+4
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/modules/info_packet/info_packet.c:412: warning: Cannot understand ***************************************************************************** Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-01-14drm/amd/display/modules/power/power_helpers: Staticify local functionsLee Jones1-3/+3
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:281:6: warning: no previous prototype for ‘fill_iram_v_2’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:455:6: warning: no previous prototype for ‘fill_iram_v_2_2’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:601:6: warning: no previous prototype for ‘fill_iram_v_2_3’ [-Wmissing-prototypes] Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/display: gradually ramp ABM intensityRizvi2-10/+26
[Why] Need driver to pass values of backlight ramp start and ramp reduction so that intensity can be ramped down appropriately. [How] Using abm_parameters structure to get these values from driver. Signed-off-by: Rizvi <[email protected]> Acked-by: Bindu Ramamurthy <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/display: Modify the hdcp device count check conditionMartin Tsai2-4/+11
[why] Some MST display may not report the internal panel to DEVICE_COUNT, that makes the check condition always failed. [how] To update this condition with the reported device count + 1 (because the immediate repeater's internal panel is possibly not included in DEVICE_COUNT) Signed-off-by: Martin Tsai <[email protected]> Acked-by: Bindu Ramamurthy <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-15drm/amd/display: Fix OGAM LUT calculation precisionFelipe1-5/+17
[Why] The OGAM LUT precision was accumulating too much error in the higher end. [How] Instead of calculating all points of the LUT in relation to the previous ones, perform a full calculation in one of the intermediate segments to stop error propagation. Signed-off-by: Felipe Clark <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-08drm/amd/display: Set FixRate bit in VSIF V3AMD\ramini1-4/+8
[Why] Signal FreeSync display that we are in Fixed Rate mode, and expand the FreeSync range to 1024. [How] Set the new bit in SB16:bit0, and augment the min and max refresh rate with 2 extra bits. Signed-off-by: AMD\ramini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-08drm/amd/display: Implement VSIF V3 extended refresh rate featureReza Amini1-18/+82
[Why] Implement feature of VSIF V3 [How] Set refresh rate MSB for extended range Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-04drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher1-4/+4
Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
2020-11-02drm/amd/display: set hdcp1 wa re-auth delay to 200msJake Wang1-1/+1
[Why] Fail and restart timing for HDCP1 retry occurs too quickly. This would cause some MST monitors to show black screen. [How] Adjusted timing of fail and restart to 200ms. Signed-off-by: Jake Wang <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-01drm/amdgpu: fix build_coefficients() argumentArnd Bergmann1-1/+1
gcc -Wextra warns about a function taking an enum argument being called with a bool: drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In function 'apply_degamma_for_user_regamma': drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29: warning: implicit conversion from 'enum <anonymous>' to 'enum dc_transfer_func_predefined' [-Wenum-conversion] 1617 | build_coefficients(&coeff, true); It appears that a patch was added using the old calling conventions after the type was changed, and the value should actually be 0 (TRANSFER_FUNCTION_SRGB) here instead of 1 (true). Fixes: 55a01d4023ce ("drm/amd/display: Add user_regamma to color module") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-30drm/amd/display: remove unneeded semicolonTom Rix1-1/+1
A semicolon is not needed after a switch statement. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-26drm/amd/display: combined user regamma and OS GAMMA_CS_TFM_1DDerek Lai2-4/+14
[Why] For user regamma we're missing this function call to combine user regamma + OS for GAMMA_CS_TFM_1D type. [How] Applied 1D LUT in the mod_color_build_user_regamma. And Set the regamma dirty as updateGamma. Signed-off-by: Derek Lai <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-26drm/amd/display: Fix max brightness pixel accuracyFelipe Clark1-21/+89
[WHY] It was detected in some Freesync HDR tests that displays were not reaching their maximum nominal brightness. [HOW] The Multi-plane combiner (MPC) Output Gamma (OGAM) block builds a discrete Lookup Table (LUT). When the display's maximum brightness falls in between two values, having to be linearly interpolated by the hardware, rounding issues might occur that will cause the display to never reach its maximum brightness. The fix involves doing the calculations backwards, ensuring that the interpolation in the maximum brightness values translates to an output of 1.0. Signed-off-by: Felipe Clark <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-05drm/amd/display: FreeSync not active near lower bound of non-LFC monitor rangeAric Cyr1-4/+6
[Why] On narrow range monitors without LFC, a margin prevents good utilization of the available range. [How] Decrease the margin for exiting fixed mode and fix the frame counter to reset if a non-consecutive render is found. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-05drm/amd/display: Fixed comments (uniform style)Felipe1-22/+23
[WHY] This change was implemented because the comment style was not uniform across the file. In some lines comments were initiated with // and in others they were in between /* ... */. Additionally, the style for multi-line comments was also not uniform and some comment lines were missing the space between the opening /* and the first word of the comment. [HOW] All comments are now in between /*.../*, multi line comments also use /*...*/ and for every comment there is now a space between the opening /* and the first word of the comment. Signed-off-by: Felipe <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/display: Don't log hdcp module warnings in dmesgBhawanpreet Lakha1-1/+1
[Why] DTM topology updates happens by default now. This results in DTM warnings when hdcp is not even being enabled. This spams the dmesg and doesn't effect normal display functionality so it is better to log it using DRM_DEBUG_KMS() [How] Change the DRM_WARN() to DRM_DEBUG_KMS() Signed-off-by: Bhawanpreet Lakha <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Don't use DRM_ERROR() for DTM add topologyBhawanpreet Lakha1-1/+1
[Why] Previously we were only calling add_topology when hdcp was being enabled. Now we call add_topology by default so the ERROR messages are printed if the firmware is not loaded. This error message is not relevant for normal display functionality so no need to print a ERROR message. [How] Change DRM_ERROR to DRM_INFO Signed-off-by: Bhawanpreet Lakha <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Fix CP_IRQ clear bit and logicHarmanprit Tatla2-11/+8
[Why] Currently clearing the wrong bit for CP_IRQ, and logic on when to clear needs to be fixed. [How] Corrected bit to clear and improved logic for decision to clear. Signed-off-by: Harmanprit Tatla <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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