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path: root/drivers/gpu/drm/amd/display/include
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2019-10-10drm/amd/display: add new active dongle to existent w/aVitaly Prosyak1-0/+2
[Why & How] Dongle 0x00E04C power down all internal circuits including AUX communication preventing reading DPCD table. Encoder will skip DP RX power down on disable output to keep receiver powered all the time. Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-03drm/amd/display: Add HDCP moduleBhawanpreet Lakha1-0/+96
This module manages HDCP for amdgpu driver. The module behaves as a state machine which handles the different authentication states of HDCP The module is divided into 3 major components +--------+ | Hdcp.c | +--------+ Manages the state machine, sends the events to be executed and communicates with the dm +-----------+ |Execution.c| +-----------+ This executes events based on the current state. Also generates execution results as transition inputs +------------+ |Transition.c| +------------+ Decides the next state based on the input and makes requests to hdcp.c to handle. +-------------+ ------> | Execution.c | ------ | +-------------+ | | V +----+ +--------+ +--------------+ | DM | -----> | Hdcp.c | <------------ | Transition.c | +----+ <----- +--------+ +--------------+ v2: Drop unused function definitions Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-09-16drm/amd/display: add Asic ID for DaliBhawanpreet Lakha1-2/+5
Dali is a new asic revision based on raven2 Add the ID and ASICREV_IS_DALI define Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: add dal_asic_id for renoirBhawanpreet Lakha1-0/+5
Add the rev id for renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Handle Renoir in DCBhawanpreet Lakha1-0/+3
add Renoir DCN version in DC and handle it Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: refactor Device ID for external chipsQingqing Zhuo1-4/+6
IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-15drm/amd/display: Add Logging for Gamma Related information (2/2)Wyatt Wood1-0/+6
[Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-15drm/amd/display: Add Logging for Gamma Related information (1/2)Wyatt Wood2-0/+3
[Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add new log types and logging code to the color module. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-15drm/amd/display: refactor gpio to allocate hw_container in constructorSu Sung Chung1-0/+9
[why] if dynamic allocation fails during gpio_open, it will cause crash due to page fault. [how] handle allocation when gpio object gets created and prevent from calling gpio_open if allocation failed Signed-off-by: Su Sung Chung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-02drm/amd/display: Add ASICREV_IS_NAVI macrosLeo Li1-1/+3
They are used by DC to determine ASIC revs. Signed-off-by: Leo Li <[email protected]> Reviewed-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amd/display: handle active dongle port type is DP++ or DP caseDale Zhao1-1/+1
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as default DVI case, in which audio is disabled. Because of dual mode, DP case is also treat as DVI case for the other port. [How]: According DP 1.4 spec, add DP++ procedure similar with HDMI case. Also add None dongle type for DP case. Signed-off-by: Dale Zhao <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amd/display: Hook up calls to do stereo mux and dig programming to ↵Murton Liu1-1/+17
stereo control interface [Why] Implementation of stereo mux register is complete, but unused. Need to call functions to write relevant configs. [How] Add function to write stereo config for enable/disable case and call in stereo control interface. Signed-off-by: Murton Liu <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amd/display:Use Pixel clock in 100Hz units for HDMI Audio wall clock DTONevenko Stupar1-2/+2
[Why] -Pass and use pixel clock in 100 Hz to Audio for HDMI audio DTO for Audio wall clock programming so audio DTO gets increased precision for timings with /1001 factor. -For HDMI TMDS for N and CTS ACR tables are based on 10 KHz units, these does not need to be modified as N and CTS values are still valid using current tables. Signed-off-by: Nevenko Stupar <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amd/display: Add ability to set preferred link training parameters.David Galiffi1-7/+10
[WHY] To add support for OS requirement to set preferred link training parameters. [HOW] Create new structure of dp link training overrides. During link training processes, these values should be used instead of the default training parameters. Signed-off-by: David Galiffi <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amd/display: add ASICREV defines v2Bhawanpreet Lakha1-0/+8
Add revs for navi10 and 14. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policyWenjing Liu1-168/+0
[why] Current policy assumes virtual DPCD peer device as an individual MST branch device with 1 input and 1 output. However this is only true for virtual DP-to-DP peer device. In general there are three types of virtual DP peer devices. 1. Sink peer device with virtual DPCD. 2. Virtual DP-to-DP Peer device with virtual DPCD. 3. Virtual DP-to-HDMI Protocol Converter Peer Device with Virtual DPCD. So we should break the assumption and handle all three types. [how] DP-to-DP peer device will have virtual DPCD cap upstream. Sink peer device will have virtual DPCD on the logical port. Dp to HDMI protocol converter peer device will have virtual DPCD on its converter port. For DSC capable Synaptics non VGA port we workaround by enumerating a virutal DPCD peer device on its upstream even if it doesn't have one. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: add dsc_passthrough_support bit in dpcd structWenjing Liu1-3/+3
Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: [backport] dwb dm + efc supportCharlene Liu1-0/+1
dwb fixes. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Duke Du <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: Create DWB resource for DCN2Charlene Liu1-0/+3
[Description] dcn20 has num_dwb =1 in the res cap, but not created. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Duke Du <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: Add support for extended DSC DPCD capsNikola Cornij1-0/+168
[why] A few of the new DSC DPCD caps were introduced by a DP 1.4a SCR in order to give DSC branch decoders a chance to expose their maximum throughput and maximum line width limitations. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amd/display: Add DSC support for Navi (v2)Harry Wentland1-0/+6
Add support for DCN2 DSC (Display Stream Compression) HW Blocks: +--------++------+ +----------+ | HUBBUB || HUBP | <-- | MMHUBBUB | +--------++------+ +----------+ | ^ v | +--------+ +--------+ | DPP | | DWB | +--------+ +--------+ | v ^ +--------+ | | MPC | | +--------+ | | | v | +-------+ +-------+ | | OPP | <--> | DSC | | +-------+ +-------+ | | | v | +--------+ / | OPTC | -------------- +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ v2: rebase (Alex) Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amd/display: Add DCN2 and NV ASIC IDHarry Wentland2-0/+9
DCN2.0 (Display Core Next) is the display block in Navi10. Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-31drm/amd/display: make clk mgr soc specificEric Yang1-5/+6
[Why] First step of refactoring clk mgr to better handle different ways of handling clock operations. Clock operation policies are soc specific and not just DCN vesion specific. It is not a hw resource, should not be in the resource pool. [How] Change clock manager creation to be based on HW internal ID, rename clock manager members to be more clear. Move clock manager out of resource. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-24drm/amd/display: Drop DCN1_01 guardsHarry Wentland2-6/+0
[WHY] These were only needed for bringup. They're not needed anymore. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-24drm/amd/display: Add ASICREV_IS_PICASSOHarry Wentland1-3/+4
[WHY] We only want to load DMCU FW on Picasso and Raven 2, not on Raven 1. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-05-24drm/amd/display: Define Byte 14 on AVI InfoFrameChris Park1-1/+4
[Why] Part of HDMI 2.1 requires AVI InfoFrame version update from current V2 to V4 for new colorimetry. [How] Define V4 AVI InfoFrame ACE0-ACE3 bit. Signed-off-by: Chris Park <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-24drm/amd/display: block passive dongle EDID Emulation for USB-C portsSamson Tam1-1/+2
[Why] Emulating passive dongle on USB-C port causes issue on some asics. [How] Check for DP_IS_USB_C flag in bios parser and propagate it to encoder features flags. If DP_IS_USB_C flag is set and it is trying to emulate passive dongle, then return fail. Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-24drm/amd/display: Set dispclk and dprefclock directlyEric Yang1-1/+2
[Why] To simply logic for setting DCN specific clocks, we will send SMU message directly through the VBIOS message box. [How] Add new structure in pp_smu to hold functions to set clocks through vbios message box Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Rename is_hdmi to is_hdmi_tmds typeEric Bernstein1-0/+5
HDMI has TMDS and FRL signal types. Be specific about what is used. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Add function to create 4d19 fixed pointTyler DiBattista1-0/+2
[Why] Implemented for future use Signed-off-by: Tyler DiBattista <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: remove screen flashes on seamless bootAnthony Koo1-0/+3
[Why] We want boot to desktop to be seamless [How] During init pipes, avoid touching the pipes where GOP has already enabled the HW to the state we want. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-05drm/amd/display: add gpio lock/unlockChiawen Huang1-0/+8
[Why] When querying HPD via GPIO flow, it will create a new gpio object then free in the end of query. There is a irql issue for HPD querying at ISR level. [How] Therefore, creating the HPD gpio object in dc_link and set it as unlcok in default. 1. reducing unnecessary malloc/free when HPD querying. 2. reducing init GPIO flow. 3. add lock/unlock to prevent multi gpio service running. Signed-off-by: Chiawen Huang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amd/display: Remove i2caux folderDavid Francis1-23/+0
[Why] It is huge, unmaintainable, needlessly layered, and obsolete [How] Remove it. All of it. Also remove the i2caux struct in dc_context and the code that created and destructed it Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amd/display: Shift dc link aux to aux_payloadDavid Francis1-0/+10
[Why] aux_payload should be the struct used inside dc to start aux transactions. This will allow the old aux interface to be seamlessly replaced. [How] Add three fields to aux_payload: reply, mot, defer_delay This will mean that aux_payload has all data required to submit a request. Shift dc_link to use this struct Signed-off-by: David Francis <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amd/display: Use 100 Hz precision for pipe pixel clocksKen Chalmers1-2/+2
[Why] Users would like more accurate pixel clocks, especially for fractional "TV" frame rates like 59.94 Hz. [How] Store and communicate pixel clocks with 100 Hz accuracy from dc_crtc_timing through to BIOS command table setpixelclock call. Signed-off-by: Ken Chalmers <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-18drm/amd/display: Add functionality to get XGMI SS infoLeo Li1-0/+1
[Why] When XGMI is enabled, the DP reference clock needs to be adjusted according to the XGMI spread spectrum percentage and mode. But first, we need the ability to fetch this info. [How] Within the BIOS parser, Read from vBIOS when XGMI SS info is requested. In addition, diags build uses include_legacy/atomfirmware.h for the smu_info_v3_3 table headers. Update that as well. Signed-off-by: Leo Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-18drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20Leo Li1-0/+1
[Why] We'll need a way to differentiate Vega 20 in DC [How] Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if the ASIC used is a Vega 20. Signed-off-by: Leo Li <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/display: Add a check-function for virtual signal typeNikola Cornij1-0/+5
[why] Same functions exist for all other signal types. [how] Add a function that checks against virtual signal type. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amd/display: Add Raven2 definitions in dcBhawanpreet Lakha2-0/+10
Add Raven2 definitions in the dc code Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amd/display: Support reading hw state from debugfs fileNicholas Kazlauskas2-3/+9
[Why] Logging hardware state can be done by triggering a write to the debugfs file. It would also be useful to be able to read the hardware state from the debugfs file to be able to generate a clean log without timestamps. [How] Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log Threading is an obvious concern when dealing with multiple debugfs operations and blocking on global state in dm or dc seems unfavorable. Adding an extra parameter for the debugfs log context state is the implementation done here. Existing code that made use of DTN_INFO and its associated macros needed to be refactored to support this. We don't know the size of the log in advance so it reallocates the log string dynamically. Once the log has been generated it's copied into the user supplied buffer for the debugfs. This allows for seeking support but it's worth nothing that unlike triggering output via dmesg the hardware state might change in-between reads if your buffer size is too small. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Jordan Lazare <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu/display: add support for LVDS (v5)Alex Deucher1-0/+5
This adds support for LVDS displays. v2: add support for spread spectrum, sink detect v3: clean up enable_lvds_output v4: fix up link_detect v5: remove assert on 888 format Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105880 Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amd/display: Refactor FreeSync moduleAnthony Koo1-12/+0
Remove dependency on internal sink map and instead use existing stream and plane state Signed-off-by: Anthony Koo <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amd/display: add retimer log for HWQ tuning use.Charlene Liu1-1/+2
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amd/display: Set DFS bypass flags for dce110Nicholas Kazlauskas1-0/+2
[Why] While there is support for using and quering DFS bypass clocks the hardware is never notified to enter DFS bypass mode for dce110. [How] Add a flag that can be set when programming the display engine PLL to enable DFS bypass mode. If this flag is set then the hardware is notified to enter DFS bypass mode and the correct display engine clock frequency can be acquired. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-06drm/amd/display: add vbios table check for enabling dp ssDmytro Laktyushkin1-0/+2
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: read DP sink and DP branch hardware and firmware revision ↵Alvin lee1-0/+3
from DPCD - define new dpcd address in drm - implement new members in dpcd_caps to store values read from new dpcd address Signed-off-by: Alvin lee <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Convert remaining loggers off dc_loggerNicholas Kazlauskas2-151/+46
- Removed dal/dm/dc loggers from linux, switched to kernel prints - Modified functions that used these directly to use macros - dc_logger support is completely dropped from Linux Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: get board layout for edid emulationSamson Tam2-0/+57
Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/display: Define dp_alt_modeCharlene Liu1-0/+5
Also cleanup command_table2.c. No need for a lot of forward declarations. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amd/display: Prefix TIMING_STANDARD entries with DC_Reza Amini1-0/+7
Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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