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path: root/drivers/gpu/drm/amd/display/dc/dce
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2022-06-06drm/amd/display: PSRSU+DSC WA for specific TCONDavid Zhang1-0/+14
[why] Some specific TCON chip has HW limitation to support PSRSU+DSC. [how] Force ffu mode when DSC enabled if we detect it is the specific model from sink OUI DPCD. And disable ABM update for this case. Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: use HW lock mgr for PSR-SUDavid Zhang1-0/+2
[why] Feature requires synchronization of dig, pipe, and cursor locking between driver and DMUB fw for PSR-SU [how] return True if PSR-SU in the checker should_use_dmub_lock() Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: fix system hang when PSR exitsDavid Zhang1-0/+16
[why] When DC driver send PSR exit dmub command to DMUB FW, it might not wait until PSR exit. Then it may hit the following deadlock situation. 1. DC driver send HW LOCK command to DMUB FW due to frame update 2. DMUB FW Set the HW lock 3. DMUB execute PSR exit sequence and stuck at polling DPG Pending register due to the HW Lock is set 4. DC driver ask DMUB FW to unlock HW lock, but DMUB FW is polling DPG pending register [how] The reason why DC driver doesn't wait until PSR exit is because some of the PSR state machine state is not update the dc driver. So when DC driver read back the PSR state, it take the state for PSR inactive. Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: add vline time in micro sec to PSR contextDavid Zhang1-0/+1
[why] The current PSR SU programming margin is fixed base on FHD 60HZ panel. If the resolution and refresh rate become higher, the time of current margin might not cover the programming SU time. [how] Notice that the programming SU time is the same among different panels. Instead of fixing the margin with target line number, change the margin unit to micro second which indicate the time needed for programming SU. Then FW set the margin line number base on the line time and margin time. Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: Set default value of line_capture_indicationDavid Zhang1-0/+1
[Why & how] We only support line capture indication as 0 for PSRSU Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: Passing Y-granularity to dmub fwDavid Zhang1-0/+6
[Why] The Y-granularity panel parameter indicate the grid pattern granularity in the Y direction for PSRSU. [How] Send the Y-granularity data by PSR_COPY_SETTINGS dmub command. Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-06drm/amd/display: feed PSR-SU as psr version to dmub FWDavid Zhang1-0/+3
[why & how] set psr version as PSR-SU in kernel-FW interface function to ensure the correct dmub command parameter is fed into FW. Signed-off-by: David Zhang <[email protected]> Acked-by: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-03drm/amd/display: Select correct DTO sourceDillon Varone1-0/+27
[WHY&HOW] Change criteria for setting DTO source value, and always set it regardless of the signal type. Signed-off-by: Dillon Varone <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-06-03drm/amd/display: Add dependant changes for DCN32/321Aurabindo Pillai2-0/+60
[Why&How] This patch adds necessary changes needed in DC files outside DCN32/321 specific tree v2: squash in updates (Alex) Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-26drm/amd/display: Check if modulo is 0 before dividing.David Galiffi1-3/+6
[How & Why] If a value of 0 is read, then this will cause a divide-by-0 panic. Reviewed-by: Martin Leung <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: David Galiffi <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-26drm/amd/display: clear request when release aux enginePaul Hsieh1-1/+2
[Why] when driver and dmub request aux engine at the same time, dmub grant the aux engine but driver fail. Then driver release aux engine but doesn't clear the request bit. Then aux engine will be occupied by driver forever. [How] When driver release aux engine, clear request bit as well. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Paul Hsieh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dceAlex Hung4-55/+3
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dce directory. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-26drm/amd/display: fix non-kernel-doc comment warningsRandy Dunlap1-1/+1
Fix kernel-doc warnings for a comment that should not use kernel-doc notation: dmub_psr.c:235: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Set PSR power optimization flags. dmub_psr.c:235: warning: missing initial short description on line: * Set PSR power optimization flags. Fixes: e5dfcd272722 ("drm/amd/display: dc_link_set_psr_allow_active refactoring") Signed-off-by: Randy Dunlap <[email protected]> Reported-by: kernel test robot <[email protected]> Cc: Robin Chen <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Anthony Koo <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-21drm/amd/display: Remove useless codeHaowen Bai1-2/+0
aux_rep only memset but no use at all, so we drop it. Signed-off-by: Haowen Bai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-12drm/amd/display: Select correct DTO sourceDillon Varone1-1/+1
[WHY&HOW] Change criteria for setting DTO source value, and always set it regardless of the signal type. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-31drm/amd/display: Fix pointer dereferenced before checkingHaowen Bai1-1/+1
The value actual_pix_clk_100Hz is dereferencing pointer pix_clk_params before pix_clk_params is being null checked. Fix this by assigning pix_clk_params->requested_pix_clk_100hz to actual_pix_clk_100Hz only if pix_clk_params is not NULL, otherwise just NULL. Signed-off-by: Haowen Bai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Update engine ddcJing Zhou1-0/+1
[Why] Crash caused by a ddc update failure [How] Update engine ddc before release engine. Reviewed-by: Wyatt Wood <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Jing Zhou <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add I2C escape to support query device exist.JinZe.Xu2-0/+32
[How] 1. Search OEM I2C info from BIOS and compare with input parameter. 2. If BIOS doesn't record it, just try to read one byte. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: JinZe.Xu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: merge two duplicated clock_source_createCharlene Liu1-55/+72
[why] dcn31x could use dcn31 sepcific which contains deep_color_ratio for dmub Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Hansen Dsouza <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Release AUX engine after failed acquireWyatt Wood1-1/+1
[Why] There is a sequence in which aux arbitration doesn't work correctly. Driver is left with aux access after it times out waiting for access. In future dmub fw is never granted aux access and is stuck in a while loop. [How] Cancel aux request from driver after timing out. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wyatt Wood <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: fix deep color ratioHansen Dsouza2-0/+109
Fix enum mapping for deep color ratio Reviewed-by: Charlene Liu <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Hansen Dsouza <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: add debug option to bypass ssinfo from bios for dcn315Charlene Liu1-0/+2
[Why & How] Add debug option to bypass ssinfo from BIOS for dcn315. Reviewed-by: Park, Chris <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-02drm/amd/display: Adding a dc_debug option and dmub setting to use PHY FSM ↵Shah Dharati1-0/+1
for PSR [Why] PSR Power on/off is done in PSR. Add a dc_debug option and dmub setting to use PHY implementation of this instead. [How] Add a dc_debug option and dmub setting to use PHY FSM Power up/down for PSR. Co-authored-by: Shah Dharati <[email protected]> Reviewed-by: Hansen Dsouza <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Shah Dharati <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-16drm/amd/display: Fix for dmub outbox notification enableMeenakshikumar Somasundaram2-13/+16
[Why] Currently driver enables dmub outbox notification before oubox ISR is registered. During boot scenario, sometimes dmub issues hpd outbox message before driver registers ISR and those messages are missed. [How] Enable dmub outbox notification after outbox ISR is registered. Also, restructured outbox enable code to call from dm layer and renamed APIs. Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Meenakshikumar Somasundaram <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-02drm/amd/display: add set dp lane settings to link_hwssWenjing Liu2-9/+11
[why] Factor set dp lane settings to link_hwss. v2: fix statement with no effect warning (Alex) Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-02drm/amd/display: Improve dce_aux_transfer_with_retries loggingWyatt Wood1-1/+1
[Why + How] Payload reply is unknown and not handled in switch statement. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Wyatt Wood <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amd/display: Only set PSR version when validNicholas Kazlauskas1-0/+4
[Why] DMCUB will hang if we send a PSR unsupported set version command. This can occur if we fall-through into the default case in the switch statement for PSR version. [How] Add an unsupported check after the switch statement. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-01drm/amd/display: add hdmi disable debug checkDale Zhao1-2/+3
[Why] Using the hdmi_disable option doesnt disable 6GB bandwidth [How] Add debug.hdmi20_disable flage when checking 6GB enable or not. Reviewed-by: Chris Park <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Dale Zhao <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-22drm/amd/display: Enable DSC over eDPMikita Lipski1-0/+1
[why] - Adding a DM interface to enable DSC over eDP on Linux - DSC over eDP will allow to power savings by reducing the bandwidth required to support panel's modes - Apply link optimization algorithm to reduce link bandwidth when DSC is enabled [how] - Read eDP panel's DSC capabilities - Apply DSC policy on eDP panel based on its DSC capabilities - Enable DSC encoder's on the pipe - Enable DSC on panel's side by setting DSC_ENABLE DPCD register - Adding link optimization algorithm to reduce link rate or lane count based Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-17drm/amd/display: Wait for ACK for INBOX0 HW LockAlvin Lee1-0/+3
[Why] In DC we want to wait for the INBOX0 HW Lock command to ACK before continuing. This is to ensure that the lock has been successfully acquired before programming HW in DC. [How] Add interfaces to send messages on INBOX0, poll for their completation and clear the ack. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-17drm/amd/display: To support sending TPS3 pattern when restoring linkRobin Chen1-0/+9
[Why] Some panels require to use TPS3 pattern to wake up link in PSR mode. [How] To add TPS3 selection information in PSR settings command and pass to DMUB FW. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Robin Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-17drm/amd/display: clean up some formats and logCharlene Liu2-6/+2
[why] reduce az indirect register dump. need add az clock_gating control field used in some project. [how] conditional output indrect register in the log. add clock_gating feild Reviewed-by: Sung joon Kim <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-17drm/amd/display: Pass panel inst to a PSR commandMikita Lipski2-2/+4
[why] PSR set power command wasn't setting panel instance and command version which caused both streams to overwrite the same PSR state. [how] Pass panel instance to the set power command function and to DMUB and set command version enum Reviewed-by: Anthony Koo <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-03drm/amd/display: Added HPO HW control shutdown supportJake Wang1-1/+3
[Why] HPO is only used for DP2.0. HPO HW control should be disable when not being used to save power. [How] Shutdown HPO HW control during init hw. Shutdown HPO HW control during stream disable. Enable HPO HW control during stream enable if DP2.0. Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Jake Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: set Layout properly for 8ch audio at timing validationGuo, Bing1-2/+4
Why: For audio packet type 0x02, there are 2 Layouts: Layout = 0 for 2 channels and Layout = 1 for > 2 channels. Layout will affect bandwidth check. Currently, for HDMI FRL, Layout field isn't set and has a default value of 0, so theoretically only 2-channel audio for audio packet type 0x02 is supported now. How: 1. Set Layout properly according to maximum audio channel numbers for audios with audio packet type 0x02. 2. 8ch LPCM audio is not supported for timing modes with v_active <= 576. Reviewed-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Bing Guo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: Handle I2C-over-AUX write channel status updateAric Cyr1-3/+31
[Why] When writing long AUX commands some sinks will respond will write status update requiring source to read status. [How] When a write request is replied with data (AUX_ACK_M), retry a read of write status to determine when the write is completed. Reviewed-by: Martin Leung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: Set i2c memory to light sleep during hw initMichael Strauss1-1/+2
[WHY] i2c memory doesn't get set to light sleep on hw init as intended [HOW] Set i2c to light sleep after reg gets zeroed, ensuring memory power control doesn't get disabled for any other DIO memory Reviewed-by: Haonan Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: dc_link_set_psr_allow_active refactoringRobin Chen2-0/+21
[Why] To expose new power optimization flags to PSR interface. It allows the PSR related power features can be enabled separately base on different use scenarios. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Robin Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-19drm/amd/display: Add missing PSR stateMikita Lipski1-0/+2
[why] PSR_STATE2b was introduced on DMCUB side, but not on the driver side, which caused convert_psr_state helper function to return PSR_STATE_INVALID. That caused visual lagging during state transition. [how] Add PSR_STATE2b to dc_psr_state and convert_psr_state Reviewed-by: Wyatt Wood <[email protected]> Acked-by: Agustin Gutierrez Sanchez <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-06drm/amd/display: Fix for access for ddc pin and aux engine.Meenakshikumar Somasundaram1-0/+3
[Why & How] 1. Remove unnecessary dummy interrupt source for USB4 HPD & HPD RX 2. Adjust parameter for DPCD writing of link training process of DPIA link 3. Adjust specific AUX defer delay for DPIA link Reviewed-by: Jimmy Kizito <[email protected]> Acked-by: Wayne Lin <[email protected]> Acked-by: Nicholas Kazlauskas <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Meenakshikumar Somasundaram <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amd/display: add cyan_skillfish display supportZhan Liu2-0/+48
[Why] add display related cyan_skillfish files in. makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag. v2: squash in clang fixes from Harry, Nathan v3: squash in missing CONFIG_DRM_AMD_DC check (Alex) Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Jun Lei <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-28drm/amd/display: add vsync notify to dmub for abm pauseEric Yang1-0/+21
[Why] To prevent unnecessary wake up of DMCUB when ABM is enabled without PSR enabled, driver will notify DMCUB to stop ABM's vertical interrupts if vsync is disabled and steady state is reached. [How] Send inbox message to notify ABM pause based on vsync on/off Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Anson Jacob <[email protected]> Signed-off-by: Eric Yang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-23drm/amd/display: fix empty debug macrosArnd Bergmann1-2/+2
Using an empty macro expansion as a conditional expression produces a W=1 warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c: In function 'dce_aux_transfer_with_retries': drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:775:156: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 775 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER"); | ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:783:155: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] 783 | "dce_aux_transfer_with_retries: AUX_RET_SUCCESS: AUX_TRANSACTION_REPLY_I2C_OVER_AUX_NACK"); | ^ Expand it to "do { } while (0)" instead to make the expression more robust and avoid the warning. Fixes: 56aca2309301 ("drm/amd/display: Add AUX I2C tracing.") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Get backlight from PWM if DMCU is not initializedHarry Wentland1-10/+0
On Carrizo/Stoney systems we set backlight through panel_cntl, i.e. directly via the PWM registers, if DMCU is not initialized. We always read it back through ABM registers which leads to a mismatch and forces atomic_commit to program the backlight each time. Instead make sure we use the same logic for backlight readback, i.e. read it from panel_cntl if DMCU is not initialized. We also need to remove some extraneous and incorrect calculations at the end of dce_get_16_bit_backlight_from_pwm. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1666 Cc: [email protected] Reviewed-by: Josip Pavic <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Fix for null pointer access for ddc pin and aux engine.Meenakshikumar Somasundaram1-3/+9
[Why] Need a check for NULL pointer access for ddc pin and aux engine. [How] Adding a check for ddc pin and aux engine accesses. Reviewed-by: Jimmy Kizito <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Meenakshikumar Somasundaram <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Add DPCD writes at key pointsLeo (Hanghong) Ma1-0/+2
This reverts commit "Revert "Add DPCD writes at key points" ". The following patch will fix the system hang issue. v2: squash in indentation warning fix Signed-off-by: Leo (Hanghong) Ma <[email protected]> Acked-by: Mikita Lipski <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-01drm/amd/display: add missing ABM register offsetsJosip Pavic1-0/+16
[Why] Some ABM registers don't exist on DCN 3.01, so are missing from its register offset list. However, this list was copied to later versions of DCN that do have these registers. As a result, they're inaccessible from the driver on those DCN versions even though they exist. [How] Add the missing ABM register offsets to DCN 3.02+ Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-09drm/amd/display: use do-while-0 for DC_TRACE_LEVEL_MESSAGE()Randy Dunlap1-1/+1
Building with W=1 complains about an empty 'else' statement, so use the usual do-nothing-while-0 loop to quieten this warning. ../drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.c:113:53: warning: suggest braces around empty body in an 'else' statement [-Wempty-body] 113 | *state, retry_count); Fixes: b30eda8d416c ("drm/amd/display: Add ETW log to dmub_psr_get_state") Signed-off-by: Randy Dunlap <[email protected]> Cc: Wyatt Wood <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-09drm/amd/display: Add AUX I2C tracing.Ashley Thomas1-9/+183
[Why] Developers can find it useful if the driver can produce AUX traces without special equipment. [How] Add AUX tracing. Reviewed-by: Zhan Liu <[email protected]> Acked-by: Anson Jacob <[email protected]> Signed-off-by: Ashley Thomas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-27drm/amd/display: Add ETW log to dmub_psr_get_stateWyatt Wood1-3/+14
[Why] GPINT commands have the lowest priority in DMCUB, so it's possible that the command isn't processed in time. [How] Add a log to help identify this case. Reviewed-by: Koo Anthony <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Wyatt Wood <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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