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2024-05-13drm/amdgpu: clear the warning unsigned compared against 0 for xcp_idJesse Zhang1-1/+1
This greater-than-or-equal-to-zero comparison of an unsigned value is always true. fpriv->xcp_id >= 0U Signed-off-by: Jesse Zhang <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu: fix the waring dereferencing hiveJesse Zhang1-0/+3
Check the amdgpu_hive_info *hive that maybe is NULL. Signed-off-by: Jesse Zhang <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu: fix dereference after null checkJesse Zhang1-1/+1
check the pointer hive before use. Signed-off-by: Jesse Zhang <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu: Fix the warning division or modulo by zeroJesse Zhang1-0/+6
Checks the partition mode and returns an error for an invalid mode. Signed-off-by: Jesse Zhang <[email protected]> Suggested-by: Lijo Lazar <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu/umsch: add support to capture fw debug logSaleemkhan Jamadar6-0/+157
Added support to capture unsch fw debug logs in debugfs. To enable set amdgpu_umschfw_log =1 in boot args. v1 - rename variable to umsch_mm_fwlog (Veera) Signed-off-by: Saleemkhan Jamadar <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amd/amdgpu: update jpeg 5 capabilityDavid (Ming Qiang) Wu1-1/+1
Based on the documentation the maximum resolustion should be 16384x16384. Signed-off-by: David (Ming Qiang) Wu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu/vcn: set VCN5 power gating state to GATE on suspendDavid (Ming Qiang) Wu1-0/+7
On suspend, we need to set power gating state to GATE when VCN5 is busy, otherwise we will get following error on resume: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vcn_unified_0 test failed (-110) [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <vcn_v5_0_0> failed -110 amdgpu: amdgpu_device_ip_resume failed (-110). PM: dpm_run_callback(): pci_pm_resume+0x0/0x100 returns -110 PM: failed to resume async: error -110 Signed-off-by: David (Ming Qiang) Wu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu/vcn: remove irq disabling in vcn 5 suspendDavid (Ming Qiang) Wu1-19/+0
We do not directly enable/disable VCN IRQ in vcn 5.0.0. And we do not handle the IRQ state as well. So the calls to disable IRQ and set state are removed. This effectively gets rid of the warining of "WARN_ON(!amdgpu_irq_enabled(adev, src, type))" in amdgpu_irq_put(). Signed-off-by: David (Ming Qiang) Wu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdgpu/mes: fix mes12 to map legacy queueJack Xiao2-28/+53
Adjust mes12 initialization sequence to fix mapping legacy queue. v2: use dev_err. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-13drm/amdkfd: Remove arbitrary timeout for hmm_range_faultPhilip Yang2-10/+7
On system with khugepaged enabled and user cases with THP buffer, the hmm_range_fault may takes > 15 seconds to return -EBUSY, the arbitrary timeout value is not accurate, cause memory allocation failure. Remove the arbitrary timeout value, return EAGAIN to application if hmm_range_fault return EBUSY, then userspace libdrm and Thunk will call ioctl again. Change EAGAIN to debug message as this is not error. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-10drm/amdgpu: Fix comparison in amdgpu_res_cpu_visibleMichel Dänzer1-1/+1
It incorrectly claimed a resource isn't CPU visible if it's located at the very end of CPU visible VRAM. Fixes: a6ff969fe9cb ("drm/amdgpu: fix visible VRAM handling during faults") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3343 Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reported-and-Tested-by: Jeremy Day <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]> CC: [email protected]
2024-05-10kbuild: use $(src) instead of $(srctree)/$(src) for source directoryMasahiro Yamada1-1/+1
Kbuild conventionally uses $(obj)/ for generated files, and $(src)/ for checked-in source files. It is merely a convention without any functional difference. In fact, $(obj) and $(src) are exactly the same, as defined in scripts/Makefile.build: src := $(obj) When the kernel is built in a separate output directory, $(src) does not accurately reflect the source directory location. While Kbuild resolves this discrepancy by specifying VPATH=$(srctree) to search for source files, it does not cover all cases. For example, when adding a header search path for local headers, -I$(srctree)/$(src) is typically passed to the compiler. This introduces inconsistency between upstream and downstream Makefiles because $(src) is used instead of $(srctree)/$(src) for the latter. To address this inconsistency, this commit changes the semantics of $(src) so that it always points to the directory in the source tree. Going forward, the variables used in Makefiles will have the following meanings: $(obj) - directory in the object tree $(src) - directory in the source tree (changed by this commit) $(objtree) - the top of the kernel object tree $(srctree) - the top of the kernel source tree Consequently, $(srctree)/$(src) in upstream Makefiles need to be replaced with $(src). Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Nicolas Schier <[email protected]>
2024-05-08drm/amdgpu: Fix comparison in amdgpu_res_cpu_visibleMichel Dänzer1-1/+1
It incorrectly claimed a resource isn't CPU visible if it's located at the very end of CPU visible VRAM. Fixes: a6ff969fe9cb ("drm/amdgpu: fix visible VRAM handling during faults") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3343 Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reported-and-Tested-by: Jeremy Day <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]> CC: [email protected]
2024-05-08drm/amdgpu: Fix buffer size to prevent truncation in gfx_v12_0_init_microcodeSrinivasan Shanmugam1-1/+1
This commit fixes multiple potential truncations when writing the strings _pfp.bin, _me.bin, _rlc.bin, and _mec.bin into the fw_name buffer in the gfx_v12_0_init_microcode function in the gfx_v12_0.c file The ucode_prefix size was reduced from 30 to 15 to ensure the snprintf function does not exceed the size of the fw_name buffer. Thus fixing the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c: In function ‘gfx_v12_0_early_init’: drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:421:54: warning: ‘_pfp.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 421 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:421:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 421 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:428:54: warning: ‘_me.bin’ directive output may be truncated writing 7 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 428 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", ucode_prefix); | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:428:9: note: ‘snprintf’ output between 15 and 44 bytes into a destination of size 40 428 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:436:62: warning: ‘_rlc.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 436 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:436:17: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 436 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:448:54: warning: ‘_mec.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 448 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:448:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 448 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Lijo Lazar <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Fix truncation by resizing ucode_prefix in imu_v12_0_init_microcodeSrinivasan Shanmugam1-1/+1
This commit fixes potential truncation when writing the string _imu.bin into the fw_name buffer in the imu_v12_0_init_microcode function in the imu_v12_0.c file The ucode_prefix size was reduced from 30 to 15 to ensure the snprintf function does not exceed the size of the fw_name buffer. Thus fixing the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/imu_v12_0.c: In function ‘imu_v12_0_init_microcode’: drivers/gpu/drm/amd/amdgpu/imu_v12_0.c:51:54: warning: ‘_imu.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 51 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_imu.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/imu_v12_0.c:51:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 51 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_imu.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Lijo Lazar <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix mc_data out-of-bounds read warningTim Huang1-0/+2
Clear warning that read mc_data[i-1] may out-of-bounds. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix ucode out-of-bounds read warningTim Huang1-0/+3
Clear warning that read ucode[] may out-of-bounds. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Fix uninitialized variable warning in amdgpu_info_ioctlMa Jun1-2/+9
Check the return value of amdgpu_xcp_get_inst_details, otherwise we may use an uninitialized variable inst_mask Signed-off-by: Ma Jun <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Fix out-of-bounds read of df_v1_7_channel_numberMa Jun1-0/+2
Check the fb_channel_number range to avoid the array out-of-bounds read error Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu/soc21: use common nbio callback to set remap offsetAlex Deucher2-6/+1
This fixes HDP flushes on systems with non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu/nv: use common nbio callback to set remap offsetAlex Deucher3-13/+1
This fixes HDP flushes on systems with non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu/soc15: use common nbio callback to set remap offsetAlex Deucher5-27/+1
This fixes HDP flushes on systems with non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIF 6.3.1Alex Deucher1-0/+16
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.7Alex Deucher1-0/+16
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 4.3Alex Deucher1-0/+16
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 2.3Alex Deucher1-0/+15
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.2Alex Deucher1-0/+16
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.11Alex Deucher1-0/+15
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.9Alex Deucher1-0/+18
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.4Alex Deucher1-0/+16
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 7.0Alex Deucher1-0/+15
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add set_reg_remap callback for NBIO 6.1Alex Deucher1-1/+17
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add nbio set_reg_remap helperAlex Deucher1-0/+1
Will be used to consolidate reg remap settings and fix HDP flushes on systems with non-4K pages. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: change log levelYiPeng Chai2-3/+3
Change log level. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix spl component for psp v14Likun Gao1-1/+1
Fix the coding error when load spl component for psp v14. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix uninitialized variable warning for jpeg_v4Tim Huang1-1/+1
Clear warning that using uninitialized variable r. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix RAS unload driver issue in SRIOVYang Wang1-6/+8
Fix null pointer issue when unload driver in SRIOV mode. Adjust the function position to ensure that the amdgpu_mca/aca_xxx_init() related functions can be initialized properly. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: ignoring unsupported ras blocks when MCA bank dispatchesYang Wang1-1/+1
This patch is used to solve the problem of incorrect parsing of error counts. When the UE trigger gpu is reset, the driver will attempt to parse all possible ras blocks. For ras blocks that are not supported by the current ASIC, the driver should ignore this error. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Candice Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix uninitialized variable warning for amdgpu_xgmiTim Huang1-0/+3
Clear warning that using uninitialized variable current_node. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: fix uninitialized variable warning for sdma_v7Tim Huang1-1/+2
Clear warning that using uninitialized variable index. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Fix out-of-bounds write warningMa Jun1-1/+1
Check the ring type value to fix the out-of-bounds write warning Signed-off-by: Ma Jun <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Fix the uninitialized variable warningMa Jun1-0/+4
Check the user input and phy_id value range to fix "Using uninitialized value phy_id" Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu/mes11: fix kiq ring ready flagJack Xiao1-1/+2
kiq ring test has overwitten ready flag, need disable after gfx hw init. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdkfd: Let VRAM allocations go to GTT domain on small APUsLang Yu2-9/+16
Small APUs(i.e., consumer, embedded products) usually have a small carveout device memory which can't satisfy most compute workloads memory allocation requirements. We can't even run a Basic MNIST Example with a default 512MB carveout. https://github.com/pytorch/examples/tree/main/mnist. Error Log: "torch.cuda.OutOfMemoryError: HIP out of memory. Tried to allocate 84.00 MiB. GPU 0 has a total capacity of 512.00 MiB of which 0 bytes is free. Of the allocated memory 103.83 MiB is allocated by PyTorch, and 22.17 MiB is reserved by PyTorch but unallocated" Though we can change BIOS settings to enlarge carveout size, which is inflexible and may bring complaint. On the other hand, the memory resource can't be effectively used between host and device. The solution is MI300A approach, i.e., let VRAM allocations go to GTT. Then device and host can flexibly and effectively share memory resource. v2: Report local_mem_size_private as 0. (Felix) Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add se registers to ip dump for gfx10Sunil Khatri1-1/+6
add the registers of SE block of gfx for ip dump for gfx10 IP. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: add CP headers registers to gfx10 dumpSunil Khatri1-1/+8
add registers in the ip dump for CP headers in gfx10 Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-08drm/amdgpu: Use drm_crtc_vblank_crtc()Ville Syrjälä1-6/+2
Replace the open coded drm_crtc_vblank_crtc() with the real thing. Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2024-05-03drm/amdgpu: remove ip dump reg_count variableSunil Khatri2-3/+0
reg_count is not used and the register count is directly derived from the array size and hence removed. Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-02drm/amd/amdgpu: Check tbo resource pointerAsad Kamal1-1/+2
Validate tbo resource pointer, skip if NULL Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-02drm/amd/pm: support mode1 reset on smu_v14_0_3Kenneth Feng1-0/+1
support mode1 reset on smu_v14_0_3 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>