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path: root/drivers/gpu/drm/amd/amdgpu
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2022-08-30drm/amdgpu: disable FRU access on special SIENNA CICHLID cardGuchun Chen1-2/+7
Below driver load error will be printed, not friendly to end user. amdgpu: ATOM BIOS: 113-D603GLXE-077 [drm] FRU: Failed to get size field [drm:amdgpu_fru_get_product_info [amdgpu]] *ERROR* Failed to read FRU Manufacturer, ret:-5 Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: Remove the unneeded result variable 'r'ye xingchen1-4/+1
Return the value sdma_v4_0_start() directly instead of storing it in another redundant variable. Reported-by: Zeal Robot <[email protected]> Signed-off-by: ye xingchen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: add new ip block for MES 11.0.3Hawking Zhang1-0/+1
Add ip block support for mes v11_0_3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: add new ip block for GFX 11.0Hawking Zhang1-0/+1
Add ip block support for gfx v11_0_3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: Set GC family for GC 11.0.3Hawking Zhang1-0/+1
Set AMDGPU_FAMILY_GC_11_0_0. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: enable imu_rlc_ram programming for v11_0_3Hawking Zhang4-1/+181
All gc v11_0_3 registers in gcvml2 range have different register offset from the ones in gc v11_0_0. v11_0_3 imu_rlc_ram programming has to be separated from v11_0_0 implementation v2: fix checkpatch errors (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: init gfx config for gfx v11_0_3Hawking Zhang1-0/+2
initialize some gfx config for gfx v11_0_3 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: declare firmware for new MES 11.0.3Hawking Zhang1-0/+2
To support new mes ip block Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: declare firmware for new GC 11.0.3Hawking Zhang1-0/+4
To support new gfx ip block Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: add new ip block for GMC 11.0Hawking Zhang1-0/+1
Add ip block support for gmc v11_0_3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: initialize gmc sw config for v11_0_3Hawking Zhang1-0/+1
initialize gmc sw config for v11_0_3 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: add gfxhub_v3_0_3 supportYang Wang4-2/+550
add gfxhub_v3_0_3 support Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-30drm/amdgpu: only init tap_delay ucode when it's included in ucode binaryHawking Zhang1-25/+35
Not all the gfx10 variants need to integrate global tap_delay and per se tap_delay firmwares Only init tap_delay ucode when it does include in rlc ucode binary so driver doesn't send a null buffer to psp for firmware loading Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Jack Gui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: add new ip block for LSDMA 6.0Hawking Zhang1-0/+1
Add ip block support for lsdma v6_0_3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: add new ip block for sdma 6.0Hawking Zhang1-0/+1
Add ip block support for sdma v6_0_3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: declare firmware for new SDMA 6.0.3Hawking Zhang1-0/+1
To support new sdma ip block Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: enable smu block for smu 13.0.10John Clements1-0/+1
Force to enable smu block for SMU v13.0.10 Signed-off-by: John Clements <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: add new ip block for PSP 13.0Frank Min1-0/+1
Add ip block support for psp v13_0_10. Signed-off-by: Frank Min <[email protected]> Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: added firmware module for psp 13.0.10John Clements1-0/+1
added missing firmware module Signed-off-by: John Clements <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: support psp v13_0_10 ip blockFrank Min2-0/+2
Add psp v13_0_10 ip block, initialize firmware and psp functions Signed-off-by: Frank Min <[email protected]> Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: add new ip block for SOC21Hawking Zhang1-0/+1
Add ip block support for soc21_common. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: Enable pg/cg flags on GC11_0_3 for VCNSonny Jiang1-2/+5
This enable VCN PG, CG, DPG and JPEG PG, CG Signed-off-by: Sonny Jiang <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: initialize common sw config for v11_0_3Hawking Zhang1-0/+5
init cp/pg_flags and extenal_rev_id Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Frank Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: drop gc 11_0_0 golden settingsHawking Zhang1-41/+0
driver doesn't need to program any gc 11_0_0 golden Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: ensure no PCIe peer access for CPU XGMI iolinksAlex Sierra1-1/+2
[Why] Devices with CPU XGMI iolink do not support PCIe peer access. Signed-off-by: Alex Sierra <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: Fix use-after-free in amdgpu_cs_ioctlYuBiao Wang1-1/+4
[Why] In amdgpu_cs_ioctl, amdgpu_job_free could be performed ealier if there is -ERESTARTSYS error. In this case, job->hw_fence could be not initialized yet. Putting hw_fence during amdgpu_job_free could lead to a use-after-free warning. [How] Check if drm_sched_job_init is performed before job_free by checking s_fence. v2: Check hw_fence.ops instead since it could be NULL if fence is not initialized. Reverse the condition since !=NULL check is discouraged in kernel. Signed-off-by: YuBiao Wang <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: add missing pci_disable_device() in amdgpu_pmops_runtime_resume()Yang Yingliang1-1/+4
Add missing pci_disable_device() if amdgpu_device_resume() fails. Fixes: 8e4d5d43cc6c ("drm/amdgpu: Handling of amdgpu_device_resume return value for graceful teardown") Signed-off-by: Yang Yingliang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: Remove the unneeded result variableye xingchen1-4/+1
Return the value sdma_v5_2_start() directly instead of storing it in another redundant variable. Reported-by: Zeal Robot <[email protected]> Signed-off-by: ye xingchen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: Update mes_v11_api_def.hGraham Sider1-0/+1
New GFX11 MES FW adds the trap_en bit. For now hardcode to 1 (traps enabled). Signed-off-by: Graham Sider <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-29drm/amdgpu: disable FRU access on special SIENNA CICHLID cardGuchun Chen1-2/+7
Below driver load error will be printed, not friendly to end user. amdgpu: ATOM BIOS: 113-D603GLXE-077 [drm] FRU: Failed to get size field [drm:amdgpu_fru_get_product_info [amdgpu]] *ERROR* Failed to read FRU Manufacturer, ret:-5 Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: mmVM_L2_CNTL3 register not initialized correctlyQu Huang1-0/+1
The mmVM_L2_CNTL3 register is not assigned an initial value Signed-off-by: Qu Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: add MGCG perfmon setting for gfx11Likun Gao2-0/+18
Enable GFX11 MGCG perfmon setting. V2: set rlc to saft mode before setting. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: Fix page table setup on ArcturusMukul Joshi1-2/+10
When translate_further is enabled, page table depth needs to be updated. This was missing on Arcturus MMHUB init. This was causing address translations to fail for SDMA user-mode queues. Fixes: 352e683b72e7 ("drm/amdgpu: Enable translate_further to extend UTCL2 reach") Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: add sdma instance check for gfx11 CGCGTim Huang1-6/+12
For some ASICs, like GFX IP v11.0.1, only have one SDMA instance, so not need to configure SDMA1_RLC_CGCG_CTRL for this case. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: enable NBIO IP v7.7.0 Clock GatingTim Huang1-4/+3
Enable AMD_CG_SUPPORT_BIF_MGCG and AMD_CG_SUPPORT_BIF_LS support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: add NBIO IP v7.7.0 Clock Gating supportTim Huang1-0/+78
Add BIF Clock Gating MGCG and LS support for NBIO IP v7.7.0. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: mmVM_L2_CNTL3 register not initialized correctlyQu Huang1-0/+1
The mmVM_L2_CNTL3 register is not assigned an initial value Signed-off-by: Qu Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm: amd: amdgpu: ACPI: Add comment about ACPI_FADT_LOW_POWER_S0Rafael J. Wysocki1-0/+6
According to the ACPI specification [1], the ACPI_FADT_LOW_POWER_S0 flag merely means that it is better to use low-power S0 idle on the given platform than S3 (provided that the latter is supported) and it doesn't preclude using either of them (which of them will be used depends on the choices made by user space). However, on some systems that flag is used to indicate whether or not to enable special firmware mechanics allowing the system to save more energy when suspended to idle. If that flag is unset, doing so is generally risky. Accordingly, add a comment to explain the ACPI_FADT_LOW_POWER_S0 check in amdgpu_acpi_is_s0ix_active(), the purpose of which is otherwise somewhat unclear. Link: https://uefi.org/specs/ACPI/6.4/05_ACPI_Software_Programming_Model/ACPI_Software_Programming_Model.html#fixed-acpi-description-table-fadt # [1] Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: use dev_info to benefit mGPU caseGuchun Chen1-1/+1
'free PSP TMR buffer' happens in suspend, but sometimes in mGPU config, it mixes with PSP resume log printing from another GPU, which is confusing. So use dev_info instead of DRM_INFO for printing. [drm] PSP is resuming... [drm] reserve 0xa00000 from 0x877e000000 for PSP TMR amdgpu 0000:e3:00.0: amdgpu: GECC is enabled amdgpu 0000:e3:00.0: amdgpu: SECUREDISPLAY: securedisplay ta ucode is not available amdgpu 0000:e3:00.0: amdgpu: SMU is resuming... amdgpu 0000:e3:00.0: amdgpu: smu driver if version = 0x00000040, smu fw if version = 0x00000041, smu fw program = 0, version = 0x003a5400 (58.84.0) amdgpu 0000:e3:00.0: amdgpu: SMU driver if version not matched amdgpu 0000:e3:00.0: amdgpu: dpm has been enabled amdgpu 0000:e3:00.0: amdgpu: SMU is resumed successfully! [drm] DMUB hardware initialized: version=0x02020014 [drm] free PSP TMR buffer [drm] kiq ring mec 2 pipe 1 q 0 Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: use adev_to_drm to get drm deviceGuchun Chen1-1/+1
adev_to_drm is used everywhere in amdgpu code, so modify it to keep consistency. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: add MGCG perfmon setting for gfx11Likun Gao2-0/+18
Enable GFX11 MGCG perfmon setting. V2: set rlc to saft mode before setting. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amd/amdgpu: avoid soft reset check when gpu recovery disabledChengming Gui1-5/+6
Avoid soft reset, even ip hang check (ring/ib test) when gpu recovery disabled. v2: add missing "}" Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: Fix page table setup on ArcturusMukul Joshi1-2/+10
When translate_further is enabled, page table depth needs to be updated. This was missing on Arcturus MMHUB init. This was causing address translations to fail for SDMA user-mode queues. Fixes: 352e683b72e7 ("drm/amdgpu: Enable translate_further to extend UTCL2 reach") Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: skip set_topology_info for VFVignesh Chander1-0/+3
Skip set_topology_info as xgmi TA will now block it and host needs to program it. Signed-off-by: Vignesh Chander <[email protected]> Reviewed-By : Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: add sdma instance check for gfx11 CGCGTim Huang1-6/+12
For some ASICs, like GFX IP v11.0.1, only have one SDMA instance, so not need to configure SDMA1_RLC_CGCG_CTRL for this case. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-25drm/amdgpu: Don't register backlight when another backlight should be used (v3)Hans de Goede1-0/+7
Before this commit when we want userspace to use the acpi_video backlight device we register both the GPU's native backlight device and acpi_video's firmware acpi_video# backlight device. This relies on userspace preferring firmware type backlight devices over native ones. Registering 2 backlight devices for a single display really is undesirable, don't register the GPU's native backlight device when another backlight device should be used. Changes in v2: - To avoid linker errors when amdgpu is builtin and video_detect.c is in a module, select ACPI_VIDEO and its deps if ACPI is enabled. When ACPI is disabled, ACPI_VIDEO is also always disabled, ensuring the stubs from acpi/video.h will be used. Changes in v3: - Use drm_info(drm_dev, "...") to log messages - ACPI_VIDEO can now be enabled on non X86 too, adjust the Kconfig changes to match this. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-08-22drm/amdgpu: enable NBIO IP v7.7.0 Clock GatingTim Huang1-4/+3
Enable AMD_CG_SUPPORT_BIF_MGCG and AMD_CG_SUPPORT_BIF_LS support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-22drm/amdgpu: add NBIO IP v7.7.0 Clock Gating supportTim Huang1-0/+78
Add BIF Clock Gating MGCG and LS support for NBIO IP v7.7.0. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-22drm/amdgpu: Remove the additional kfd pre reset call for sriovshaoyunl1-2/+0
The additional call is caused by merge conflict Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: shaoyunl <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-22drm/amdgpu: Check num_gfx_rings for gfx v9_0 rb setup.Candice Li1-1/+2
No need to set up rb when no gfx rings. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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