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2021-06-30drm/amdgpu: fix Navi1x tcp power gating hang when issuing lightweight ↵Evan Quan1-0/+95
invalidaiton Fix TCP hang when a lightweight invalidation happens on Navi1x. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-30drm/amdgpu: correct tcp harvest settingEvan Quan1-46/+51
Add missing settings for SQC bits. And correct some confusing logics around active wgp bitmap calculation. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-29drm/amd/display: Enabling eDP no power sequencing with DAL feature maskZhan Liu1-0/+1
[Why] Sometimes, DP receiver chip power-controlled externally by an Embedded Controller could be treated and used as eDP, if it drives mobile display. In this case, we shouldn't be doing power-sequencing, hence we can skip waiting for T7-ready and T9-ready." [How] Added a feature mask to enable eDP no power sequencing feature. To enable this, set 0x10 flag in amdgpu.dcfeaturemask on Linux command line. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-29drm/amdgpu: use vma_lookup() in amdgpu_ttm_tt_get_user_pages()Liam Howlett1-2/+2
Use vma_lookup() to find the VMA at a specific address. As vma_lookup() will return NULL if the address is not within any VMA, the start address no longer needs to be validated. Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Liam R. Howlett <[email protected]> Reviewed-by: Laurent Dufour <[email protected]> Acked-by: David Hildenbrand <[email protected]> Acked-by: Davidlohr Bueso <[email protected]> Acked-by: Alex Deucher <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2021-06-29drm/amdgpu: return early for non-TTM_PL_TT type BOsNirmoy Das1-1/+2
Return early for non-TTM_PL_TT BOs so that we don't pass wrong pointer to amdgpu_gtt_mgr_has_gart_addr() which assumes ttm_resource argument to be TTM_PL_TT type BO's. v3: remove extra braces. v2: merge if-conditions. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-06-25Merge tag 'drm-misc-fixes-2021-06-24' of ↵Dave Airlie1-1/+13
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes A DMA address check for nouveau, an error code return fix for kmb, fixes to wait for a moving fence after pinning the BO for amdgpu, nouveau and radeon, a crtc and async page flip fix for atmel-hlcdc and a cpu hang fix for vc4. Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20210624190353.wyizoil3wqrrxz5d@gilmour
2021-06-22drm/amdgpu: wait for moving fence after pinningChristian König1-1/+13
We actually need to wait for the moving fence after pinning the BO to make sure that the pin is completed. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> References: https://lore.kernel.org/dri-devel/[email protected]/ CC: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-06-21Revert "drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue."Yifan Zhang1-5/+1
This reverts commit 631003101c516ea29a74aee59666708857b9a805. Reason for revert: side effect of enlarging CP_MEC_DOORBELL_RANGE may cause some APUs fail to enter gfxoff in certain user cases. Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-21Revert "drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full ↵Yifan Zhang1-5/+1
doorbell." This reverts commit 1ba7b24ba68e7c04b1e67d986d02b966b4eaaaa0. Reason for revert: Side effect of enlarging CP_MEC_DOORBELL_RANGE may cause some APUs fail to enter gfxoff in certain user cases. Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-21Revert "drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue."Yifan Zhang1-5/+1
This reverts commit 4cbbe34807938e6e494e535a68d5ff64edac3f20. Reason for revert: side effect of enlarging CP_MEC_DOORBELL_RANGE may cause some APUs fail to enter gfxoff in certain user cases. Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-06-21Revert "drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full ↵Yifan Zhang1-5/+1
doorbell." This reverts commit 1c0b0efd148d5b24c4932ddb3fa03c8edd6097b3. Reason for revert: Side effect of enlarging CP_MEC_DOORBELL_RANGE may cause some APUs fail to enter gfxoff in certain user cases. Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-06-21drm/amdgpu: Call drm_framebuffer_init last for framebuffer initMichel Dänzer1-5/+7
Once drm_framebuffer_init has returned 0, the framebuffer is hooked up to the reference counting machinery and can no longer be destroyed with a simple kfree. Therefore, it must be called last. If drm_framebuffer_init returns 0 but its caller then returns non-0, there will likely be memory corruption fireworks down the road. The following lead me to this fix: [ 12.891228] kernel BUG at lib/list_debug.c:25! [...] [ 12.891263] RIP: 0010:__list_add_valid+0x4b/0x70 [...] [ 12.891324] Call Trace: [ 12.891330] drm_framebuffer_init+0xb5/0x100 [drm] [ 12.891378] amdgpu_display_gem_fb_verify_and_init+0x47/0x120 [amdgpu] [ 12.891592] ? amdgpu_display_user_framebuffer_create+0x10d/0x1f0 [amdgpu] [ 12.891794] amdgpu_display_user_framebuffer_create+0x126/0x1f0 [amdgpu] [ 12.891995] drm_internal_framebuffer_create+0x378/0x3f0 [drm] [ 12.892036] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892075] drm_mode_addfb2+0x34/0xd0 [drm] [ 12.892115] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892153] drm_ioctl_kernel+0xe2/0x150 [drm] [ 12.892193] drm_ioctl+0x3da/0x460 [drm] [ 12.892232] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892274] amdgpu_drm_ioctl+0x43/0x80 [amdgpu] [ 12.892475] __se_sys_ioctl+0x72/0xc0 [ 12.892483] do_syscall_64+0x33/0x40 [ 12.892491] entry_SYSCALL_64_after_hwframe+0x44/0xae Fixes: f258907fdd835e "drm/amdgpu: Verify bo size can fit framebuffer size on init." Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-21drm/amdgpu: fix amdgpu_preempt_mgr_new()Dan Carpenter1-1/+1
There is a reversed if statement in amdgpu_preempt_mgr_new() so it always returns -ENOMEM. Fixes: 09b020bb05a5 ("Merge tag 'drm-misc-next-2021-06-09' of git://anongit.freedesktop.org/drm/drm-misc into drm-next") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/YMxbQXg/Wqm0ACxt@mwanda Signed-off-by: Christian König <[email protected]>
2021-06-18drm/amdgpu: Call drm_framebuffer_init last for framebuffer initMichel Dänzer1-5/+7
Once drm_framebuffer_init has returned 0, the framebuffer is hooked up to the reference counting machinery and can no longer be destroyed with a simple kfree. Therefore, it must be called last. If drm_framebuffer_init returns 0 but its caller then returns non-0, there will likely be memory corruption fireworks down the road. The following lead me to this fix: [ 12.891228] kernel BUG at lib/list_debug.c:25! [...] [ 12.891263] RIP: 0010:__list_add_valid+0x4b/0x70 [...] [ 12.891324] Call Trace: [ 12.891330] drm_framebuffer_init+0xb5/0x100 [drm] [ 12.891378] amdgpu_display_gem_fb_verify_and_init+0x47/0x120 [amdgpu] [ 12.891592] ? amdgpu_display_user_framebuffer_create+0x10d/0x1f0 [amdgpu] [ 12.891794] amdgpu_display_user_framebuffer_create+0x126/0x1f0 [amdgpu] [ 12.891995] drm_internal_framebuffer_create+0x378/0x3f0 [drm] [ 12.892036] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892075] drm_mode_addfb2+0x34/0xd0 [drm] [ 12.892115] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892153] drm_ioctl_kernel+0xe2/0x150 [drm] [ 12.892193] drm_ioctl+0x3da/0x460 [drm] [ 12.892232] ? drm_internal_framebuffer_create+0x3f0/0x3f0 [drm] [ 12.892274] amdgpu_drm_ioctl+0x43/0x80 [amdgpu] [ 12.892475] __se_sys_ioctl+0x72/0xc0 [ 12.892483] do_syscall_64+0x33/0x40 [ 12.892491] entry_SYSCALL_64_after_hwframe+0x44/0xae Fixes: f258907fdd835e "drm/amdgpu: Verify bo size can fit framebuffer size on init." Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of ↵Bokun Zhang5-39/+61
MMSCH In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang <[email protected]> Signed-off-by: Peng Ju Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: remove unused parameter in amdgpu_gart_bindYifan Zhang3-8/+5
Pagelist is no long used in amdgpu_gart_bind. Remove it. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: message smu to update hbm bad page numberStanley.Yang2-0/+7
Use SMU to update the bad pages rather than directly accessing the EEPROM from the driver. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: PWRBRK sequence changes for AldebaranAshish Pawar1-5/+0
Modify power brake enablement sequence on Aldebaran Signed-off-by: Ashish Pawar <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: fix bad address translation for sienna_cichlidStanley.Yang2-1/+6
Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amd/display: Add Freesync video documentationRodrigo Siqueira1-2/+17
Recently, we added support for an experimental feature named Freesync video; for more details on that, refer to: commit 6f59f229f8ed ("drm/amd/display: Skip modeset for front porch change") commit d10cd527f5e5 ("drm/amd/display: Add freesync video modes based on preferred modes") commit 0eb1af2e8205 ("drm/amd/display: Add module parameter for freesync video mode") Nevertheless, we did not document it in detail in our driver. This commit introduces a kernel-doc and expands the module parameter description. Cc: Aurabindo Pillai <[email protected]> Cc: Sean Paul <[email protected]> Cc: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu/vcn3: drop extraneous Beige Goby hunkAlex Deucher1-5/+0
Probably a rebase leftover. This doesn't apply to SR-IOV, and the non-SR-IOV code below it already handles this properly. Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: add vega20 to ras quirk listStanley.Yang1-1/+3
Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amdgpu: Set TTM_PAGE_FLAG_SG earlier for userprt BOsxinhui pan1-3/+3
Because TTM do page counting on userptr BOs which is actually not needed. To avoid that, lets set TTM_PAGE_FLAG_SG after tt_create and before tt_populate. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-16drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell.Yifan Zhang1-1/+5
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-06-16drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue.Yifan Zhang1-1/+5
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-06-15drm/amdgpu: Use spinlock_irqsave for pasid_lockFelix Kuehling1-4/+5
This should fix a kernel LOCKDEP warning on Vega10: [ 149.416604] ================================ [ 149.420877] WARNING: inconsistent lock state [ 149.425152] 5.11.0-kfd-fkuehlin #517 Not tainted [ 149.429770] -------------------------------- [ 149.434053] inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage. [ 149.440059] swapper/3/0 [HC1[1]:SC0[0]:HE0:SE1] takes: [ 149.445198] ffff9ac80e005d68 (&adev->vm_manager.pasid_lock){?.+.}-{2:2}, at: amdgpu_vm_get_task_info+0x25/0x90 [amdgpu] [ 149.456252] {HARDIRQ-ON-W} state was registered at: [ 149.461136] lock_acquire+0x242/0x390 [ 149.464895] _raw_spin_lock+0x2c/0x40 [ 149.468647] amdgpu_vm_handle_fault+0x44/0x380 [amdgpu] [ 149.474187] gmc_v9_0_process_interrupt+0xa8/0x410 [amdgpu] ... Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Oak Zeng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell.Yifan Zhang1-1/+5
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue.Yifan Zhang1-1/+5
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu: move shadow_list to amdgpu_bo_vmNirmoy Das4-13/+14
Move shadow_list to struct amdgpu_bo_vm as shadow BOs are part of PT/PD BOs. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu: parameterize ttm BO destroy callbackNirmoy Das2-12/+32
Make provision to pass different ttm BO destroy callback while creating a amdgpu_bo. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu: remove amdgpu_vm_ptNirmoy Das11-125/+104
Page table entries are now in embedded in VM BO, so we do not need struct amdgpu_vm_pt. This patch replaces struct amdgpu_vm_pt with struct amdgpu_vm_bo_base. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-15drm/amdgpu: correct psp ucode arrary start addressHawking Zhang1-9/+14
For ASICs that need to load sys_drv_aux and sos_aux, the sys_start_addr is not the start address of psp ucode array because the sys_drv_aux and sos_aux actaully located at the end of the ucode array, instead, the psp ucode arrary start address should be sos_hdr + sos_hdr_offset. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: disable DRAM memory training when GECC is enabledHawking Zhang2-13/+35
GECC and G6 mem training are mutually exclusive functionalities. VBIOS/PSP will set the flag (BOOT_CFG_FEATURE_TWO_STAGE_DRAM_TRAINING) in runtime database to indicate whether dram memory training need to be disabled or not. For Navi1x families, two stage mem training is always enabled. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: cache psp runtime boot_cfg_bitmask in sw_intHawking Zhang2-0/+9
PSP runtime boot_cfg_bitmask carries various psp bl feature bit mask that can be used by driver. Cache it in sw_init for further usage. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: add helper function to query psp runtime db entry (v2)Hawking Zhang1-0/+68
PSP will dump various boot up information into a portion of local frame buffer, called runtime database. The helper function is used for driver to query those shared information. v2: init ret and check !ret to exit loop as soon as found the entry Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: add psp runtime db structuresHawking Zhang1-0/+54
PSP runtime database is used to share various boot up information with driver. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: enable dynamic GECC support (v2)Hawking Zhang1-10/+47
Dynamic GECC allows user to specify GECC enablement status, which will take effect in next boot cycle. v2: initialize boot_cfg to 0xFF Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: add helper function to query gecc status in boot configHawking Zhang1-0/+23
Query GECC enablement status in boot config Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: allow different boot configsHawking Zhang1-4/+4
More boot configs need to be supported via BOOTCFG_CMD_SET Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: update psp gfx i/f to support dynamic GECCHawking Zhang1-4/+9
psp_gfx_uresp_bootcfg is used to inform driver bootcfg settings maintained by tOS Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: use adev_to_drm macro for consistency (v2)Guchun Chen2-2/+2
Use adev_to_drm() to get to the drm_device pointer. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: reset psp ring wptr during ring_createYuBiao Wang2-0/+2
[Why] psp ring wptr is not initialized properly in ring_create, which would lead to psp failure after several gpu reset. [How] Set ring_wptr to zero in psp_ring_create. Signed-off-by: YuBiao Wang <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amd/amdgpu: add instance_number check in amdgpu_discovery_get_ip_versionPeng Ju Zhou2-3/+3
The original code returns IP version of instantce_0 for every IP. This implementation may be correct for most of IPs. However, for certain IP block (VCN for example), it may have 2 instances and both of them have the same hw_id, BUT they have different revision number (0 and 1). In this case, the original amdgpu_discovery_get_ip_version cannot correct reflects the result and returns false information Signed-off-by: Bokun Zhang <[email protected]> Signed-off-by: Peng Ju Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amdgpu: make audio dev's D-state transition PMFW-awareEvan Quan1-0/+42
To correctly kick into BACO state, the audio dev's D-state transition(D0->D3) needs to be PMFW-aware. So, if the audio dev entered D3 state prior to our driver, we need to bring it back to D0 state and make sure there will be a D-state transition on runpm suspend. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-11drm/amd/pm: drop the incomplete fix for Navi14 runpm issueEvan Quan1-4/+1
As the fix by adding PPSMC_MSG_PrepareMp1ForUnload is proved to be incomplete. Another fix(see link below) has been sent out. Link: https://lore.kernel.org/linux-pci/[email protected]/ Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-10drm/amdgpu: Added support for loading auxiliary PSP FWJohn Clements1-8/+46
In the case with xgmi connected to cpu load alternate psp fw Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-10drm/amdgpu: Updated fw header structure sourceJohn Clements3-60/+56
synchronized fw header with latest source Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-10drm/amdkfd: use allowed domain for vmbo validationNirmoy Das1-17/+4
Fixes handling when page tables are in system memory. v3: remove struct amdgpu_vm_parser. v2: remove unwanted variable. change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-10Merge tag 'amd-drm-next-5.14-2021-06-09' of ↵Dave Airlie42-215/+649
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.14-2021-06-09: amdgpu: - SR-IOV fixes - Smartshift updates - GPUVM TLB flush updates - 16bpc fixed point display fix for DCE11 - BACO cleanups and core refactoring - Aldebaran updates - Initial Yellow Carp support - RAS fixes - PM API cleanup - DC visual confirm updates - DC DP MST fixes - DC DML fixes - Misc code cleanups and bug fixes amdkfd: - Initial Yellow Carp support radeon: - memcpy_to/from_io fixes UAPI: - Add Yellow Carp chip family id Used internally in the kernel driver and by mesa Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-06-10drm/amdgpu: use correct rounding macro for 64-bitDave Airlie1-1/+1
This fixes 32-bit arm build due to lack of 64-bit divides. Fixes: cb1c81467af3 ("drm/ttm: flip the switch for driver allocated resources v2") Link: https://patchwork.freedesktop.org/patch/438442/ Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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