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path: root/drivers/gpu/drm/amd/amdgpu
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2018-03-21drm/amdgpu/psp: initial vega12 supportAlex Deucher2-0/+3
Same as vega10 for now. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Feifei Xu <[email protected]>
2018-03-21drm/amdgpu: vega12 to smu firmwareHawking Zhang1-0/+3
Add the cgs interface to query the smu firmware for vega12 and declare the firmware. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Hawking Zhang <[email protected]>
2018-03-21drm/amdgpu: set asic family and ip blocks for vega12Alex Deucher1-2/+3
soc15 just like vega10 and raven. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Feifei Xu <[email protected]>
2018-03-21drm/amdgpu: add gpu_info firmware for vega12Alex Deucher1-0/+4
Stores gpu configuration details. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Feifei Xu <[email protected]>
2018-03-21drm/amdgpu: add vega12 to asic_type enumFeifei Xu1-0/+1
Add vega12 to amd_asic_type enum and amdgpu_asic_name[]. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Hawking Zhang <[email protected]>
2018-03-21Merge airlied/drm-next into drm-misc-nextSean Paul120-4390/+6002
Refresh -misc-next Signed-off-by: Sean Paul <[email protected]>
2018-03-20drm/amdgpu: Fix kernel NULL pointer dereference in dpm functionsRex Zhu3-0/+3
caused by 'commit 83e3c4615872 ("drm/amdgpu: Remove wrapper layer of smu ip functions")' BUG: unable to handle kernel NULL pointer dereference at 00000000000005d8 [ 313.241459] IP: ci_dpm_read_sensor+0x37/0xf0 [amdgpu] Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: Fix kernel NULL pointer dereference when amdgpu finiRex Zhu2-1/+3
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu - Disable all irqs before disabling all CRTCsMikita Lipski1-3/+2
By moving amdgpu_irq_disable_all earlier in the sequence fixes an issue with disabling pflip interrupts: *ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source Earlier patch fixed a memory corruption and revealed irq warnings.This way it seems to be there no obvious issues with unloading the module. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: Disable irq on device before destroying itMikita Lipski1-2/+3
Disable irq on devices before destroying them. That prevents use-after-free memory access when unloading the driver. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: Use atomic function to disable crtcs with dc enabledMikita Lipski1-3/+6
This change fixes the deadlock when unloading the driver with displays connected. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amd/amdgpu: fix offset into page with amdgpu_iomem debugfs fileTom St Denis1-2/+2
The offset inside the page wasn't included in the copy call meaning the start of the page was being read/written instead. Reported-by: Jay Cornwall <[email protected]> Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu/nbio6: Correct PCIE_INDEX/DATA pair used for smn register accessingHawking Zhang1-2/+2
PCIE_INDEX2/DATA2 pair will be used for smn register accessing since from vega. PCIE_INDEX/DATA pair should be reserved for smu Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: add documentation for amdgpu_device.cAlex Deucher1-12/+427
Add kernel doc for the functions in amdgpu_device.c Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: add VCN to firmware query interfaceAlex Deucher1-0/+12
Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Delete get_xclk function in powerplay (v2)Rex Zhu1-4/+1
use asic's callback function get_xclk in amdgpu v2: squash in removal of leftover debug info (drm/amd/pp: Delete debug info in smu7_hwmgr.c) (Rex) Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amdgpu: Delete dead code when early initRex Zhu2-10/+0
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-16drm/amd/pp: Remove the cgs wrapper for notify smu version on APURex Zhu1-5/+0
Refine commit f49e9bac191b ("drm/amd/pp: Get and save Rv smu version") Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Add kfd2kgd interface to acquire an existing VMFelix Kuehling5-55/+122
This allows acquiring an existing VM from a render node FD to use it for a compute process. Such VMs get destroyed when the original file descriptor is released. Added a callback from amdgpu_vm_fini to handle KFD VM destruction correctly in this case. v2: * Removed vm->vm_context check in amdgpu_amdkfd_gpuvm_destroy_cb, check vm->process_info earlier instead Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-03-15drm/amdgpu: Add helper to turn an existing VM into a compute VMFelix Kuehling2-0/+68
v2: Removed updating and checking of vm->vm_context v3: Enable amdgpu_vm_clear_bo in amdgpu_vm_make_compute Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-03-15drm/amdgpu: Fix initial validation of PD BO for KFD VMsFelix Kuehling1-1/+22
Make sure the PD BO is valid and attach the eviction fence during VM creation. This ensures that the pd_phys_address is actually valid and an eviction that would invalidate it triggers a KFD process eviction like it should. v2: Use uninterruptible waiting in initial PD validation Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-03-15drm/amdgpu: Move KFD-specific fields into struct amdgpu_vmFelix Kuehling3-68/+50
Remove struct amdkfd_vm and move the fields into struct amdgpu_vm. This will allow turning a VM created by a DRM render node into a KFD VM. v2: Removed vm_context field Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-03-15drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernelAndrey Grodzovsky1-2/+6
and amdgpu_bo_create_reserved. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Use atomic function to disable crtcs with dc enabledMikita Lipski1-3/+6
This change fixes the deadlock when unloading the driver with displays connected. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.cRex Zhu1-3/+0
make it symmetric with amdgpu_ucode_init_bo in amd_powerplay.c refine the "commit b22558bb4ff8fc9fe925222f90297d7a03a5fb20" Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Remove wrapper layer of smu ip functionsRex Zhu14-354/+70
1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Don't compared ip_block_type with ip_block_indexRex Zhu1-1/+1
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdgpu: Plus NULL function pointer checkRex Zhu1-3/+6
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-15drm/amdkfd: add missing include of mm.hOded Gabbay1-0/+1
This patch fixes kernel build in ARCH=frv Signed-off-by: Oded Gabbay <[email protected]>
2018-03-14drm/amdgpu/sdma4: Remove unused header file from sdma_v4_0.cFeifei Xu1-2/+0
Remove mmhub header files inclusion which not used. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu/sdma4: use num_instances for clock/powergating configAlex Deucher1-4/+4
Rather then relying on the asic type for the second instance. Makes it more consistent with the rest of the code. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Feifei Xu <[email protected]>
2018-03-14drm/amdgpu/dce: Don't turn off DP sink when disconnectedMichel Dänzer1-19/+12
Turning off the sink in this case causes various issues, because userspace expects it to stay on until it turns it off explicitly. Instead, turn the sink off and back on when a display is connected again. This dance seems necessary for link training to work correctly. Bugzilla: https://bugs.freedesktop.org/105308 Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: move getting pcie info to common codeAlex Deucher5-9/+5
No need to replicate it in several places. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu/soc15: always load the psp moduleAlex Deucher1-2/+1
Regardless of whether the user has selected psp fw loading or not. It's still needed for GPU reset among other things. There are already guards in place to avoid setting up the full psp if PSP fw loading is not enabled. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: use adev->firmware to determine whether to load the PSP moduleAlex Deucher1-1/+1
The per device firmware load method is limited to what makes sense for that asic rather than whatever arbitrary value may have been set by the user. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: move firmware loading type setup to common codeAlex Deucher4-7/+2
No need to replicate it in several places. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu/psp: add a few more fw load type checksAlex Deucher1-0/+9
We already checked and returned early in most of the IP functions, fill in the rest as well. Reviewed-by: Rex Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu/dce: Don't turn off DP sink when disconnectedMichel Dänzer1-19/+12
Turning off the sink in this case causes various issues, because userspace expects it to stay on until it turns it off explicitly. Instead, turn the sink off and back on when a display is connected again. This dance seems necessary for link training to work correctly. Bugzilla: https://bugs.freedesktop.org/105308 Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: save/restore backlight level in legacy dce codeAlex Deucher7-2/+40
Save/restore the backlight level scratch register in S3/S4 so the backlight level comes back at the previously requested level. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=199047 Fixes: 4ec6ecf48c64d (drm/amdgpu: drop scratch regs save and restore from S3/S4 handling) Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: fix prime teardown orderChristian König2-2/+2
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the hardware was done with the buffere. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: Move IH clientid defs to separate fileOak Zeng9-60/+21
This is preparation for sharing client ID definitions between amdgpu and amdkfd Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: Remove some unused elements from amdgpu_connector structHarry Wentland1-29/+0
They were used by amdgpu_dm at some point but since it has its own amdgpu_dm_connector now these aren't needed anymore. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: save/restore backlight level in legacy dce codeAlex Deucher7-2/+40
Save/restore the backlight level scratch register in S3/S4 so the backlight level comes back at the previously requested level. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=199047 Fixes: 4ec6ecf48c64d (drm/amdgpu: drop scratch regs save and restore from S3/S4 handling) Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: fix prime teardown orderChristian König2-2/+2
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the hardware was done with the buffere. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: explicit give BO type to amdgpu_bo_createChristian König12-66/+60
Drop the "kernel" and sg parameter and give the BO type to create explicit to amdgpu_bo_create instead of figuring it out from the parameters. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: initial validate the prime BOs into the CPU domainChristian König1-1/+3
Just set the GTT domain as mandatory, so that the BO is validated into it on first use. This allows us to setup the sg table later on. Signed-off-by: Christian König <[email protected]> Acked-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: drop the backing store when DMA-buf imports are evictedChristian König1-0/+6
Instead of moving this to the SYSTEM domain just drop the backing store and let the resulting allocation be freed. Signed-off-by: Christian König <[email protected]> Acked-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: add bo as parameter to the ttm_tt_create callbackChristian König1-4/+4
Instead of calculating the size in bytes just to recalculate the number of pages from it pass the BO directly to the function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: refactoring mailbox to fix TDR handshake bugs(v2)Monk Liu2-94/+109
this patch actually refactor mailbox implmentations, and all below changes are needed together to fix all those mailbox handshake issues exposured by heavey TDR test. 1)refactor all mailbox functions based on byte accessing for mb_control reason is to avoid touching non-related bits when writing trn/rcv part of mailbox_control, this way some incorrect INTR sent to hypervisor side could be avoided, and it fixes couple handshake bug. 2)trans_msg function re-impled: put a invalid logic before transmitting message to make sure the ACK bit is in a clear status, otherwise there is chance that ACK asserted already before transmitting message and lead to fake ACK polling. (hypervisor side have some tricks to workaround ACK bit being corrupted by VF FLR which hase an side effects that may make guest side ACK bit asserted wrongly), and clear TRANS_MSG words after message transferred. 3)for mailbox_flr_work, it is also re-worked: it takes the mutex lock first if invoked, to block gpu recover's participate too early while hypervisor side is doing VF FLR. (hypervisor sends FLR_NOTIFY to guest before doing VF FLR and sentds FLR_COMPLETE after VF FLR done, and the FLR_NOTIFY will trigger interrupt to guest which lead to mailbox_flr_work being invoked) This can avoid the issue that mailbox trans msg being cleared by its VF FLR. 4)for mailbox_rcv_irq IRQ routine, it should only peek msg and schedule mailbox_flr_work, instead of ACK to hypervisor itself, because FLR_NOTIFY msg sent from hypervisor side doesn't need VF's ACK (this is because VF's ACK would lead to hypervisor clear its trans_valid/msg, and this would cause handshake bug if trans_valid/msg is cleared not due to correct VF ACK but from a wrong VF ACK like this "FLR_NOTIFY" one) This fixed handshake bug that sometimes GUEST always couldn't receive "READY_TO_ACCESS_GPU" msg from hypervisor. 5)seperate polling time limite accordingly: POLL ACK cost no more than 500ms POLL MSG cost no more than 12000ms POLL FLR finish cost no more than 500ms 6) we still need to set adev into in_gpu_reset mode after we received FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed to open amdgpu dri device. FLR_NOFITY is received due to an IDLE hang detected from hypervisor side which indicating GPU is already die in this VF. v2: use MACRO as the offset of mailbox_control register don't test if NOTIFY_CMPL event in rcv_msg since it won't recieve that message anymore Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: implement mmio byte access helper for MBMonk Liu2-0/+32
mailbox registers can be accessed with a byte boundry according to BIF team, so this patch prepares register byte access and will be used by following patches. Actually, for mailbox registers once the byte field is touched even not changed, the mailbox behaves, so we need the byte width accessing to those sort of regs. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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