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2021-10-05drm/amdgpu: init iommu after amdkfd device initYifan Zhang1-4/+4
This patch is to fix clinfo failure in Raven/Picasso: Number of platforms: 1 Platform Profile: FULL_PROFILE Platform Version: OpenCL 2.2 AMD-APP (3364.0) Platform Name: AMD Accelerated Parallel Processing Platform Vendor: Advanced Micro Devices, Inc. Platform Extensions: cl_khr_icd cl_amd_event_callback Platform Name: AMD Accelerated Parallel Processing Number of devices: 0 Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: handle the case of pci_channel_io_frozen only in amdgpu_pci_resumeGuchun Chen2-0/+7
In current code, when a PCI error state pci_channel_io_normal is detectd, it will report PCI_ERS_RESULT_CAN_RECOVER status to PCI driver, and PCI driver will continue the execution of PCI resume callback report_resume by pci_walk_bridge, and the callback will go into amdgpu_pci_resume finally, where write lock is releasd unconditionally without acquiring such lock first. In this case, a deadlock will happen when other threads start to acquire the read lock. To fix this, add a member in amdgpu_device strucutre to cache pci_channel_state, and only continue the execution in amdgpu_pci_resume when it's pci_channel_io_frozen. Fixes: c9a6b82f45e2 ("drm/amdgpu: Implement DPC recovery") Suggested-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: print warning and taint kernel if lockup timeout is disabledChristian König1-0/+2
Make sure that we notice this in error reports. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: revert "Add autodump debugfs node for gpu reset v8"Christian König4-91/+0
This reverts commit 728e7e0cd61899208e924472b9e641dbeb0775c4. Further discussion reveals that this feature is severely broken and needs to be reverted ASAP. GPU reset can never be delayed by userspace even for debugging or otherwise we can run into in kernel deadlocks. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: init iommu after amdkfd device initYifan Zhang1-4/+4
This patch is to fix clinfo failure in Raven/Picasso: Number of platforms: 1 Platform Profile: FULL_PROFILE Platform Version: OpenCL 2.2 AMD-APP (3364.0) Platform Name: AMD Accelerated Parallel Processing Platform Vendor: Advanced Micro Devices, Inc. Platform Extensions: cl_khr_icd cl_amd_event_callback Platform Name: AMD Accelerated Parallel Processing Number of devices: 0 Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: During s0ix don't wait to signal GFXOFFLijo Lazar1-2/+12
In the rare event when GFX IP suspend coincides with a s0ix entry, don't schedule a delayed work, instead signal PMFW immediately to allow GFXOFF entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be signaled about GFXOFF status before amd-pmc module passes OS HINT to PMFW telling that everything is ready for a safe s0ix entry. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712 Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-10-05drm/amdkfd: fix a potential ttm->sg memory leakLang Yu1-0/+1
Memory is allocated for ttm->sg by kmalloc in kfd_mem_dmamap_userptr, but isn't freed by kfree in kfd_mem_dmaunmap_userptr. Free it! Fixes: 264fb4d332f5 ("drm/amdgpu: Add multi-GPU DMA mapping helpers") Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/gmc9: convert to IP version checkingAlex Deucher1-65/+71
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: remove some repeated includingsGuo Zhengkui1-2/+0
Remove two repeated includings in line 46 and 47. Acked-by: Christian König <[email protected]> Signed-off-by: Guo Zhengkui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: During s0ix don't wait to signal GFXOFFLijo Lazar1-2/+12
In the rare event when GFX IP suspend coincides with a s0ix entry, don't schedule a delayed work, instead signal PMFW immediately to allow GFXOFF entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be signaled about GFXOFF status before amd-pmc module passes OS HINT to PMFW telling that everything is ready for a safe s0ix entry. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712 Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: consolidate case statementsAlex Deucher1-7/+0
IP_VERSION(11, 0, 13) does the exact same thing as IP_VERSION(11, 0, 12) so squash them together. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/jpeg: add jpeg2.6 start/endJames Zhu1-2/+38
Add jpeg2.6 start/end with updated PCTL0_MMHUB_DEEPSLEEP_IB address. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/jpeg2: move jpeg2 shared macro to header fileJames Zhu2-20/+20
Move jpeg2 shared macro to header file Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdkfd: fix a potential ttm->sg memory leakLang Yu1-0/+1
Memory is allocated for ttm->sg by kmalloc in kfd_mem_dmamap_userptr, but isn't freed by kfree in kfd_mem_dmaunmap_userptr. Free it! Fixes: 264fb4d332f5 ("drm/amdgpu: Add multi-GPU DMA mapping helpers") Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add an option to override IP discovery table from a fileAlex Deucher2-5/+21
If you set amdgpu.discovery=2 you can force the the driver to fetch the IP discovery table from a file rather than from the table shipped on the device. This is useful for debugging and for device bring up and emulation when the tables may be in flux. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdkfd: clean up parameters in kgd2kfd_probeAlex Deucher2-6/+3
We can get the pdev and asic type from the adev. No need to pass them explicitly. v2: squash in build fix for !CONFIG_HSA_AMD from Anson Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add support for SRIOV in IP discovery pathAlex Deucher1-9/+25
Handle SRIOV requirements when adding IP blocks. v2: add comment about UVD/VCE support on vega20 SR-IOV Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: clean up set IP functionAlex Deucher1-335/+387
Split into several smaller per IP functions to make it easier to handle ordering issues for things like SR-IOV in a follow up patch. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: convert IP version array to include instancesAlex Deucher23-307/+316
Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by defaultAlex Deucher1-2/+2
For new chips with no explicit entry in the PCI ID list. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add new asic_type for IP discoveryAlex Deucher1-0/+1
Add a new asic type for asics where we don't have an explicit entry in the PCI ID list. We don't need an asic type for these asics, other than something higher than the existing ones, so just use this for all new asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/ucode: add default behaviorAlex Deucher1-3/+4
Default to PSP ucode loading unless the user specifies direct. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: get VCN harvest information from IP discovery tableAlex Deucher2-15/+8
Use the table rather than asic specific harvest registers. v2: remove harvesting register checking Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/vcn: remove manual instance settingAlex Deucher4-6/+2
Handled by IP discovery now. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/sdma: remove manual instance settingAlex Deucher3-36/+0
Handled by IP discovery now. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: get VCN and SDMA instances from IP discovery tableAlex Deucher1-0/+14
Rather than hardcoding it. We already have the number of VCN instances from a previous patch, so just update the VCN instances for chips with static tables. v2: squash in checks for SDMA3,4 (Guchun) v3: clarify VCN changes Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add VCN1 hardware IPAlex Deucher1-0/+1
So we can store the VCN IP revision for each instance of VCN. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/soc15: convert to IP version checkingAlex Deucher1-71/+88
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/vcn2.5: convert to IP version checkingAlex Deucher1-2/+2
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/amdgpu_vcn: convert to IP version checkingAlex Deucher1-26/+21
Use IP versions rather than asic_type to differentiate IP version specific features. v2: squash in fix for navy flounder and sienna cichlid Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/psp_v13.0: convert to IP version checkingAlex Deucher1-6/+8
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/psp_v11.0: convert to IP version checkingAlex Deucher1-22/+22
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/amdgpu_psp: convert to IP version checkingAlex Deucher1-43/+58
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/gfx9.0: convert to IP version checkingAlex Deucher1-107/+120
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/hdp4.0: convert to IP version checkingAlex Deucher1-7/+8
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/sdma4.0: convert to IP version checkingAlex Deucher1-47/+60
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: default to true in amdgpu_device_asic_has_dc_supportAlex Deucher1-1/+3
We are not going to support any new chips with the old non-DC code so make it the default. Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: drive all vega asics from the IP discovery tableAlex Deucher1-16/+0
Rather than hardcoding based on asic_type, use the IP discovery table to configure the driver. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/soc15: get rev_id in soc15_common_early_initAlex Deucher1-1/+1
for consistency with other SoCs. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add initial IP discovery support for vega based partsAlex Deucher1-30/+387
Hardcode the IP versions for asics without IP discovery tables and then enumerate the asics based on the IP versions. TODO: fix SR-IOV support v2: Squash in HDP fix for Renoir Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/soc15: export common IP functionsAlex Deucher2-1/+3
So they can be driven by IP discovery table. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add DCI HWIPAlex Deucher2-0/+2
So we can track grab the appropriate DCE info out of the IP discovery table. This is a separare IP from DCN. Acked-by: Harry Wentland <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: drive all navi asics from the IP discovery tableAlex Deucher1-20/+0
Rather than hardcoding based on asic_type, use the IP discovery table to configure the driver. v2: rebase Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/nv: convert to IP version checkingAlex Deucher1-37/+38
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/navi10_ih: convert to IP version checkingAlex Deucher1-8/+5
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/athub2.1: convert to IP version checkingAlex Deucher1-5/+4
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/athub2.0: convert to IP version checkingAlex Deucher1-4/+3
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/vcn3.0: convert to IP version checkingAlex Deucher1-4/+4
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/mmhub2.1: convert to IP version checkingAlex Deucher1-3/+3
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/mmhub2.0: convert to IP version checkingAlex Deucher1-41/+32
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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