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path: root/drivers/gpu/drm/amd/amdgpu
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2019-07-22drm/amdgpu/smu: move fan rpm query into the asic specific codeAlex Deucher1-2/+2
On vega20, there is an SMU message to query it. On navi, it's fetched from the metrics table. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-22drm/amdgpu: set sdma irq src num according to sdma instancesHawking Zhang1-2/+15
Otherwise, it will cause driver access non-existing sdma registers in gpu reset code path Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-22Merge v5.3-rc1 into drm-misc-nextMaxime Ripard106-1031/+24040
Noralf needs some SPI patches in 5.3 to merge some work on tinydrm. Signed-off-by: Maxime Ripard <[email protected]>
2019-07-19Merge tag 'drm-next-2019-07-19' of git://anongit.freedesktop.org/drm/drmLinus Torvalds28-116/+202
Pull drm fixes from Daniel Vetter: "Dave is back in shape, but now family got it so I'm doing the pull. Two things worthy of note: - nouveau feature pull was way too late, Dave&me decided to not take that, so Ben spun up a pull with just the fixes. - after some chatting with the arm display maintainers we decided to change a bit how that's maintained, for more oversight/review and cross vendor collab. More details below: nouveau: - bugfixes - TU116 enabling (minor iteration) :w amdgpu: - large pile of fixes for new hw support this release (navi, vega20) - audio hotplug fix - bunch of corner cases and small fixes all over for amdgpu/kfd komeda: - back out some new properties (from this merge window) that needs more pondering. bochs: - fb pitch setup core: - a new panel quirk - misc fixes" * tag 'drm-next-2019-07-19' of git://anongit.freedesktop.org/drm/drm: (73 commits) drm/nouveau/secboot/gp102-: remove WAR for SEC2 RTOS start bug drm/nouveau/flcn/gp102-: improve implementation of bind_context() on SEC2/GSP drm/nouveau: fix memory leak in nouveau_conn_reset() drm/nouveau/dmem: missing mutex_lock in error path drm/nouveau/hwmon: return EINVAL if the GPU is powered down for sensors reads drm/nouveau: fix bogus GPL-2 license header drm/nouveau: fix bogus GPL-2 license header drm/nouveau/i2c: Enable i2c pads & busses during preinit drm/nouveau/disp/tu102-: wire up scdc parameter setter drm/nouveau/core: recognise TU116 chipset drm/nouveau/kms: disallow dual-link harder if hdmi connection detected drm/nouveau/disp/nv50-: fix center/aspect-corrected scaling drm/nouveau/disp/nv50-: force scaler for any non-default LVDS/eDP modes drm/nouveau/mcp89/mmu: Use mcp77_mmu_new instead of g84_mmu_new on MCP89. drm/amd/display: init res_pool dccg_ref, dchub_ref with xtalin_freq drm/amdgpu/pm: remove check for pp funcs in freq sysfs handlers drm/amd/display: Force uclk to max for every state drm/amdkfd: Remove GWS from process during uninit drm/amd/amdgpu: Fix offset for vmid selection in debugfs interface drm/amd/powerplay: update vega20 driver if to fit latest SMU firmware ...
2019-07-18drm/amdgpu: use VCN firmware offset for cache windowLeo Liu1-3/+0
Since we are using the signed FW now, and also using PSP firmware loading, but it's still potential to break driver when loading FW directly instead of PSP, so we should add offset. Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: drop ras self testHawking Zhang1-7/+0
this function is not needed any more. error injection is the only way to validate ras but it can't be executed in amdgpu_ras_init, where gpu is even not initialized Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: only allow error injection to UMC IP blockHawking Zhang1-0/+6
error injection to other IP blocks (except UMC) will be enabled until RAS feature stablize on those IP blocks Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: disable GFX RAS by defaultHawking Zhang1-1/+1
GFX RAS has not been stablized yet. disable GFX ras until it is fully funcitonal. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: do not create ras debugfs/sysfs node for ASICs that don't have ↵Hawking Zhang1-0/+6
ras ability driver shouldn't init any ras debugfs/sysfs node for ASICs that don't have ras hardware ability Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: Default disable GDS for compute VMIDsJoseph Greathouse4-0/+36
The GDS and GWS blocks default to allowing all VMIDs to access all entries. Graphics VMIDs can handle setting these limits when the driver launches work. However, compute workloads under HWS control don't go through the kernel driver. Instead, HWS firmware should set these limits when a process is put into a VMID slot. Disable access to these devices by default by turning off all mask bits (for OA) and setting BASE=SIZE=0 (for GDS and GWS) for all compute VMIDs. If a process wants to use these resources, they can request this from the HWS firmware (when such capabilities are enabled). HWS will then handle setting the base and limit for the process when it is assigned to a VMID. This will also prevent user kernels from getting 'stuck' in GWS by accident if they write GWS-using code but HWS firmware is not set up to handle GWS reset. Until HWS is enabled to handle GWS properly, all GWS accesses will MEM_VIOL fault the kernel. v2: Move initialization outside of SRBM mutex Signed-off-by: Joseph Greathouse <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: flag arcturus as experimental for nowAlex Deucher1-3/+3
Current support will only work in internal engineering boards. Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: drop unused function definitionsAlex Deucher1-14/+0
These were dropped and the headers never got cleaned up. Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu:add all VCN rings into schedule request queueJames Zhu1-8/+18
Add all VCN instances' decode/encode/jpeg decode rings into drm_sched_rq list. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: enable all 8 sdma instances for Arcturus siliconLe Ma1-1/+1
The more 6 sdma instances work fine now with DF fix in vbios: * mmDF_PIE_AON_MiscClientsEnable(0x1c728)=0x3fe(DF_ALL_INSTANCE) [9:4]MmhubsEnable=3f (change from 0) Signed-off-by: Le Ma <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: Add more detail to the VM fault printingYong Zhao1-2/+16
With the printing, we don't need to parse the value on our own any more. Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: limit sdma instances to 2 for Arcturus in BU phaseLe Ma1-1/+1
Another 6 sdma instances do not work at present. Disable them to unblock KFD for silicon bringup as a workaround Signed-off-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: skip gfx 9 common golden settings for arctHawking Zhang1-2/+3
They are not needed by arct Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18amd/powerplay: No SW XGMI dpm for Arcturus rev 2Yong Zhao1-1/+1
xgmi dpm is handled by the SMU. Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: clean up nonexistent firmware declaration for ArcturusLe Ma1-3/+0
CPG firmwares are not used. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: init gds config for arctHawking Zhang1-0/+4
arct has 4KB gds (4 banks inside) so the max_wave_id should be 0xfff Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: keep stolen memory for arctHawking Zhang1-1/+3
Any dce register read back from arct is invalid. use hard code stolen memory for arct until we validate the s3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: init arct external rev idHawking Zhang1-0/+1
Properly set the external silicon revision id. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add arct gc golden settingsHawking Zhang1-0/+30
Golden GC register settings from the hw team. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add arct sdma golden settingsHawking Zhang1-0/+45
Golden SDMA register settings from the hw team. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add pci DID for Arcturus GL-XL.Feifei Xu1-0/+4
Add device ids for Arcturus. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: assign fb_start/end in mmhub v9.4 interfaceLe Ma1-0/+7
Align with mmhub v1.0. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add harvest support for ArcturusJames Zhu4-2/+77
Add VCN harvest support for Arcturus Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add multiple instances support for ArcturusJames Zhu3-627/+737
Arcturus has dual-VCN. Need add multiple instances support for Arcturus. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: modify amdgpu_vcn to support multiple instancesJames Zhu7-197/+210
Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support multiple vcns. There are no any logical changes here Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add vcn nbio doorbell range setting for 2nd vcn instanceJames Zhu5-7/+21
add vcn nbio doorbell range setting for 2nd vcn instance Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/: increase AMDGPU_MAX_RINGS to add 2nd vcn instanceJames Zhu1-1/+1
increase AMDGPU_MAX_RINGS to add 2nd vcn instance Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/: add doorbell assignment for 2nd vcn instanceJames Zhu1-2/+7
add doorbell assignment for 2nd vcn instance Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/: add ucodeID for 2nd vcn instanceJames Zhu1-0/+1
add ucodeID for 2nd vcn instance Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: correct ip for mmHDP_READ_CACHE_INVALIDATE register accessLe Ma1-1/+1
Use the proper IP index for HDP registers. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: set system aperture to cover whole FB region in mmhub v9.4Le Ma1-3/+2
In XGMI configuration, the FB region covers vram region from peer device, adjust system aperture to cover all of them Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: skip get/update xgmi topology info when no psp existsLe Ma1-22/+25
We don't currently have psp support for arcturus so provide a alternative mechanism in the meantime. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: enable the Doorbell support for VCN2.5Leo Liu2-12/+56
Including decode, encode, and JPEG decode rings Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add vcn doorbell range function to nbio7.4 (v2)Leo Liu2-0/+24
To setup the aperture for VCN2.5 v2: setup vcn doorbells in vcn2.5 hw_init (Alex) Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: enable VCN2.5 on ArcturusLeo Liu2-0/+31
VCN is the video decode and encode engine on Arcturus Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/VCN2.5: set JPEG decode ring functionsLeo Liu1-0/+78
Also reuse most of the JPEG2.0 decode ring functions Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add JPEG2.5 HW start and stopLeo Liu1-0/+104
JPEG engine initialization and suspend sequences Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/VCN2.5: set encode ring functionsLeo Liu1-0/+91
Also reuse most of the VCN2.0 encode ring functions Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/VCN2.5: set decode ring functionsLeo Liu1-0/+78
Also reuse most of the VCN2.0 decode ring functions Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add Arcturus to the VCN familyLeo Liu1-0/+5
including firmware support etc. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add VCN2.5 VCPU start and stopLeo Liu1-1/+466
HW engine initialization and suspend sequences. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: add VCN2.5 basic supportsLeo Liu2-1/+416
i.e. basic VCN IP SW structures VCN is the video codec block on the GPU. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/VCN2: expose rings functionsLeo Liu2-46/+79
They can be reused by VCN2.x family Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu/VCN2: put IB internal registers offset to structureLeo Liu2-23/+47
So the ring functions can be shared with different VCN versions with different internal registers offsets Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: declare sdma firmware binary files for ArcturusLe Ma1-0/+8
So that they are properly picked up as a driver dependency. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-18drm/amdgpu: Clear build undefined warningJames Zhu1-0/+5
Add amdgpu_amdkfd_arcturus_get_functions stub when CONFIG_HSA_AMD is undefinded. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Yong Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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