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path: root/drivers/gpu/drm/amd/amdgpu
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2019-08-12drm/amdgpu: add soc15 common ip block support for renoirHuang Rui1-0/+6
This patch adds common ip support for renoir. Acked-by: Huang Rui <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add renoir support for gpu_info and ip block settingHuang Rui1-1/+7
This patch adds renoir support for gpu_info firmware and ip block setting. Acked-by: Huang Rui <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add renoir asic_type enumHuang Rui1-0/+1
This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[]. Acked-by: Huang Rui <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: fix gfx9 soft recoveryPierre-Eric Pelloux-Prayer1-1/+1
The SOC15_REG_OFFSET() macro wasn't used, making the soft recovery fail. v2: use WREG32_SOC15 instead of WREG32 + SOC15_REG_OFFSET Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable mmhub clock gating for ArcturusLe Ma2-2/+3
Init MC_MGCG/LS flag. Also apply to athub CG. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add mmhub clock gating for ArcturusLe Ma3-6/+135
Add 2 mmhub instances CG Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: increase CGCG gfx idle threshold for ArcturusLe Ma1-2/+6
Follow the hw spec, and no need to consider gfxoff on Arcturus Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add GFX_CP_LS flag to ArcturusLe Ma1-0/+1
Missed AMD_CG_SUPPORT_GFX_CP_LS accidently when commit patch before drm/amdgpu: enable gfx clock gating for Arcturus Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: remove ras block's feature status info in sysfsTao Zhou1-18/+1
feature mask info is enough for rocm tool, "cat /sys/class/drm/card0/device/ras/features" will get the info like this: feature mask: 0x3ffb Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: split athub clock gating from mmhubLe Ma5-44/+154
Untie the bind of get/set athub CG state from mmhub, for cosmetic fix and Asic not using mmhub 1.0. Besides, also fix wrong athub CG state in amdgpu_pm_info. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable sdma clock gating for ArcturusLe Ma1-1/+3
Init sdma MGCG/LS flag Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add sdma clock gating for ArcturusLe Ma1-0/+1
Add ARCTURUS case in sdma set clockgating function Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: support sdma clock gating for more instancesLe Ma1-71/+34
Shorten the code with RREG32_SDMA/WREG32_SDMA macro in CG part. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable hdp clock gating for ArcturusLe Ma1-1/+3
Init hdp MGCG/LS flag as Vega20 Signed-off-by: Le Ma <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add hdp clock gating for ArcturusLe Ma1-1/+6
Add hdp CGLS for Arcturus in set common clockgating function Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable gfx clock gating for ArcturusLe Ma1-1/+4
Init gfx MGCG/LS and CGCG/LS flag. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add gfx clock gating for ArcturusLe Ma1-0/+4
Add ARCTURUS case in gfx set clockgating function. No 3d clock on Arcturus. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: create mmhub ras frameworkTao Zhou2-33/+82
enable mmhub ras feature and create sysfs/debugfs node for mmhub Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: support mmhub ras in amdgpu rasTao Zhou1-0/+5
call mmhub ras query/inject in amdgpu ras Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add amdgpu_mmhub_funcs definitionTao Zhou5-0/+56
add amdgpu_mmhub_funcs definition and initialize it, prepare for mmhub ras enablement Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add sub block parameter in ras inject commandTao Zhou1-7/+10
ras sub block index could be passed from shell command Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add check to avoid array bound issueGuchun Chen1-0/+3
Sub_block_index can be passed from user level, so add one check before accessing the array first to prevent array index out of bound problem. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: add navi14 PCI IDAlex Deucher1-0/+2
Add the navi14 PCI device id. Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: Update pitch on page flips without DC as wellMichel Dänzer5-1/+18
DC already handles this correctly since amdgpu minor version 31. Bump the minor version again so that xf86-video-amdgpu can take advantage of this working without DC as well now. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable vcn clock gating for navi12Xiaojie Yuan1-1/+2
enables vcn medium grained clock gating Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable athub clock gating for navi12Xiaojie Yuan1-1/+3
enables athub medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu/athub2: set clock gating for navi12Xiaojie Yuan1-0/+1
add navi12 define Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable ih clock gating for navi12Xiaojie Yuan1-0/+1
enables ih clock gating Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable mmhub clock gating for navi12Xiaojie Yuan1-1/+3
enables mmhub medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu/mmhub2: set clock gating for navi12Xiaojie Yuan1-0/+1
add navi12 define Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable sdma clock gating for navi12Xiaojie Yuan1-1/+3
enables sdma medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu/sdma5: set sdma clock gating for navi12Xiaojie Yuan1-0/+1
add navi12 define Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable hdp clock gating for navi12Xiaojie Yuan1-1/+3
enables hdp medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12drm/amdgpu: enable gfx clock gatings for navi12Xiaojie Yuan1-1/+5
enables following gfx clock gating features: - medium grained clock gating - medium grained light sleep - coarse grained clock gating - cp memory light sleep - rlc memory light sleep CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it. Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12Revert "drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)"Marek Olšák2-12/+1
This reverts commit 9ed2c993d723129f85101e51b2ccc36ef5400a67. SET_CONFIG_REG writes to memory if register shadowing is enabled, causing a VM fault. NGG streamout is unstable anyway, so all UMDs should use legacy streamout. I think Mesa is the only driver using NGG streamout. Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-12Merge tag 'drm-next-5.4-2019-08-09' of ↵Dave Airlie90-1267/+6866
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-09: Same as drm-next-5.4-2019-08-06, but with the readq/writeq stuff fixed and 5.3-rc3 backmerged. amdgpu: - Add navi14 support - Add navi12 support - Add Arcturus support - Enable mclk DPM for Navi - Misc DC display fixes - Add perfmon support for DF - Add scatter/gather display support for Raven - Improve SMU handling for GPU reset - RAS support for GFX - Drop last of drmP.h - Add support for wiping memory on buffer release - Allow cursor async updates for fb swaps - Misc fixes and cleanups amdkfd: - Add navi14 support - Add navi12 support - Add Arcturus support - CWSR trap handlers updates for gfx9, 10 - Drop last of drmP.h - Update MAINTAINERS radeon: - Misc fixes and cleanups - Make kexec more reliable by tearing down the GPU ttm: - Add release_notify callback uapi: - Add wipe memory on release flag for buffer creation Signed-off-by: Dave Airlie <[email protected]> [airlied: resolved conflicts with ttm resv moving] From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-10dma-buf: further relax reservation_object_add_shared_fenceChristian König1-6/+1
Other cores don't busy wait any more and we removed the last user of checking the seqno for changes. Drop updating the number for shared fences altogether. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/322379/?series=64837&rev=1
2019-08-09Merge tag 'v5.3-rc3' into drm-next-5.4Alex Deucher6-3/+39
Linux 5.3-rc3 Signed-off-by: Alex Deucher <[email protected]>
2019-08-09drm/amdgpu: remove RREG64/WREG64Tao Zhou2-37/+0
atomic 64 bits REG operations are useless currently Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-09drm/amdgpu: implement UMC 64 bits REG operationsTao Zhou2-5/+14
implement 64 bits operations via 32 bits interface v2: make use of lower_32_bits() and upper_32_bits() macros Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-09drm/amdgpu: replace readq/writeq with atomic64 operationsTao Zhou1-6/+2
what we really want is a read or write that is guaranteed to be 64 bits at a time, atomic64 operations are supported on all architectures Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-09Merge tag 'drm-misc-next-2019-08-08' of ↵Dave Airlie17-113/+138
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.4: UAPI Changes: - HDCP: Add a Content protection type property Cross-subsystem Changes: Core Changes: - Continue to rework the include dependencies - fb: Remove the unused drm_gem_fbdev_fb_create function - drm-dp-helper: Make the link rate calculation more tolerant to non-explicitly defined, yet supported, rates - fb-helper: Map DRM client buffer only when required, and instanciate a shadow buffer when the device has a dirty function or says so - connector: Add a helper to link the DDC adapter used by that connector to the userspace - vblank: Switch from DRM_WAIT_ON to wait_event_interruptible_timeout - dma-buf: Fix a stack corruption - ttm: Embed a drm_gem_object struct to make ttm_buffer_object a superclass of GEM, and convert drivers to use it. - hdcp: Improvements to report the content protection type to the userspace Driver Changes: - Remove drm_gem_prime_import/export from being defined in the drivers - Drop DRM_AUTH usage from drivers - Continue to drop drmP.h - Convert drivers to the connector ddc helper - ingenic: Add support for more panel-related cases - komeda: Support for dual-link - lima: Reduce logging - mpag200: Fix the cursor support - panfrost: Export GPU features register to userspace through an ioctl - pl111: Remove the CLD pads wiring support from the DT - rockchip: Rework to use DRM PSR helpers, fix a bug in the VOP_WIN_GET macro - sun4i: Improve support for color encoding and range - tinydrm: Rework SPI support, improve MIPI-DBI support, move to drm/tiny - vkms: Rework of the CRC tracking - bridges: - sii902x: Add support for audio graph card - tc358767: Rework AUX data handling code - ti-sn65dsi86: Add Debugfs and proper DSI mode flags support - panels - Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191, Boe Himax8279d, Sharp LD-D5116Z01B - Conversion of the device tree bindings to the YAML description - jh057n00900: Rework the enable / disable path - fbdev: - ssd1307fb: Support more devices based on that controller Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20190808121423.xzpedzkpyecvsiy4@flea
2019-08-07mm/hmm: make HMM_MIRROR an implicit optionChristoph Hellwig1-1/+3
Make HMM_MIRROR an option that is selected by drivers wanting to use it instead of a user visible option as it is just a low-level implementation detail. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2019-08-07mm/hmm: remove the page_shift member from struct hmm_rangeChristoph Hellwig1-1/+0
All users pass PAGE_SIZE here, and if we wanted to support single entries for huge pages we should really just add a HMM_FAULT_HUGEPAGE flag instead that uses the huge page size instead of having the caller calculate that size once, just for the hmm code to verify it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christoph Hellwig <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2019-08-07mm/hmm: remove superfluous arguments from hmm_range_registerChristoph Hellwig1-2/+5
The start, end and page_shift values are all saved in the range structure, so we might as well use that for argument passing. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2019-08-07amdgpu: don't initialize range->list in amdgpu_hmm_init_rangeChristoph Hellwig1-1/+0
The list is used to add the range to another list as an entry in the core hmm code, and intended as a private member not exposed to drivers. There is no need to initialize it in a driver. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2019-08-07amdgpu: remove -EAGAIN handling for hmm_range_faultChristoph Hellwig1-20/+3
hmm_range_fault can only return -EAGAIN if called with the HMM_FAULT_ALLOW_RETRY flag, which amdgpu never does. Remove the handling for the -EAGAIN case with its non-standard locking scheme. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2019-08-06Revert "drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)"Marek Olšák2-12/+1
This reverts commit 9ed2c993d723129f85101e51b2ccc36ef5400a67. SET_CONFIG_REG writes to memory if register shadowing is enabled, causing a VM fault. NGG streamout is unstable anyway, so all UMDs should use legacy streamout. I think Mesa is the only driver using NGG streamout. Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-06drm/amdgpu: pin the csb buffer on hw init for gfx v8Likun Gao1-0/+40
Without this pin, the csb buffer will be filled with inconsistent data after S3 resume. And that will causes gfx hang on gfxoff exit since this csb will be executed then. Signed-off-by: Likun Gao <[email protected]> Tested-by: Paul Gover <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-06drm/amdgpu: Fix GPU reset crash regression.Andrey Grodzovsky1-0/+2
amdgpu_ip_block.status.hw for GMC wasn't set to false on suspend during GPU reset and so on resume gmc_v9_0_resume wasn't called. Caused by 'drm/amdgpu: fix double ucode load by PSP(v3)' Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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