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2019-10-28drm/amd: correct "_LENTH" mispelling in constantWambui Karuga3-5/+5
Correct the "_LENTH" mispelling in the AMDGPU_MAX_TIMEOUT_PARAM_LENGTH constant. Signed-off-by: Wambui Karuga <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-28drm/amd: declare amdgpu_exp_hw_support in amdgpu.hWambui Karuga1-0/+1
Declare `amdgpu_exp_hw_support` as extern in amdgpu.h to address the following sparse warning: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:118:5: warning: symbol 'amdgpu_exp_hw_support' was not declared. Should it be static? Signed-off-by: Wambui Karuga <[email protected]> Suggested-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: If amdgpu_ib_schedule fails return back the error.Andrey Grodzovsky1-1/+3
Use ERR_PTR to return back the error happened during amdgpu_ib_schedule. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/gfx10: update gfx golden settings for navi12Tianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/gfx10: update gfx golden settings for navi14Tianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/gfx10: update gfx golden settingsTianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amd/powerplay: skip unsupported clock limit settings on Arcturus V2Evan Quan1-0/+13
For Arcturus, clock limit settings on uclk/socclk/fclk domains are not supported. V2: simplify the code to support both SGPU and MGPU cases Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: Allow reading more status registers on si/cikMarek Olšák5-1/+34
Allow userspace to read the same status registers for every family. Based on commit c7890fea, added any of these registers if defined in the include files of each architecture. Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: Move amdgpu_ras_recovery_init to after SMU ready.Andrey Grodzovsky2-11/+13
For Arcturus the I2C traffic is done through SMU tables and so we must postpone RAS recovery init to after they are ready which is in amdgpu_device_ip_hw_init_phase2. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: Use ARCTURUS in RAS EEPROM.Andrey Grodzovsky1-1/+8
Add Arcturus EEPROM/I2C support in generic EEPROM code. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: remove unused parameter in amdgpu_gfx_kiq_free_ringNirmoy Das5-7/+5
Signed-off-by: Nirmoy Das <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/vcn: Enable VCN2.5 encodingJames Zhu1-3/+0
After VCN2.5 firmware (Version ENC: 1.1 Revision: 11), VCN2.5 encoding can work properly. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)Pelloux-prayer, Pierre-eric1-0/+1
This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481. v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older hw Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: Fix SDMA hang when performing VKexample testchen gong1-0/+1
VKexample test hang during Occlusion/SDMA/Varia runs. Clear XNACK_WATERMK in reg SDMA0_UTCL1_WATERMK to fix this issue. Signed-off-by: chen gong <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: define macros for retire page reservationGuchun Chen1-6/+11
Easy for maintainance. Signed-off-by: Guchun Chen <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: refine reboot debugfs operation in ras case (v3)Guchun Chen1-7/+12
Ras reboot debugfs node allows user one easy control to avoid gpu recovery hang problem and directly reboot system per card basis, after ras uncorrectable error happens. However, it is one common entry, which should get rid of ras_ctrl node and remove ip dependence when inputting by user. So add one new auto_reboot node in ras debugfs dir to achieve this. v2: in commit mssage, add justification why ras reboot debugfs node is needed. v3: use debugfs_create_bool to create debugfs file for boolean value Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amd/powerplay: add lock protection for swSMU APIs V2Evan Quan3-19/+16
This is a quick and low risk fix. Those APIs which are exposed to other IPs or to support sysfs/hwmon interfaces or DAL will have lock protection. Meanwhile no lock protection is enforced for swSMU internal used APIs. Future optimization is needed. V2: strip the lock protection for all swSMU internal APIs Signed-off-by: Evan Quan <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Acked-by: Feifei Xu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/psp: fix spelling mistake "initliaze" -> "initialize"Colin Ian King1-1/+1
There is a spelling mistake in a DRM_ERROR error message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/psp11: fix typo in commentXiaojie Yuan1-1/+1
Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/psp11: wait for sOS ready for ring creationXiaojie Yuan1-0/+8
Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu: call amdgpu_vm_prt_fini before deleting the root PDPelloux-prayer, Pierre-eric1-9/+10
amdgpu_vm_prt_fini uses "vm->root.base.bo" so it must still be valid when we call it. Fixes: b65709a92156 ("drm/amdgpu: reserve the root PD while freeing PASIDs") Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/vce: make some functions staticAlex Deucher2-10/+10
They are not used outside of the file they are defined in. Reviewed-by: James Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/vce: fix allocation size in enc ring testAlex Deucher2-5/+16
We need to allocate a large enough buffer for the feedback buffer, otherwise the IB test can overwrite other memory. Reviewed-by: James Zhu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-25drm/amdgpu/psp: declare PSP TA firmwarechen gong1-0/+3
Add PSP TA firmware declaration for raven raven2 picasso Signed-off-by: chen gong <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-26Merge tag 'drm-next-5.5-2019-10-09' of ↵Dave Airlie114-2843/+4323
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.5-2019-10-09: amdgpu: - Additional RAS enablement for vega20 - RAS page retirement and bad page storage in EEPROM - No GPU reset with unrecoverable RAS errors - Reserve vram for page tables rather than trying to evict - Fix issues with GPU reset and xgmi hives - DC i2c over aux fixes - Direct submission for clears, PTE/PDE updates - Improvements to help support recoverable GPU page faults - Silence harmless SAD block messages - Clean up code for creating a bo at a fixed location - Initial DC HDCP support - Lots of documentation fixes - GPU reset for renoir - Add IH clockgating support for soc15 asics - Powerplay improvements - DC MST cleanups - Add support for MSI-X - Misc cleanups and bug fixes amdkfd: - Query KFD device info by asic type rather than pci ids - Add navi14 support - Add renoir support - Add navi12 support - gfx10 trap handler improvements - pasid cleanups - Check against device cgroup ttm: - Return -EBUSY with pipelining with no_gpu_wait radeon: - Silence harmless SAD block messages device_cgroup: - Export devcgroup_check_permission Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-25drm/ttm: remove pointers to globalsChristian König2-6/+5
As the name says global memory and bo accounting is global. So it doesn't make to much sense having pointers to global structures all around the code. Signed-off-by: Christian König <[email protected]> Reviewed-by: Thomas Hellström <[email protected]> Link: https://patchwork.freedesktop.org/patch/332879/
2019-10-25drm/ttm: always keep BOs on the LRUChristian König4-9/+8
This allows blocking for BOs to become available in the memory management. Amdgpu is doing this for quite a while now during CS. Now apply the new behavior to all drivers using TTM. Signed-off-by: Christian König <[email protected]> Acked-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/332878/
2019-10-23Merge drm/drm-next into drm-misc-nextSean Paul11-65/+91
Parroting Daniel's backmerge justification from 2e79e22e092acd55da0b2db066e4826d7d152c41: Thierry needs fd70c7755bf0 ("drm/bridge: tc358767: fix max_tu_symbol value") to be able to merge his dp_link patch series. Signed-off-by: Sean Paul <[email protected]>
2019-10-23Merge v5.4-rc4 into drm-nextDaniel Vetter4-43/+43
Thierry needs fd70c7755bf0 ("drm/bridge: tc358767: fix max_tu_symbol value") to be able to merge his dp_link patch series. Some adjacent changes conflicts, plus some clashes in i915 due to cherry-picking and git trying to be helpful and leaving both versions in. Signed-off-by: Daniel Vetter <[email protected]>
2019-10-17drm/amdgpu: fix amdgpu trace event print string format errorKevin Wang1-9/+9
the trace event print string format error. (use integer type to handle string) before: amdgpu_test_kev-1556 [002] 138.508781: amdgpu_cs_ioctl: sched_job=8, timeline=gfx_0.0.0, context=177, seqno=1, ring_name=ffff94d01c207bf0, num_ibs=2 after: amdgpu_test_kev-1506 [004] 370.703783: amdgpu_cs_ioctl: sched_job=12, timeline=gfx_0.0.0, context=234, seqno=2, ring_name=gfx_0.0.0, num_ibs=1 change trace event list: 1.amdgpu_cs_ioctl 2.amdgpu_sched_run_job 3.amdgpu_ib_pipe_sync Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu/psp: add psp memory training implementation(v3)Tianci.Yin3-0/+171
add memory training implementation code to save resume time. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: reserve vram for memory training(v4)Tianci.Yin1-0/+91
memory training using specific fixed vram segment, reserve these segments before anyone may allocate it. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: add psp memory training callbacks and macroTianci.Yin2-0/+73
add interface for memory training. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu/atomfirmware: add memory training related helper functions(v3)Tianci.Yin4-0/+150
parse firmware to get memory training capability and fb location. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: introduce psp_v11_0_is_sos_alive interface(v2)Tianci.Yin1-9/+13
introduce psp_v11_0_is_sos_alive func for common use. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: add a generic fb accessing helper function(v3)Tianci.Yin3-11/+33
add a generic helper function for accessing framebuffer via MMIO Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: update amdgpu_discovery to handle revisionTianci.Yin2-2/+4
update amdgpu_discovery to get IP revision. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu/vcn: fix allocation size in enc ring testAlex Deucher1-12/+23
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. - Session info is 128K according to mesa - Use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241 Acked-by: Christian König <[email protected]> Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu/uvd7: fix allocation size in enc ring test (v2)Alex Deucher1-11/+22
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. v2: - session info is 128K according to mesa - use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241 Acked-by: Christian König <[email protected]> Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu/uvd6: fix allocation size in enc ring test (v2)Alex Deucher1-10/+21
We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. v2: - session info is 128K according to mesa - use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241 Acked-by: Christian König <[email protected]> Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: fix S3 failed as RLC safe mode entry stucked in polloing gfx acqPrike Liang1-5/+0
Fix gfx cgpg setting sequence for RLC deadlock at safe mode entry in polling gfx response. The patch can fix VCN IB test failed and DAL get dispaly count failed issue. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/amdgpu: add GFX_PIPELINE capacity check for updating gfx cgpgPrike Liang1-1/+2
Before disable gfx pipeline power gating need check the flag AMD_PG_SUPPORT_GFX_PIPELINE. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-17drm/ttm: rename ttm_fbdev_mmapGerd Hoffmann1-1/+4
Rename ttm_fbdev_mmap to ttm_bo_mmap_obj. Move the vm_pgoff sanity check to amdgpu_bo_fbdev_mmap (only ttm_fbdev_mmap user in tree). The ttm_bo_mmap_obj function can now be used to map any buffer object. This allows to implement &drm_gem_object_funcs.mmap in gem ttm helpers. v3: patch added to series Signed-off-by: Gerd Hoffmann <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/amdgpu: enable BACO reset for SMU7 based dGPUs (v2)Alex Deucher4-10/+128
Use BACO to reset the GPU if supported on SMU7 based dGPUs. v2: don't use baco on CI parts Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/soc15: add support for baco reset with swSMUAlex Deucher1-20/+35
Add support for vega20 when the swSMU path is used. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: remove in_baco_reset hackAlex Deucher2-4/+0
It was a vega20 specific hack. Check if we are in reset and what reset method we are using. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: simplify ATPX detectionAlex Deucher1-11/+1
Use the base class rather than the specific class and drop the second loop. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move gpu reset out of amdgpu_device_suspendAlex Deucher2-5/+6
Move it into the caller. There are cases were we don't want it. We need it for hibernation, but we don't need it for runtime pm, so drop it for runtime pm. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move pci_save_state into suspend pathAlex Deucher1-1/+1
for amdgpu_device_suspend. This follows the logic in the resume path. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15dmr/amdgpu: Fix crash on SRIOV for ERREVENT_ATHUB_INTERRUPT interrupt.Andrey Grodzovsky1-0/+6
Ignre the ERREVENT_ATHUB_INTERRUPT for systems without RAS. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-and-tested-by: Jack Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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