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2021-08-05drm/amdgpu: fix checking pmops when PM_SLEEP is not enabledRandy Dunlap1-1/+1
'pm_suspend_target_state' is only available when CONFIG_PM_SLEEP is set/enabled. OTOH, when both SUSPEND and HIBERNATION are not set, PM_SLEEP is not set, so this variable cannot be used. ../drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: In function ‘amdgpu_acpi_is_s0ix_active’: ../drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:1046:11: error: ‘pm_suspend_target_state’ undeclared (first use in this function); did you mean ‘__KSYM_pm_suspend_target_state’? return pm_suspend_target_state == PM_SUSPEND_TO_IDLE; ^~~~~~~~~~~~~~~~~~~~~~~ __KSYM_pm_suspend_target_state Also use shorter IS_ENABLED(CONFIG_foo) notation for checking the 2 config symbols. Fixes: 91e273712ab8dd ("drm/amdgpu: Check pmops for desired suspend state") Signed-off-by: Randy Dunlap <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-08-02drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.Yifan Zhang1-1/+20
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-02Revert "Revert "drm/amdkfd: Only apply TLB flush optimization on ALdebaran""Eric Huang1-0/+6
This reverts commit 53d0533049a573298f74ae07a39db14163960e68. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-02Revert "Revert "drm/amdgpu: Fix warning of Function parameter or member not ↵Eric Huang1-0/+1
described"" This reverts commit 4e7b93ca52fb228b177168d436449c5671415a72. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-02Revert "Revert "drm/amdkfd: Make TLB flush conditional on mapping""Eric Huang2-9/+12
This reverts commit 7ed9876c9793bfe96fed58ba645d6c8e32f26001. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-02Revert "Revert "drm/amdgpu: Add table_freed parameter to amdgpu_vm_bo_update""Eric Huang4-10/+10
This reverts commit 024d8811c90ed56d8b90cdcf71e51c9fedeff460. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-02drm/amdgpu: Fix out-of-bounds read when update mappingxinhui pan1-1/+2
If one GTT BO has been evicted/swapped out, it should sit in CPU domain. TTM only alloc struct ttm_resource instead of struct ttm_range_mgr_node for sysMem. Now when we update mapping for such invalidated BOs, we might walk out of bounds of struct ttm_resource. Three possible fix: 1) Let sysMem manager alloc struct ttm_range_mgr_node, like ttm_range_manager does. 2) Pass pages_addr to update_mapping function too, but need memset pages_addr[] to zero when unpopulate. 3) Init amdgpu_res_cursor directly. bug is detected by kfence. ================================================================== BUG: KFENCE: out-of-bounds read in amdgpu_vm_bo_update_mapping+0x564/0x6e0 Out-of-bounds read at 0x000000008ea93fe9 (64B right of kfence-#167): amdgpu_vm_bo_update_mapping+0x564/0x6e0 [amdgpu] amdgpu_vm_bo_update+0x282/0xa40 [amdgpu] amdgpu_vm_handle_moved+0x19e/0x1f0 [amdgpu] amdgpu_cs_vm_handling+0x4e4/0x640 [amdgpu] amdgpu_cs_ioctl+0x19e7/0x23c0 [amdgpu] drm_ioctl_kernel+0xf3/0x180 [drm] drm_ioctl+0x2cb/0x550 [drm] amdgpu_drm_ioctl+0x5e/0xb0 [amdgpu] kfence-#167 [0x000000008e11c055-0x000000001f676b3e ttm_sys_man_alloc+0x35/0x80 [ttm] ttm_resource_alloc+0x39/0x50 [ttm] ttm_bo_swapout+0x252/0x5a0 [ttm] ttm_device_swapout+0x107/0x180 [ttm] ttm_global_swapout+0x6f/0x130 [ttm] ttm_tt_populate+0xb1/0x2a0 [ttm] ttm_bo_handle_move_mem+0x17e/0x1d0 [ttm] ttm_mem_evict_first+0x59d/0x9c0 [ttm] ttm_bo_mem_space+0x39f/0x400 [ttm] ttm_bo_validate+0x13c/0x340 [ttm] ttm_bo_init_reserved+0x269/0x540 [ttm] amdgpu_bo_create+0x1d1/0xa30 [amdgpu] amdgpu_bo_create_user+0x40/0x80 [amdgpu] amdgpu_gem_object_create+0x71/0xc0 [amdgpu] amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu+0x2f2/0xcd0 [amdgpu] kfd_ioctl_alloc_memory_of_gpu+0xe2/0x330 [amdgpu] kfd_ioctl+0x461/0x690 [amdgpu] Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-30drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.Yifan Zhang1-1/+20
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-30drm/amdgpu: Fix out-of-bounds read when update mappingxinhui pan1-1/+2
If one GTT BO has been evicted/swapped out, it should sit in CPU domain. TTM only alloc struct ttm_resource instead of struct ttm_range_mgr_node for sysMem. Now when we update mapping for such invalidated BOs, we might walk out of bounds of struct ttm_resource. Three possible fix: 1) Let sysMem manager alloc struct ttm_range_mgr_node, like ttm_range_manager does. 2) Pass pages_addr to update_mapping function too, but need memset pages_addr[] to zero when unpopulate. 3) Init amdgpu_res_cursor directly. bug is detected by kfence. ================================================================== BUG: KFENCE: out-of-bounds read in amdgpu_vm_bo_update_mapping+0x564/0x6e0 Out-of-bounds read at 0x000000008ea93fe9 (64B right of kfence-#167): amdgpu_vm_bo_update_mapping+0x564/0x6e0 [amdgpu] amdgpu_vm_bo_update+0x282/0xa40 [amdgpu] amdgpu_vm_handle_moved+0x19e/0x1f0 [amdgpu] amdgpu_cs_vm_handling+0x4e4/0x640 [amdgpu] amdgpu_cs_ioctl+0x19e7/0x23c0 [amdgpu] drm_ioctl_kernel+0xf3/0x180 [drm] drm_ioctl+0x2cb/0x550 [drm] amdgpu_drm_ioctl+0x5e/0xb0 [amdgpu] kfence-#167 [0x000000008e11c055-0x000000001f676b3e ttm_sys_man_alloc+0x35/0x80 [ttm] ttm_resource_alloc+0x39/0x50 [ttm] ttm_bo_swapout+0x252/0x5a0 [ttm] ttm_device_swapout+0x107/0x180 [ttm] ttm_global_swapout+0x6f/0x130 [ttm] ttm_tt_populate+0xb1/0x2a0 [ttm] ttm_bo_handle_move_mem+0x17e/0x1d0 [ttm] ttm_mem_evict_first+0x59d/0x9c0 [ttm] ttm_bo_mem_space+0x39f/0x400 [ttm] ttm_bo_validate+0x13c/0x340 [ttm] ttm_bo_init_reserved+0x269/0x540 [ttm] amdgpu_bo_create+0x1d1/0xa30 [amdgpu] amdgpu_bo_create_user+0x40/0x80 [amdgpu] amdgpu_gem_object_create+0x71/0xc0 [amdgpu] amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu+0x2f2/0xcd0 [amdgpu] kfd_ioctl_alloc_memory_of_gpu+0xe2/0x330 [amdgpu] kfd_ioctl+0x461/0x690 [amdgpu] Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-30Merge tag 'amd-drm-next-5.15-2021-07-29' of ↵Dave Airlie60-1164/+3006
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.15-2021-07-29: amdgpu: - VCN/JPEG power down sequencing fixes - Various navi pcie link handling fixes - Clockgating fixes - Yellow Carp fixes - Beige Goby fixes - Misc code cleanups - S0ix fixes - SMU i2c bus rework - EEPROM handling rework - PSP ucode handling cleanup - SMU error handling rework - AMD HDMI freesync fixes - USB PD firmware update rework - MMIO based vram access rework - Misc display fixes - Backlight fixes - Add initial Cyan Skillfish support - Overclocking fixes suspend/resume amdkfd: - Sysfs leak fix - Add counters for vm faults and migration - GPUVM TLB optimizations radeon: - Misc fixes Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-07-28drm/amdgpu: enable psp front door loading by default for cyan_skillfish2Huang Rui1-3/+4
The function is ready on psp firmware, and enable it by default. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: adjust fence driver enable sequenceLikun Gao3-47/+14
Fence driver was enabled per ring when sw init on per IP block before. Change to enable all the fence driver at the same time after amdgpu_device_ip_init finished. Rename some function related to fence to make it reasonable for read. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: Added PSP13 BL loading support for additional driversJohn Clements1-0/+18
Added BL loading support for soc/intf/dbg drivers Signed-off-by: John Clements <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: Consolidated PSP13 BL FW loadingJohn Clements1-35/+11
Remove duplicate code Signed-off-by: John Clements <[email protected]> Reviewed-by: Hawking Zhang <[email protected]>. Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: Added support for added psp driver binaries FWJohn Clements3-7/+70
Detect psp driver binaries packed into FW and try to load the FW Signed-off-by: John Clements <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: Added latest PSP FW headerJohn Clements2-21/+116
Improved handling for scalling PSP FW binaries Signed-off-by: John Clements <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: remove the access of xxx_PSP_DEBUG on cycan_skillfishHuang Rui1-2/+0
It won't need to clear the xxx_PSP_DEBUG registers, because firmware will handle this change. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu/display: add support for multiple backlightsAlex Deucher1-2/+2
On platforms that support multiple backlights, register each one separately. This lets us manage them independently rather than registering a single backlight and applying the same settings to both. v2: fix typo: Reported-by: kernel test robot <[email protected]> Reviewed-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28Revert "Revert "drm/amdgpu: Fix warning of Function parameter or member not ↵Eric Huang1-0/+1
described"" This reverts commit 4e7b93ca52fb228b177168d436449c5671415a72. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28Revert "Revert "drm/amdkfd: Make TLB flush conditional on mapping""Eric Huang2-9/+12
This reverts commit 7ed9876c9793bfe96fed58ba645d6c8e32f26001. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28Revert "Revert "drm/amdgpu: Add table_freed parameter to amdgpu_vm_bo_update""Eric Huang4-10/+10
This reverts commit 024d8811c90ed56d8b90cdcf71e51c9fedeff460. Revert reason: The issue has been resolved. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-27drm/amdgpu: Check pmops for desired suspend statePratik Vishwakarma1-1/+2
[Why] User might change the suspend behaviour from OS. [How] Check with pm for target suspend state and set s0ix flag only for s2idle state. v2: User might change default suspend state, use target state v3: squash in build fix Suggested-by: Lijo Lazar <[email protected]> Signed-off-by: Pratik Vishwakarma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-07-27drm/amdgpu: Rename amdgpu_acpi_is_s0ix_supportedPratik Vishwakarma3-6/+6
Rename amdgpu_acpi_is_s0ix_supported to better explain functionality by renaming to amdgpu_acpi_is_s0ix_active Signed-off-by: Pratik Vishwakarma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-27drm/amdgpu: Check pmops for desired suspend statePratik Vishwakarma1-1/+2
[Why] User might change the suspend behaviour from OS. [How] Check with pm for target suspend state and set s0ix flag only for s2idle state. v2: User might change default suspend state, use target state v3: squash in build fix Suggested-by: Lijo Lazar <[email protected]> Signed-off-by: Pratik Vishwakarma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-26drm/amdgpu: Avoid printing of stack contents on firmware load errorJiri Kosina1-4/+3
In case when psp_init_asd_microcode() fails to load ASD microcode file, psp_v12_0_init_microcode() tries to print the firmware filename that failed to load before bailing out. This is wrong because: - the firmware filename it would want it print is an incorrect one as psp_init_asd_microcode() and psp_v12_0_init_microcode() are loading different filenames - it tries to print fw_name, but that's not yet been initialized by that time, so it prints random stack contents, e.g. amdgpu 0000:04:00.0: Direct firmware load for amdgpu/renoir_asd.bin failed with error -2 amdgpu 0000:04:00.0: amdgpu: fail to initialize asd microcode amdgpu 0000:04:00.0: amdgpu: psp v12.0: Failed to load firmware "\xfeTO\x8e\xff\xff" Fix that by bailing out immediately, instead of priting the bogus error message. Reported-by: Vojtech Pavlik <[email protected]> Signed-off-by: Jiri Kosina <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-07-26drm/amdgpu: Fix resource leak on probe error pathJiri Kosina1-6/+2
This reverts commit 4192f7b5768912ceda82be2f83c87ea7181f9980. It is not true (as stated in the reverted commit changelog) that we never unmap the BAR on failure; it actually does happen properly on amdgpu_driver_load_kms() -> amdgpu_driver_unload_kms() -> amdgpu_device_fini() error path. What's worse, this commit actually completely breaks resource freeing on probe failure (like e.g. failure to load microcode), as amdgpu_driver_unload_kms() notices adev->rmmio being NULL and bails too early, leaving all the resources that'd normally be freed in amdgpu_acpi_fini() and amdgpu_device_fini() still hanging around, leading to all sorts of oopses when someone tries to, for example, access the sysfs and procfs resources which are still around while the driver is gone. Fixes: 4192f7b57689 ("drm/amdgpu: unmap register bar on device init failure") Reported-by: Vojtech Pavlik <[email protected]> Signed-off-by: Jiri Kosina <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2021-07-26Backmerge tag 'v5.14-rc3' into drm-nextDave Airlie6-352/+95
Linux 5.14-rc3 Daniel said we should pull the nouveau fix from fixes in here, probably a good plan. Signed-off-by: Dave Airlie <[email protected]>
2021-07-23drm/amdgpu: retire sdma v5_2 golden settings from driverHawking Zhang1-17/+0
They are initalized by hardware during power up phase, starting from sdma v5_2 generation Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: Add msix restore for pass-through modeChengzhe Liu1-1/+1
In pass-through mode, after mode 1 reset, msix enablement status would lost and never receives interrupt again. So, we should restore msix status after mode 1 reset. Signed-off-by: Chengzhe Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: Change the imprecise outputRoy Sun1-3/+3
The fail reason is that the vfgate is disabled Signed-off-by: Roy Sun <[email protected]> Reviewed-by: Peng Ju Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: Clear doorbell interrupt status for Sienna CichlidChengzhe Liu3-0/+26
On Sienna Cichlid, in pass-through mode, if we unload the driver in BACO mode(RTPM), then the kernel would receive thousands of interrupts. That's because there is doorbell monitor interrupt on BIF, so KVM keeps injecting interrupts to the guest VM. So we should clear the doorbell interrupt status after BACO exit. v2: Modify coding style and commit message Signed-off-by: Chengzhe Liu <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add pci device id for cyan_skillfishTao Zhou1-0/+3
Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add autoload_supported check for RLC autoloadLang Yu1-1/+2
Asic cyan_skilfish2 won't support RLC autoload when using front door loading. We just use PSP to load firmware like gfx9 here. So add autoload_supported flag check instead of just checking firmware load type for RLC autoload. Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: enable SMU for cyan_skilfishLang Yu1-8/+9
Enable SMU support for cyan_skilfish. v2: Squash in fix (Alex) Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: use direct loading by default for cyan_skillfish2Lang Yu1-0/+3
Will switch to front door loading by default after this function is stable. v2: use APU flags (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: enable psp v11.0.8 for cyan_skillfishLang Yu3-0/+13
Add psp v11.0.8 to ip block initialization. v2: use APU flags (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: init psp v11.0.8 function for cyan_skillfishLang Yu1-0/+7
Add psp v11.0.8 function into psp driver. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add psp v11.0.8 driver for cyan_skillfishLang Yu3-0/+239
Introduce the psp v11.0.8 driver for cyan_skillfish. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add nbio support for cyan_skillfishTao Zhou1-1/+4
nbio version is 2.3. v2: Make it more explicit (Alex) Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add chip early init for cyan_skillfishTao Zhou1-0/+5
Set cg/pg flags and rev id for cyan_skillfish. Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add gc v10 golden settings for cyan_skillfishTao Zhou1-0/+47
v2: squash in updates from Ray Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add sdma v5 golden settings for cyan_skillfishTao Zhou1-0/+36
Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add cyan_skillfish support in gfx v10Tao Zhou1-0/+14
Add gfx support for cyan_skillfish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add cyan_skillfish support in gmc v10Tao Zhou1-0/+3
Add gmc support for cyan_skillfish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: load fw direclty for cyan_skillfishTao Zhou1-0/+2
Use backdoor loading. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add sdma fw loading support for cyan_skillfishTao Zhou1-0/+12
Same as Navi10. v2: squash in updates (Alex) Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: add cp/rlc fw loading support for cyan_skillfishTao Zhou1-0/+39
Add cp/rlc fw loading support and gfx golden setting. v2: squash in updates (Alex) Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: set ip blocks for cyan_skillfishTao Zhou1-0/+9
Add ip blocks for cyan_skillfish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: init family name for cyan_skillfishTao Zhou1-0/+1
Use FAMILY_NV for cyan_skillfish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: dynamic initialize ip offset for cyan_skillfishTao Zhou4-1/+56
Add ip offset definition for cyan_skillfish and initialize it. v2: squash in ip_offset updates (Alex) Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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