aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu
AgeCommit message (Collapse)AuthorFilesLines
2017-12-06drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_mapMichel Dänzer1-5/+5
Prevent buggy userspace from spamming dmesg. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: expose the VA above the hole to userspaceChristian König1-2/+10
Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTLChristian König1-3/+3
Userspace buggy userspace can spam the logs. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: fix VA hole handling on Vega10 v3Christian König4-6/+32
Similar to the CPU address space the VA on Vega10 has a hole in it. v2: use dev_dbg instead of dev_err v3: add some more comments to explain how the hw works Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use the new TTM bytes moved counter v2Christian König2-13/+6
Instead of the global statistics use the per context bytes moved counter. v2: rebased Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: forward operation context to ttm_bo_mem_spaceChristian König1-18/+12
This way we can finally use some more stats. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add context to driver move callback as wellChristian König1-10/+11
Instead of passing the parameters manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use an operation context for ttm_bo_mem_space v2Christian König2-7/+9
Instead of specifying interruptible and no_wait_gpu manually. v2: rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use an operation ctx for ttm_bo_init_reservedChristian König1-1/+2
Instead of specifying if sleeping should be interruptible. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add operation ctx to ttm_bo_validate v2Christian König6-15/+26
Give moving a BO into place an operation context to work with. v2: rebased Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Followup fixes to mc_reg_addressErnst Sjöstrand1-7/+3
This is a followup to: drm/amd/powerplay: Fix buffer overflows with mc_reg_address Rework *_set_mc_special_registers for the other architectures to use the same logic as the first patch. This allows the last entry of the array to be filled without an error message for example. This doesn't fix any known problems, perhaps avoided by luck. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Fix buffer overflows with mc_reg_addressErnst Sjöstrand1-7/+3
Smatch warned about the following lines: ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16 tonga_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16 Change the logic to check before access instead of after incrementing. It's fine if j reaches max after we're done. This allows the last entry of the array to be filled without an error message for example. Changed some whitespace to clarify grouping. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: Fix missing null check in atombios_i2c.cErnst Sjöstrand1-2/+9
Reported by smatch: amdgpu_atombios_i2c_process_i2c_ch() error: we previously assumed 'buf' could be null Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: fix VCE buffer placement restrictions v2Christian König1-2/+99
Turned out that VCE still has a placement restriction that BOs can't cross a 4GB boundary. Fix this by adding a command submission parser prepass to correctly place the buffers. v2: add function description Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: align GTT start to 4GB v2Christian König1-1/+4
For VCE to work properly the start of the GTT space must be aligned to a 4GB boundary. v2: add comment why we do this Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: remove VRAM size reduction v2Christian König4-46/+1
Remove some outdated comments and all code which tries to reduce the VRAM size mapped into the MC. This is superfluous and misleading since we never actually program the size. v2: handle gmc_v6_0.c as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gmc9: make some ECC messages debug onlyAlex Deucher1-2/+2
To avoid spamming the logs on non-ECC boards. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: always make gart.table_addr 64bitChristian König1-1/+1
Fixing warning/compile errors on 32bit kernels. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: require a root bus window above 4GB for BAR resizeChristian König1-0/+18
Don't even try to resize the BAR when there is no window above 4GB. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cancel timer of virtual DCE(v2)Monk Liu1-0/+10
virtual DCE Timer structure is already released after its sw_fini(), so we need to cancel the its Timer in hw_fini() otherwise the Timer canceling is missed. v2: use for loop and num_crtc to replace original code Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:fix virtual dce bugMonk Liu1-1/+3
this fix the issue that access memory after freed after driver unloaded. Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:show error message if fail on event4Monk Liu1-1/+2
Signed-off-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup firmware.fw_buf alloc/freeMonk Liu1-34/+9
use bo_create/free_kernel instead of manually doing it Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:free CSA in unified placeMonk Liu5-2/+8
instead of doing it in each GFX ip's sw_fini Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup unused stack varMonk Liu1-2/+1
Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:fix NULL pointer access during drv removeMonk Liu8-14/+7
NULL pointer is because original logic will step into set_pde_pte() even after the gart.ptr is freed due to there are twice gart_unbind() on all gart area. also, there are other minor fixes: 1,since gart_init only create dummy page, the corresponding gart_fini shouldn't do more like unbinding all GART, this is unnecessary because in driver fini stage all GART unbinding had already been done during each IP's SW_FINI (GMC's SW_FINI is the last one called), so remove the step for the GART unbinding in gart_fini(). 2,gart_fini() is already invoked during each GMC IP's gart_fini routine,e.g. gmc_vx_0_gart_fini(), so no need to manually call it during ttm_fini(). 3,amdgpu_gem_force_release() should be put ahead of amdgpu_vm_manager_fini() Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup GMC & gart garbage functionMonk Liu7-156/+13
for gart_ram_alloc/free, they are never used in driver thus ripe them out totally. for gart_vram_pin/unpin, they are not needed becuase we can use bo_creat_kernel/free to replace the original manual way in the gart_vram_alloc/free, thus gart_vram_pin/unpin can also be riped out. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup stolen vga memory finishMonk Liu1-8/+3
Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06amdgpu: Don't use DRM_ERROR when failing to allocate a BOMichel Dänzer2-3/+3
This can be triggered by userspace, e.g. trying to allocate too large a BO, so it shouldn't log anything by default. Callers need to handle failure anyway. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: not allow gtt size exceed 75%*system memory sizeRoger He1-3/+8
keep consistency with threshold of swapout Reviewed-by: Christian König <[email protected]> Signed-off-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Add ability to determine and report if board supports ECC.David Panariti1-0/+206
Make initialization code check the ECC related registers, which are initialized by the VBIOS, to see if ECC is present and initialized and DRM_INFO() the result. Signed-off-by: David Panariti <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx6: use cached values for raster config in clear stateAlex Deucher1-19/+1
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx7: use cached values for raster config in clear stateAlex Deucher1-23/+2
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx8: use cached values for raster config in clear stateAlex Deucher1-31/+2
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/virt: remove redundant variable pf2vf_verColin Ian King1-2/+0
Variable pf2vf_ver is assigned but never read, it is redundant and hence can be removed. Cleans up clang warning: drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:310:3: warning: Value stored to 'pf2vf_ver' is never read Reivewed-by: Horace Chen <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: fix UVD mc offsetsPiotr Redlewski5-4/+8
When UVD bo is created, its size is based on the information from firmware header (ucode_size_bytes). The same value should be be used when programming UVD mc controller offsets, otherwise it can happen that (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will point AMDGPU_GPU_PAGE_SIZE bytes after the UVD bo end. Second issue is that when programming the mmUVD_VCPU_CACHE_SIZE0 register, AMDGPU_UVD_FIRMWARE_OFFSET should be taken into account. If it isn't, (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will always point AMDGPU_UVD_FIRMWARE_OFFSET bytes after the UVD bo end. v2: move firmware size calculation into macro definition v3: align firmware size to the gpu page size Reviewed-by: Christian König <[email protected]> Signed-off-by: Piotr Redlewski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Implement BO size validation V2Andrey Grodzovsky1-0/+41
Validates BO size against each requested domain's total memory. v2: Make GTT size check a MUST to allow fall back to GTT. Rmove redundant NULL check. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: cleanup vm_size handlingChristian König6-24/+17
It's pointless to have the same value twice, just always use max_pfn. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE resultChristian König15-113/+113
Not sure what that should originally been good for, but it doesn't seem to make any sense any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use dep_sync for CS dependency/syncobjChunming Zhou1-2/+2
Otherwise, they could be optimized by scheduled fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx8: Fix compute ring failure after resettingXiangliang.Yu1-3/+7
Do ring clear before ring test, otherwise compute ring test will fail after gpu resetting. Still can't find the root cause, just workaround it. Signed-off-by: Xiangliang.Yu <[email protected]> Acked-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: revise retry init to fully cleanup driverPixel Ding3-15/+14
Retry at drm_dev_register instead of amdgpu_device_init. Reviewed-by: Christian König <[email protected]> Signed-off-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:read VRAMLOST from gimMonk Liu3-5/+8
Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: bypass FB resizing for SRIOV VFpding1-0/+4
It introduces 900ms latency in exclusive mode which causes failure of driver loading. Host can resize the BAR before guest staring, so the resizing is not necessary here. Signed-off-by: Pixel Ding <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: release exclusive mode after hw_initpding2-3/+4
Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdkfd: initialise kfd inside amdgpu_device_initpding2-5/+4
Also finalize kfd inside amdgpu_device_fini. kfd device_init needs SRIOV exclusive accessing. Try to gather exclusive accessing to reduce time consuming. Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind v2Christian König1-6/+15
Just allocate the GART space and fill it. This prevents forcing the BO to be idle. v2: don't unbind/bind at all, just fill the allocated GART space Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: rename amdgpu_ttm_bind to amdgpu_ttm_alloc_gartChristian König4-6/+6
We actually don't bind here, but rather allocate GART space if necessary. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: switch to use new SOC15 reg read/write macros for soc15 ihHawking Zhang1-23/+23
Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: resize VRAM BAR for CPU access v6Christian König6-13/+90
Try to resize BAR0 to let CPU access all of VRAM. v2: rebased, style cleanups, disable mem decode before resize, handle gmc_v9 as well, round size up to power of two. v3: handle gmc_v6 as well, release and reassign all BARs in the driver. v4: rename new function to amdgpu_device_resize_fb_bar, reenable mem decoding only if all resources are assigned. v5: reorder resource release, return -ENODEV instead of BUG_ON(). v6: squash in rebase fix Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.