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2023-08-30drm/amdgpu: Add bootloader wait for PSP v13Lijo Lazar1-2/+26
Implement the wait for bootloader call back for PSP v13.0 ASICs. Only for ASICs with PSP v13.0.6, it needs an additional check for VBIOS mailbox status. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Tested-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: register a dirty framebuffer callback for fbconHamza Mahfooz1-1/+25
fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take a while to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it may cause too many atomic commits to be made at once. So, implement amdgpu_dirtyfb() and only enable it for fbcon framebuffers (we can use the "struct drm_file file" parameter in the callback to check for this since it is only NULL when called by fbcon, at least in the mainline kernel) on devices that support atomic KMS. Cc: Aurabindo Pillai <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: [email protected] # 6.1+ Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519 Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Updated TCP/UTCL1 programmingMangesh Gadre1-0/+3
Update TCP/UTCL1 thrashing control settings v2: updated rev_id check Signed-off-by: Mangesh Gadre <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Fix kcalloc over kzalloc in 'gmc_v9_0_init_mem_ranges'Srinivasan Shanmugam1-4/+3
Replace kzalloc(n * sizeof(...), ...) with kcalloc(n, sizeof(...), ...) since kcalloc is the preferred API in case of allocating with multiply. Fixes the below: WARNING: Prefer kcalloc over kzalloc with multiply Cc: Guchun Chen <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdkfd: Share the original BO for GTT mappingPhilip Yang1-2/+3
If mGPUs is on same IOMMU group, or is ram direct mapped, then mGPUs can share the original BO for GTT mapping dma address, without creating new BO from export/import dmabuf. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Fix the return for gpu mode1_resetHawking Zhang1-2/+11
amdgpu_device_mode1_reset will return gpu mode1_reset succeed (ret = 0) as long as wait_for_bootloader call succeed, regardless of the status reported by smu or psp firmware. This results to driver continue executing recovery even smu or psp fail to perform mode1 reset. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add gfxhub 11.5.0 supportbenl4-1/+552
Add initial gfxhub 11.5 support. Signed-off-by: benl <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: enable gmc11 for GC 11.5.0Prike Liang1-0/+1
Add to IP discovery table. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add mmhub 3.3.0 supportLang Yu4-1/+624
Add initial implementation for mmhub 3.3.0. v2: squash in client id fix (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/discovery: enable gfx11 for GC 11.5.0Prike Liang1-0/+1
Add to IP discovery table. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/discovery: enable mes block for gc 11.5.0Lang Yu1-0/+1
Add to IP discovery table. Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add mes firmware support for gc_11_5_0Aaron Liu1-0/+3
Add scheduler and kiq firmware support for gc_11_5_0. Signed-off-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add imu firmware support for gc_11_5_0Aaron Liu1-0/+1
Add imu firmware support for gc_11_5_0. Signed-off-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add golden setting for gc_11_5_0Aaron Liu1-0/+24
Initialize golden setting for gc_11_5_0. v2: squash in latest golden updates (Alex) v3: squash in checkpatch fix (Alex) Signed-off-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/gfx11: initialize gfx11.5.0Prike Liang1-1/+8
Initalize gfx 11.5.0 and set gfx hw configuration. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/gmc11: initialize GMC for GC 11.5.0 memory supportPrike Liang1-0/+1
Initialize vram attribute and VMHUB for GC 11.5.0. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/discovery: add nbio 7.11.0 supportPrike Liang1-0/+5
Add to IP discovery table. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add nbio 7.11 supportbenl3-1/+277
Add initial nbio 7.11 implementation. Signed-off-by: benl <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/discovery: enable soc21 supportPrike Liang1-0/+1
Add 11.5.0 to IP discovery table. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/soc21: add initial GC 11.5.0 soc21 supportPrike Liang1-0/+6
Disable clock gating and power gating on the early bring up phase. Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: add new AMDGPU_FAMILY definitionPrike Liang1-0/+4
add GC 11.5.0 family Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: use 6.1.0 register offset for HDP CLK_CNTLLang Yu1-4/+16
Use 6.1.0 register offset and remove unused variable. v2: clean up logic (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Remove SRAM clock gater override by driverMangesh Gadre1-9/+0
rlc firmware does required setting, driver need not do it. Signed-off-by: Mangesh Gadre <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Add bootloader status checkLijo Lazar3-3/+28
Add a function to wait till bootloader has reached steady state. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Tested-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdkfd: use correct method to get clock under SRIOVHorace Chen1-6/+2
[What] Current SRIOV still using adev->clock.default_XX which gets from atomfirmware. But these fields are abandoned in atomfirmware long ago. Which may cause function to return a 0 value. [How] We don't need to check whether SR-IOV. For SR-IOV one-vf-mode, pm is enabled and VF is able to read dpm clock from pmfw, so we can use dpm clock interface directly. For multi-VF mode, VF pm is disabled, so driver can just react as pm disabled. One-vf-mode is introduced from GFX9 so it shall not have any backward compatibility issue. Signed-off-by: Horace Chen <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Unset baco dummy mode on nbio v7.9Lijo Lazar1-0/+18
BACO dummy mode could be set under reset conditions and that affects framebuffer access. Check If baco dummy mode is set, unset it if so. Signed-off-by: Lijo Lazar <[email protected]> Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Tested-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Enable ras for mp0 v13_0_6 sriovYiPeng Chai1-0/+1
Enable ras for mp0 v13_0_6 sriov Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Stanley.Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu/jpeg - skip change of power-gating state for sriovSamir Dhume1-2/+4
Powergating is handled in the host driver. Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Samir Dhume <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Keep reset handlers sharedLijo Lazar5-37/+45
Instead of maintaining a list per device, keep the reset handlers common per ASIC family. A pointer to the list of handlers is maintained in reset control. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Le Ma <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Tested-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: update gc_info v2_1 from discoveryLe Ma2-0/+13
Several new fields are exposed in gc_info v2_1 Signed-off-by: Le Ma <[email protected]> Reviewed-by: Shiwu Zhang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: update mall info v2 from discoveryLe Ma1-0/+5
Mall info v2 is introduced in ip discovery Signed-off-by: Le Ma <[email protected]> Reviewed-by: Shiwu Zhang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amdgpu: Only support RAS EEPROM on dGPU platformCandice Li1-1/+2
RAS EEPROM device is only supported on dGPU platform for smu v13_0_6. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amd/amdgpu: Use kmemdup to simplify kmalloc and memcpy logicChen Jiahao1-9/+2
Using kmemdup() helper function rather than implementing it again with kmalloc() + memcpy(), which improves the code readability. Signed-off-by: Chen Jiahao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-21drm/amdgpu: Use RMW accessors for changing LNKCTLIlpo Järvinen2-52/+20
Don't assume that only the driver would be accessing LNKCTL. ASPM policy changes can trigger write to LNKCTL outside of driver's control. And in the case of upstream bridge, the driver does not even own the device it's changing the registers for. Use RMW capability accessors which do proper locking to avoid losing concurrent updates to the register value. Suggested-by: Lukas Wunner <[email protected]> Fixes: a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts") Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu: Add memory vendor informationLijo Lazar1-8/+18
For ASICs with GC v9.4.3, determine the vendor information from scratch register. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amd: flush any delayed gfxoff on suspend entryMario Limonciello2-8/+2
DCN 3.1.4 is reported to hang on s2idle entry if graphics activity is happening during entry. This is because GFXOFF was scheduled as delayed but RLC gets disabled in s2idle entry sequence which will hang GFX IP if not already in GFXOFF. To help this problem, flush any delayed work for GFXOFF early in s2idle entry sequence to ensure that it's off when RLC is changed. commit 4b31b92b143f ("drm/amdgpu: complete gfxoff allow signal during suspend without delay") modified power gating flow so that if called in s0ix that it ensured that GFXOFF wasn't put in work queue but instead processed immediately. This is dead code due to commit 10cb67eb8a1b ("drm/amdgpu: skip CG/PG for gfx during S0ix") because GFXOFF will now not be explicitly called as part of the suspend entry code. Remove that dead code. Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu: skip fence GFX interrupts disable/enable for S0ixTim Huang1-2/+39
GFX v11.0.1 reported fence fallback timer expired issue on SDMA and GFX rings after S0ix resume. This is generated by EOP interrupts are disabled when S0ix suspend but fails to re-enable when resume because of the GFX is in GFXOFF. [ 203.349571] [drm] Fence fallback timer expired on ring sdma0 [ 203.349572] [drm] Fence fallback timer expired on ring gfx_0.0.0 [ 203.861635] [drm] Fence fallback timer expired on ring gfx_0.0.0 For S0ix, GFX is in GFXOFF state, avoid to touch the GFX registers to configure the fence driver interrupts for rings that belong to GFX. The interrupts configuration will be restored by GFXOFF exit. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu: Remove gfxoff check in GFX v9.4.3Lijo Lazar1-2/+0
GFXOFF feature is not there for GFX 9.4.3 ASICs. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu: skip xcp drm device allocation when out of drm resourceJames Zhu1-1/+12
Return 0 when drm device alloc failed with -ENOSPC in order to allow amdgpu drive loading. But the xcp without drm device node assigned won't be visiable in user space. This helps amdgpu driver loading on system which has more than 64 nodes, the current limitation. The proposal to add more drm nodes is discussed in public, which will support up to 2^20 nodes totally. kernel drm: https://lore.kernel.org/lkml/[email protected]/T/ libdrm: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/305 Signed-off-by: James Zhu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu/vcn: Skip vcn power-gating change for sriovSamir Dhume1-0/+9
CG/PG is handled on the host side. Signed-off-by: Samir Dhume <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-16drm/amdgpu/jpeg: sriov support for jpeg_v4_0_3Samir Dhume1-20/+151
initialization table handshake with mmsch Signed-off-by: Samir Dhume <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu: Replace ternary operator with min() in 'amdgpu_iomem_write'Srinivasan Shanmugam1-1/+1
Fixes the following coccicheck: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:2482:16-17: WARNING opportunity for min() min() macro is defined in include/linux/minmax.h. It avoids multiple evaluations of the arguments when non-constant and performs strict type-checking. Cc: Guchun Chen <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWERMario Limonciello1-1/+1
Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead. Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu: Remove duplicated includesGUO Zihua2-2/+0
Remove duplicated includes in amdgpu_amdkfd_gpuvm.c and amdgpu_ttm.c. Resolves checkincludes message. Signed-off-by: GUO Zihua <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu: expand runpm parameterAlex Deucher1-17/+20
Allow the user to specify -2 as auto enabled with displays. By default we don't enter runtime suspend when there are displays attached because it does not work well in some desktop environments due to the driver sending hotplug events on resume in case any new displays were attached while the GPU was powered down. Some users still want this functionality though, so this lets you enable it. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2428 Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amd: Remove freesync video mode amdgpu parameterAurabindo Pillai2-28/+0
[Why&How] Freesync Video mode was enabled by default. Hence no need for the module parameter, so remove it completely Acked-by: Stylon Wang <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Stylon Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu/vcn: sriov support for vcn_v4_0_3Samir Dhume1-24/+236
initialization table handshake with mmsch Signed-off-by: Samir Dhume <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu: Replace ternary operator with min() in 'amdgpu_iomem_read'Srinivasan Shanmugam1-1/+1
Fixes the following coccicheck: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:2427:16-17: WARNING opportunity for min() min() macro is defined in include/linux/minmax.h. It avoids multiple evaluations of the arguments when non-constant and performs strict type-checking. Cc: Guchun Chen <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Pan, Xinhui" <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdgpu/vcn: change end doorbell index for vcn_v4_0_3Samir Dhume1-3/+3
For sriov, doorbell index for vcn0 for AID needs to be on 32 byte boundary so we need to move the vcn end doorbell Signed-off-by: Samir Dhume <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-15drm/amdkfd: workaround address watch clearing bug for gfx v9.4.2Eric Huang1-7/+1
KFD currently relies on MEC FW to clear tcp watch control register on UNMAP_PROCESS, but FW doesn't work on it, which is a bug. So the solution is to clear the register as gfx v9 in KFD. Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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