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2022-01-25drm/amdgpu: switch to get_rlcg_reg_access_flag for gfx10Hawking Zhang1-39/+2
Switch to common helper to query rlcg access flag specified by sriov host driver for gfx10 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Zhou, Peng Ju <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: switch to get_rlcg_reg_access_flag for gfx9Hawking Zhang1-29/+4
Switch to common helper to query rlcg access flag specified by sriov host driver for gfx9 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Zhou, Peng Ju <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: add helper to query rlcg reg access flagHawking Zhang2-0/+43
Query rlc indirect register access approach specified by sriov host driver per ip blocks Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Zhou, Peng Ju <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amd/amdgpu/amdgpu_cs: fix refcount leak of a dma_fence objXin Xiong1-0/+1
This issue takes place in an error path in amdgpu_cs_fence_to_handle_ioctl(). When `info->in.what` falls into default case, the function simply returns -EINVAL, forgetting to decrement the reference count of a dma_fence obj, which is bumped earlier by amdgpu_cs_get_fence(). This may result in reference count leaks. Fix it by decreasing the refcount of specific object before returning the error code. Reviewed-by: Christian König <[email protected]> Signed-off-by: Xin Xiong <[email protected]> Signed-off-by: Xin Tan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: filter out radeon secondary ids as wellAlex Deucher1-0/+81
Older radeon boards (r2xx-r5xx) had secondary PCI functions which we solely there for supporting multi-head on OSs with special requirements. Add them to the unsupported list as well so we don't attempt to bind to them. The driver would fail to bind to them anyway, but this does so in a cleaner way that should not confuse the user. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: drop WARN_ON in amdgpu_gart_bind/unbindGuchun Chen1-2/+2
NULL pointer check has guarded it already. calltrace: amdgpu_ttm_gart_bind+0x49/0xa0 [amdgpu] amdgpu_ttm_alloc_gart+0x13f/0x180 [amdgpu] amdgpu_bo_create_reserved+0x139/0x2c0 [amdgpu] ? amdgpu_ttm_debugfs_init+0x120/0x120 [amdgpu] amdgpu_bo_create_kernel+0x17/0x80 [amdgpu] amdgpu_ttm_init+0x542/0x5e0 [amdgpu] Fixes: 1b08dfb889b2c5 ("drm/amdgpu: remove gart.ready flag") Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: enable amdgpu_dc module parameterLang Yu1-2/+8
It doesn't work under IP discovery mode. Make it work! Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amd: Fix MSB of SMU version printingMario Limonciello1-5/+5
Yellow carp has been outputting versions like `1093.24.0`, but this is supposed to be 69.24.0. That is the MSB is being interpreted incorrectly. The MSB is not part of the major version, but has generally been treated that way thus far. It's actually the program, and used to distinguish between two programs from a similar family but different codebase. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: Disable FRU EEPROM access for SRIOVshaoyunl1-0/+6
VF acces the EEPROM is blocked by security policy, we might need other way to get SKUs info for VF v2: squash in compilation fix from Luben Signed-off-by: shaoyunl <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amdgpu: filter out radeon secondary ids as wellAlex Deucher1-0/+81
Older radeon boards (r2xx-r5xx) had secondary PCI functions which we solely there for supporting multi-head on OSs with special requirements. Add them to the unsupported list as well so we don't attempt to bind to them. The driver would fail to bind to them anyway, but this does so in a cleaner way that should not confuse the user. Cc: [email protected] Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/edid: Split deep color modes between RGB and YUV444Maxime Ripard1-1/+1
The current code assumes that the RGB444 and YUV444 formats are the same, but the HDMI 2.0 specification states that: The three DC_XXbit bits above only indicate support for RGB 4:4:4 at that pixel size. Support for YCBCR 4:4:4 in Deep Color modes is indicated with the DC_Y444 bit. If DC_Y444 is set, then YCBCR 4:4:4 is supported for all modes indicated by the DC_XXbit flags. So if we have YUV444 support and any DC_XXbit flag set but the DC_Y444 flag isn't, we'll assume that we support that deep colour mode for YUV444 which breaks the specification. In order to fix this, let's split the edid_hdmi_dc_modes field in struct drm_display_info into two fields, one for RGB444 and one for YUV444. Suggested-by: Ville Syrjälä <[email protected]> Fixes: d0c94692e0a3 ("drm/edid: Parse and handle HDMI deep color modes.") Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-01-24drm/amdgpu: use ttm_resource_manager_debugChristian König1-5/+5
Instead of calling the debug operation directly. Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-01-21drm/amdgpu: fix the page fault caused by uninitialized variablesXiaojian Du1-3/+3
This patch will fix the page fault caused by uninitialized variables. Error Log: ...... [ 130.246323] [drm] GART: num cpu pages 131072, num gpu pages 131072 [ 131.963112] [drm] PCIE GART of 512M enabled (table at 0x0000008000000000). [ 131.963130] BUG: unable to handle page fault for address: 000000000002db80 [ 131.963181] #PF: supervisor write access in kernel mode [ 131.963210] #PF: error_code(0x0002) - not-present page [ 131.963233] PGD 0 P4D 0 [ 131.963253] Oops: 0002 [#1] SMP NOPTI [ 131.963273] CPU: 3 PID: 1411 Comm: modprobe Not tainted 5.13.0+ #1 [ 131.963338] RIP: 0010:osq_lock+0x4d/0x120 [ 131.963381] Code: 10 00 00 00 00 48 c7 02 00 00 00 00 89 42 14 87 07 85 c0 0f 84 d0 00 00 00 83 e8 01 48 98 48 03 0c c5 00 d9 ea 9c 48 89 4a 08 <48> 89 11 44 8b 42 10 45 85 c0 0f 85 af 00 00 00 55 48 89 fe 65 4c [ 131.963460] RSP: 0018:ffffa40481717768 EFLAGS: 00010202 [ 131.963483] RAX: fffffffffffffffe RBX: ffffa40481717920 RCX: 000000000002db80 [ 131.963520] RDX: ffff9256fecedb80 RSI: ffff9256cbed2e80 RDI: ffffa40481717ac4 [ 131.963547] RBP: ffffa40481717808 R08: ffffa40481717920 R09: 00000000ffffffff [ 131.963582] R10: 0000000000000001 R11: 0000000000000001 R12: 0000000000000000 [ 131.963609] R13: ffffa40481717ac4 R14: ffffa40481717ab8 R15: ffff9256c9480000 [ 131.963646] FS: 00007f23d9b9c540(0000) GS:ffff9256fecc0000(0000) knlGS:0000000000000000 [ 131.963687] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 131.963721] CR2: 000000000002db80 CR3: 0000000008444000 CR4: 00000000000506e0 [ 131.963758] Call Trace: [ 131.963772] ? __ww_mutex_lock.isra.0+0x3a2/0x760 [ 131.963810] ? prb_read_valid+0x1c/0x20 [ 131.963830] ? console_unlock+0x2fe/0x4f0 [ 131.963849] __ww_mutex_lock_interruptible_slowpath+0x16/0x20 [ 131.963882] ww_mutex_lock_interruptible+0x83/0x90 [ 131.963908] amdgpu_bo_create_reserved+0xf0/0x1e0 [amdgpu] [ 131.964237] amdgpu_bo_create_kernel+0x17/0x80 [amdgpu] [ 131.964509] amdgpu_gmc_vram_checking+0x41/0xf0 [amdgpu] [ 131.964807] gmc_v10_0_hw_init+0x105/0x120 [amdgpu] [ 131.965108] amdgpu_device_init.cold+0x1aa4/0x1e3e [amdgpu] ...... Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-21drm/amdgpu: fix convert bad page retiremtStanley.Yang1-12/+14
Pmfw read ecc info registers and store values in eccinfo_table in the following order umc0 ch_inst 0, 1, 2 ... 7 umc1 ch_inst 0, 1, 2 ... 7 ... umc3 ch_inst 0, 1, 2 ... 7 Driver should convert eccinfo_table_idx to channel_index according to channel_idx_tbl. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-21Merge tag 'drm-next-2022-01-21' of git://anongit.freedesktop.org/drm/drmLinus Torvalds6-50/+60
Pull drm fixes from Dave Airlie: "Thanks to Daniel for taking care of things while I was out, just a set of merge window fixes that came in this week, two i915 display fixes and a bunch of misc amdgpu, along with a radeon regression fix. amdgpu: - SR-IOV fix - VCN harvest fix - Suspend/resume fixes - Tahiti fix - Enable GPU recovery on yellow carp radeon: - Fix error handling regression in radeon_driver_open_kms i915: - Update EHL display voltage swing table - Fix programming the ADL-P display TC voltage swing" * tag 'drm-next-2022-01-21' of git://anongit.freedesktop.org/drm/drm: drm/radeon: fix error handling in radeon_driver_open_kms drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV drm/amdgpu: apply vcn harvest quirk drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequence drm/i915/display/ehl: Update voltage swing table drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21 drm/amdgpu: drop flags check for CHIP_IP_DISCOVERY drm/amdgpu: Fix rejecting Tahiti GPUs drm/amdgpu: don't do resets on APUs which don't support it drm/amdgpu: invert the logic in amdgpu_device_should_recover_gpu() drm/amdgpu: Enable recovery on yellow carp
2022-01-19drm/amdkfd: enable heavy-weight TLB flush on ArcturusEric Huang1-6/+0
SDMA FW fixes the hang issue for adding heavy-weight TLB flush on Arcturus, so we can enable it. Signed-off-by: Eric Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: fix broken debug sdma vram access functionJonathan Kim1-7/+8
Debug VRAM access through SDMA has several broken parts resulting in silent MMIO fallback. BO kernel creation takes the location of the cpu addr pointer, not the pointer itself for address kmap. drm_dev_enter return true on success so change access check. The source BO is reserved but not pinned so find the address using the cursor offset relative to its memory domain start. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove gart.ready flagChristian König10-133/+51
That's just a leftover from old radeon days and was preventing CS and GART bindings before the hardware was initialized. But nowdays that is perfectly valid. The only thing we need to warn about are GART binding before the table is even allocated. Signed-off-by: Christian König <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove unused variable warningStanley.Yang2-29/+0
Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove unused variablemziya1-4/+0
Remove set but unused variable. warning: variable 'umc_reg_offset' set but not used Signed-off-by: mziya <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: Remove repeated callsyipechai1-3/+1
Remove repeated calls. Signed-off-by: yipechai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: modify a pair of functions for the pcie port wreg/rregXiaojian Du3-32/+39
This patch will modify a pair of functions for pcie port wreg/rreg. AMD GPU have had an independent NBIO block from SOC15 arch. If the dirver wants to read/write the address space of the pcie devices, it has to go through the NBIO block. This patch will move the pcie port wreg/rreg functions to "amdgpu_device.c", so that to reuse the functions on the future GPU ASICs. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: add vram check function for GMCXiaojian Du7-5/+74
This patch will add vram check function for GMC block. It will write pattern data to the vram and then read back from the vram, so that to verify the work status of vram. This patch will cover gmc v6/7/8/9/10. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19dma-buf: drop excl_fence parameter from dma_resv_get_fencesChristian König2-3/+5
Returning the exclusive fence separately is no longer used. Instead add a write parameter to indicate the use case. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-01-19drm/amdgpu: remove excl as shared workaroundsChristian König2-10/+1
This was added because of the now dropped shared on excl dependency. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-01-18drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOVJingwen Chen2-14/+8
[Why] This fixes 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange"). we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init. commit 892deb48269c breaks this logic. [How] calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the right base in the right sequence. v2: call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange workqueue run v3: clean up the code logic v4: add some comment and make the code more readable Fixes: 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange") Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: apply vcn harvest quirkGuchun Chen1-5/+27
This is a following patch to apply the workaround only on those boards with a bad harvest table in ip discovery. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18amdgpu/amdgpu_psp: remove unneeded ret variableMinghao Chi1-5/+1
Return value from amdgpu_bo_create_kernel() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Minghao Chi <[email protected]> Signed-off-by: CGEL ZTE <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Add missing pm_runtime_put_autosuspendYongzhi Liu1-1/+3
pm_runtime_get_sync() increments the runtime PM usage counter even when it returns an error code, thus a matching decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Yongzhi Liu <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOVJingwen Chen2-14/+8
[Why] This fixes 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange"). we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init. commit 892deb48269c breaks this logic. [How] calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the right base in the right sequence. v2: call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange workqueue run v3: clean up the code logic v4: add some comment and make the code more readable Fixes: 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange") Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umcyipechai3-6/+8
drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc: 1. WARNING: missing space after struct definition. 2. WARNING: please, no space before tabs. 3. WARNING: line length of xxx exceeds 100 columns. 4. ERROR: "foo* bar" should be "foo *bar". 5. ERROR: space required before the open parenthesis '('. 6. ERROR: space prohibited after that open parenthesis '('. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in sdmayipechai2-7/+7
Fix the code style warnings in sdma: 1. WARNING: Missing a blank line after declarations. 2. ERROR: that open brace { should be on the previous line. 3. WARNING: unnecessary whitespace before a quoted newline. 4. ERROR: space required after that ',' (ctx:VxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in gmcyipechai2-2/+2
Fix the code style warnings in gmc: ERROR: space required after that ',' (ctx:VxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in gfxyipechai2-3/+3
Fix the code style warnings in gfx: 1. WARNING: suspect code indent for conditional statements. 2. ERROR: spaces required around that '=' (ctx:WxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in amdgpu_rasyipechai2-21/+30
Fix the code style warnings in amdgpu_ras: 1. ERROR: space required before the open parenthesis '('. 2. WARNING: line length of xxx exceeds 100 columns. 3. ERROR: "foo* bar" should be "foo *bar". 4. WARNING: unnecessary whitespace before a quoted newline. 5. WARNING: space prohibited before semicolon. 6. WARNING: suspect code indent for conditional statements. 7. WARNING: braces {} are not necessary for single statement blocks. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: apply vcn harvest quirkGuchun Chen1-5/+27
This is a following patch to apply the workaround only on those boards with a bad harvest table in ip discovery. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: drop redundant check of ip discovery_binGuchun Chen1-5/+0
Early check in amdgpu_discovery_reg_base_init promises this. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: handle denied inject error into critical regions v2Stanley.Yang3-3/+11
Changed from v1: remove unused brace Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: add new query interface for umc_v8_7 blockmziya1-5/+155
add smu message query error information interface, function name align with IP version number V2: Removed unused err cnt entry Signed-off-by: mziya <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Stanley.Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-17drm/dp: Move public DisplayPort headers into dp/Thomas Zimmermann3-4/+4
Move all public DisplayPort headers into dp/ and update users. No functional changes. v3: * rebased onto latest drm-tip Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-01-16Merge tag 'drm-next-2022-01-14' of git://anongit.freedesktop.org/drm/drmLinus Torvalds25-183/+134
Pull drm fixes from Daniel Vetter: "drivers fixes: - i915 fixes for ttm backend + one pm wakelock fix - amdgpu fixes, fairly big pile of small things all over. Note this doesn't yet containe the fixed version of the otg sync patch that blew up - small driver fixes: meson, sun4i, vga16fb probe fix drm core fixes: - cma-buf heap locking - ttm compilation - self refresh helper state check - wrong error message in atomic helpers - mipi-dbi buffer mapping" * tag 'drm-next-2022-01-14' of git://anongit.freedesktop.org/drm/drm: (49 commits) drm/mipi-dbi: Fix source-buffer address in mipi_dbi_buf_copy drm: fix error found in some cases after the patch d1af5cd86997 drm/ttm: fix compilation on ARCH=um dma-buf: cma_heap: Fix mutex locking section video: vga16fb: Only probe for EGA and VGA 16 color graphic cards drm/amdkfd: Fix ASIC name typos drm/amdkfd: Fix DQM asserts on Hawaii drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2 drm/amd/pm: only send GmiPwrDnControl msg on master die (v3) drm/amdgpu: use spin_lock_irqsave to avoid deadlock by local interrupt drm/amdgpu: not return error on the init_apu_flags drm/amdkfd: Use prange->update_list head for remove_list drm/amdkfd: Use prange->list head for insert_list drm/amdkfd: make SPDX License expression more sound drm/amdkfd: Check for null pointer after calling kmemdup drm/amd/display: invalid parameter check in dmub_hpd_callback Revert "drm/amdgpu: Don't inherit GEM object VMAs in child process" drm/amd/display: reset dcn31 SMU mailbox on failures drm/amdkfd: use default_groups in kobj_type drm/amdgpu: use default_groups in kobj_type ...
2022-01-14drm/amdgpu: drop flags check for CHIP_IP_DISCOVERYAlex Deucher1-5/+0
Support for IP based discovery is in place now so this check is no longer required. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Fix rejecting Tahiti GPUsLukas Fink1-1/+1
eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") added generic bindings to amdgpu so that that it binds to all display class devices with VID 0x1002 and then rejects those in amdgpu_pci_probe. Unfortunately it reuses a driver_data value of 0 to detect those new bindings, which is already used to denote CHIP_TAHITI ASICs. The driver_data value given to those new bindings was changed in dd0761fd24ea1 ("drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default") to CHIP_IP_DISCOVERY (=36), but it seems that the check in amdgpu_pci_probe was forgotten to be changed. Therefore, it still rejects Tahiti GPUs. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1860 Fixes: eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") Signed-off-by: Lukas Fink <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: don't do resets on APUs which don't support itAlex Deucher2-0/+8
It can cause a hang. This is normally not enabled for GPU hangs on these asics, but was recently enabled for handling aborted suspends. This causes hangs on some platforms on suspend. Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1858 Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: drop flags check for CHIP_IP_DISCOVERYAlex Deucher1-5/+0
Support for IP based discovery is in place now so this check is no longer required. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Fix rejecting Tahiti GPUsLukas Fink1-1/+1
eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") added generic bindings to amdgpu so that that it binds to all display class devices with VID 0x1002 and then rejects those in amdgpu_pci_probe. Unfortunately it reuses a driver_data value of 0 to detect those new bindings, which is already used to denote CHIP_TAHITI ASICs. The driver_data value given to those new bindings was changed in dd0761fd24ea1 ("drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default") to CHIP_IP_DISCOVERY (=36), but it seems that the check in amdgpu_pci_probe was forgotten to be changed. Therefore, it still rejects Tahiti GPUs. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1860 Fixes: eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") Cc: [email protected] Signed-off-by: Lukas Fink <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: don't do resets on APUs which don't support itAlex Deucher2-0/+8
It can cause a hang. This is normally not enabled for GPU hangs on these asics, but was recently enabled for handling aborted suspends. This causes hangs on some platforms on suspend. Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") Cc: [email protected] Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1858 Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: invert the logic in amdgpu_device_should_recover_gpu()Alex Deucher1-27/+17
Rather than opting into GPU recovery support, default to on, and opt out if it's not working on a particular GPU. This avoids the need to add new asics to this list since this is a core feature. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Enable recovery on yellow carpCHANDAN VURDIGERE NATARAJ1-0/+1
Add yellow carp to devices which support recovery Signed-off-by: CHANDAN VURDIGERE NATARAJ <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: invert the logic in amdgpu_device_should_recover_gpu()Alex Deucher1-27/+17
Rather than opting into GPU recovery support, default to on, and opt out if it's not working on a particular GPU. This avoids the need to add new asics to this list since this is a core feature. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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