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2019-07-09drm/amdgpu: add missing documentation on new module parametersAlex Deucher1-0/+13
New parameters added for navi lack documentation. Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-09drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writebackMarek Olšák1-5/+1
This RELEASE_MEM use has the Release semantic, which means we should write back but not invalidate. Invalidations only make sense with the Acquire semantic (ACQUIRE_MEM), or when RELEASE_MEM is used to do the combined Acquire-Release semantic, which is a barrier, not a fence. The undesirable side effect of doing invalidations for the Release semantic is that it invalidates caches while shaders are running, because the Release can execute in the middle of the next IB. UMDs should use ACQUIRE_MEM at the beginning of IBs. Doing cache invalidations for a fence (like in this case) doesn't do anything for correctness. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08drm/amdgpu/psp11: simplify the ucode register logicAlex Deucher1-2/+2
Split it between navi10 and newer and everything before navi10. Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08drm/amdgpu: properly guard DC support in navi codeAlex Deucher1-0/+4
Need to add appropriate ifdef. Acked-by: Leo Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08amdgpu: make pmu support optionalArnd Bergmann2-3/+7
When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu portion of the amdgpu driver: drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in 'struct perf_event' struct hw_perf_event *hwc = &event->hw; ~~~~~ ^ drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:51:13: error: no member named 'attr' in 'struct perf_event' if (event->attr.type != event->pmu->type) ~~~~~ ^ ... Use conditional compilation for this file. Fixes: 9c7c85f7ea1f ("drm/amdgpu: add pmu counters") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08drm/amdgpu/mes10.1: Fix header guardNathan Chancellor1-1/+1
clang warns: In file included from drivers/gpu/drm/amd/amdgpu/nv.c:53: drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:24:9: warning: '__MES_V10_1_H__' is used as a header guard here, followed by #define of a different macro [-Wheader-guard] #ifndef __MES_V10_1_H__ ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:25:9: note: '__MES_v10_1_H__' is defined here; did you mean '__MES_V10_1_H__'? #define __MES_v10_1_H__ ^~~~~~~~~~~~~~~ __MES_V10_1_H__ 1 warning generated. Capitalize the V. Fixes: 886f82aa7a1d ("drm/amdgpu/mes10.1: add ip block mes10.1 (v2)") Link: https://github.com/ClangBuiltLinux/linux/issues/582 Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08drm/amdgpu: fix scheduler timeout calcFlora Cui1-4/+9
scheduler timeout is in jiffies v2: move timeout check to amdgpu_device_get_job_timeout_settings after parsing the value v3: add lockup_timeout param check. 0: keep default value. negative: infinity timeout. v4: refactor codes. Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-08drm/amdgpu: Prepare for hmm_range_register API change (v2)Philip Yang7-51/+57
An upcoming change in the hmm_range_register API requires passing in a pointer to an hmm_mirror instead of mm_struct. To access the hmm_mirror we need pass bo instead of ttm to amdgpu_ttm_tt_get_user_pages because mirror is part of amdgpu_mn structure, which is accessible from bo. v2: fix building without CONFIG_HMM_MIRROR (Arnd) Signed-off-by: Philip Yang <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-05drm/amdgpu: add mode1 (psp) reset for navi asicKevin Wang1-2/+36
add mode1 (by psp) reset for navi asic. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-05drm/amdgpu: Disable ras features on all IPs before gpu resetxinhui pan1-0/+4
Perform a ras_suspend to disable ras on all IPs to workaround some ROCm stability issue. Signed-off-by: xinhui pan <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-05drm/amd/powerplay: add baco smu reset function for smu11Kevin Wang2-3/+11
add baco reset support for smu11. it can help gpu do asic reset when gpu recovery. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-05drm/amdgpu: Use kmemdup rather than duplicating its implementationFuqian Huang2-6/+4
kmemdup is introduced to duplicate a region of memory in a neat way. Rather than kmalloc/kzalloc + memcpy, which the programmer needs to write the size twice (sometimes lead to mistakes), kmemdup improves readability, leads to smaller code and also reduce the chances of mistakes. Suggestion to use kmemdup rather than using kmalloc/kzalloc + memcpy. Reviewed-by: Christian König <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Fuqian Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-03drm/amdgpu: Fix tracking of invalid userptrsFelix Kuehling1-0/+6
Restore the code that resets mem->invalid. Othewise so mapping userptrs after they got an MMU notifiers would always be skipped. This also avoids unnecessarily calling get_user_pages on BOs that have not been invalidated since the last try. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-03drm/amdgpu: Use FENCE_OWNER_KFD in process_sync_pds_resvFelix Kuehling1-1/+1
We don't want eviction fences to trigger when waiting for page table updates to complete during restore. In theory there shouldn't be any unsignaled eviction fences in the PD reservation object, but I'm seeing them in instrumented code for reasons not fully understood. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdkfd: remove duplicated PCIE atomics requestJack Xiao2-0/+8
Since amdgpu has always requested PCIE atomics, kfd don't need duplicated PCIE atomics enablement. Referring to amdgpu request result is enough. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu: enable PCIE atomics ops supportJack Xiao1-0/+11
GPU atomics operation depends on PCIE atomics support. Always enable PCIE atomics ops support in case that it hasn't been enabled. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu: add field indicating if has PCIE atomics supportJack Xiao1-0/+1
The new field in amdgpu device is used to record whether the system has PCIE atomics support. The field can be exposed to UMD or kfd whether PCIE atomics have supported. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu: fix MGPU fan boost enablement for XGMI resetEvan Quan3-2/+19
MGPU fan boost feature should not be enabled until all the devices from the same hive are all back from reset. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu: handle AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID on gfx10Marek Olšák1-2/+19
Add the gfx10 equivalent of the gfx9 code. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)Marek Olšák2-4/+13
v2: update emit_ib_size (though it's still wrong because it was wrong before) Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZEAlex Deucher1-19/+0
Recommended by the hw team. Reviewed-and-Tested-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-07-01drm/amdgpu/gfx10: use reset default for PA_SC_FIFO_SIZEAlex Deucher1-18/+0
Recommended by the hw team. Reviewed-and-Tested-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-07-01drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZEAlex Deucher1-19/+0
Recommended by the hw team. Reviewed-and-Tested-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-27drm/amd/powerplay: no memory activity support on Vega10Evan Quan1-2/+4
Make mem_busy_percent sysfs interface invisible on Vega10. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-27drm/amdgpu: Set queue_preemption_timeout_ms default valueOak Zeng1-1/+1
Set default value of this kernel parameter to 9000 Signed-off-by: Oak Zeng <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-27drm/amdgpu: drop copy/paste leftover to fix big endianAlex Deucher1-3/+0
The buf swap field doesn't exist on RB1. Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-27drm/amdgpu: fix warning on 32 bitAlex Deucher1-2/+2
Properly cast pointer to int. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/powerplay: make athub pg bit configured by pg_flagsHuang Rui1-1/+2
The athub pg features enabling should be indicated by pg_flags. Reported-by: Lijo Lazar <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/powerplay: make mmhub pg bit configured by pg_flagsHuang Rui1-1/+2
The mmhub pg features enabling should be indicated by pg_flags. Reported-by: Lijo Lazar <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/amdgpu: sdma_v4_0_start: initialize rErnst Sjöstrand1-1/+1
Reported by smatch: drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c:1167 sdma_v4_0_start() error: uninitialized symbol 'r'. Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/amdgpu: amdgpu_hwmon_show_temp: initialize tempErnst Sjöstrand1-1/+1
Reported by smatch: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:1496 amdgpu_hwmon_show_temp() error: uninitialized symbol 'temp'. Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/amdgpu: Fix amdgpu_set_pp_od_clk_voltage error checkErnst Sjöstrand1-4/+4
Reported by smatch: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:693 amdgpu_set_pp_od_clk_voltage() error: uninitialized symbol 'ret'. Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25drm/amd/amdgpu: Indent AMD_IS_APU properlyErnst Sjöstrand2-4/+4
Reported by smatch: drivers/gpu/drm/amd/amdgpu/soc15.c:715 soc15_get_pcie_usage() warn: inconsistent indenting And a similar one in si.c. Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-25Merge branch 'drm-next' into drm-next-5.3Alex Deucher114-146/+275
Backmerge drm-next and fix up conflicts due to drmP.h removal. Signed-off-by: Alex Deucher <[email protected]>
2019-06-24drm/amdgpu: disable gfxoff on navi10tiancyin1-3/+1
The gfxoff brings unstability, disable it by default Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: tiancyin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-24drm/amdgpu: fix modprobe failure for uvd_4/5/6Hawking Zhang1-1/+10
For uvd_4/5/6, amdgpu driver will only power on them when there are jobs assigned to decode/enc rings.uvd_4/5/6 dpm was broken since amdgpu_dpm_set_powergating_by_smu only covers gfx block. The change would add more IP block support in amdgpu_dpm_set_powergating_by_smu For GFX/UVD/VCN/VCE, if the new SMU driver is supported, invoke new power gate helper function smu_dpm_set_power_gate, otherwise, fallback to legacy powerplay helper function pp_set_powergating_by_smu. For other IP blocks always invoke legacy powerplay helper function. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tianci Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amdgpu: drop unused df init callbackAlex Deucher1-1/+0
It was replaced with the sw_init callback so is no longer needed. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amdgpu: add sw_init to df_v1_7Jonathan Kim1-2/+2
change df_init to df_sw_init df 1.7 to prevent regression issues on pre-vega20 products when callback is called in sw_common_sw_init. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Jonathan Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-22drm/amdgpu: Enable DC support for Navi10Harry Wentland2-0/+5
Enable the IP for navi10. Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amd/display: use fixed-width data type for soc bounding box structXiaojie Yuan1-15/+15
since it's firmware. Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu: Split gpu_info_soc_bounding_box out from amdgpu_ucode.hLeo Li2-56/+84
DC needs to include the soc bounding box when initializing HW resources. Including amdgpu_ucode.h directly will cause warnings, since amdgpu.h is required to define amdgpu_device. The solution here is to split the bounding box structs into a different header, then include it in both amdgpu_ucode.h, and relevant DC HW resource files. Signed-off-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amd/display: Read soc_bounding_box from gpu_info (v2)Harry Wentland2-1/+72
[WHY] We don't want to expose sensitive ASIC information before ASIC release. [HOW] Encode the soc_bounding_box in the gpu_info FW (for Linux) and read it at driver load. v2: fix warning when CONFIG_DRM_AMD_DC_DCN2_0 is not set (Alex) Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu: initialize THM & CLK IP registers base addressHawking Zhang1-0/+2
was missed before. Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu: fix PA_SC_FIFO_SIZE for Navi10 (v2)Marek Olšák1-10/+11
Proper size is 0. v2: squash in whitespace fixes (Ernst Sjöstrand) Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu: add new navi10 DIDstiancyin1-0/+2
Reviewed-by: Jack Xiao <[email protected]> Signed-off-by: tiancyin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/gfx10: update to latest golden settingAlex Deucher1-1/+1
Fix UTCL1_CGTT_CLK_CTRL Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/VCN: enable indirect DPG SRAM modeLeo Liu1-0/+3
This is default mode for VCN2.x now Signed-off-by: Leo Liu <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/VCN: implement indirect DPG SRAM modeLeo Liu2-19/+53
SRAM will be programmed by PSP Signed-off-by: Leo Liu <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/VCN: add buffer for indirect SRAM usageLeo Liu2-0/+22
This will be used later for indirect SRAM mode Signed-off-by: Leo Liu <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-21drm/amdgpu/psp: add new psp interface for vcn updating sramJack Xiao2-0/+16
PSP leverages the existing fw loading function for vcn updating sram. Signed-off-by: Jack Xiao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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