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path: root/drivers/gpu/drm/amd/amdgpu
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2017-12-06drm/amdgpu:fix NULL pointer access during drv removeMonk Liu8-14/+7
NULL pointer is because original logic will step into set_pde_pte() even after the gart.ptr is freed due to there are twice gart_unbind() on all gart area. also, there are other minor fixes: 1,since gart_init only create dummy page, the corresponding gart_fini shouldn't do more like unbinding all GART, this is unnecessary because in driver fini stage all GART unbinding had already been done during each IP's SW_FINI (GMC's SW_FINI is the last one called), so remove the step for the GART unbinding in gart_fini(). 2,gart_fini() is already invoked during each GMC IP's gart_fini routine,e.g. gmc_vx_0_gart_fini(), so no need to manually call it during ttm_fini(). 3,amdgpu_gem_force_release() should be put ahead of amdgpu_vm_manager_fini() Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup GMC & gart garbage functionMonk Liu7-156/+13
for gart_ram_alloc/free, they are never used in driver thus ripe them out totally. for gart_vram_pin/unpin, they are not needed becuase we can use bo_creat_kernel/free to replace the original manual way in the gart_vram_alloc/free, thus gart_vram_pin/unpin can also be riped out. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu:cleanup stolen vga memory finishMonk Liu1-8/+3
Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06amdgpu: Don't use DRM_ERROR when failing to allocate a BOMichel Dänzer2-3/+3
This can be triggered by userspace, e.g. trying to allocate too large a BO, so it shouldn't log anything by default. Callers need to handle failure anyway. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: not allow gtt size exceed 75%*system memory sizeRoger He1-3/+8
keep consistency with threshold of swapout Reviewed-by: Christian König <[email protected]> Signed-off-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Add ability to determine and report if board supports ECC.David Panariti1-0/+206
Make initialization code check the ECC related registers, which are initialized by the VBIOS, to see if ECC is present and initialized and DRM_INFO() the result. Signed-off-by: David Panariti <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx6: use cached values for raster config in clear stateAlex Deucher1-19/+1
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx7: use cached values for raster config in clear stateAlex Deucher1-23/+2
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx8: use cached values for raster config in clear stateAlex Deucher1-31/+2
Use the cached values rather than hardcoding it. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/virt: remove redundant variable pf2vf_verColin Ian King1-2/+0
Variable pf2vf_ver is assigned but never read, it is redundant and hence can be removed. Cleans up clang warning: drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:310:3: warning: Value stored to 'pf2vf_ver' is never read Reivewed-by: Horace Chen <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: fix UVD mc offsetsPiotr Redlewski5-4/+8
When UVD bo is created, its size is based on the information from firmware header (ucode_size_bytes). The same value should be be used when programming UVD mc controller offsets, otherwise it can happen that (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will point AMDGPU_GPU_PAGE_SIZE bytes after the UVD bo end. Second issue is that when programming the mmUVD_VCPU_CACHE_SIZE0 register, AMDGPU_UVD_FIRMWARE_OFFSET should be taken into account. If it isn't, (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will always point AMDGPU_UVD_FIRMWARE_OFFSET bytes after the UVD bo end. v2: move firmware size calculation into macro definition v3: align firmware size to the gpu page size Reviewed-by: Christian König <[email protected]> Signed-off-by: Piotr Redlewski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Implement BO size validation V2Andrey Grodzovsky1-0/+41
Validates BO size against each requested domain's total memory. v2: Make GTT size check a MUST to allow fall back to GTT. Rmove redundant NULL check. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: cleanup vm_size handlingChristian König6-24/+17
It's pointless to have the same value twice, just always use max_pfn. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE resultChristian König15-113/+113
Not sure what that should originally been good for, but it doesn't seem to make any sense any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use dep_sync for CS dependency/syncobjChunming Zhou1-2/+2
Otherwise, they could be optimized by scheduled fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gfx8: Fix compute ring failure after resettingXiangliang.Yu1-3/+7
Do ring clear before ring test, otherwise compute ring test will fail after gpu resetting. Still can't find the root cause, just workaround it. Signed-off-by: Xiangliang.Yu <[email protected]> Acked-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: revise retry init to fully cleanup driverPixel Ding3-15/+14
Retry at drm_dev_register instead of amdgpu_device_init. Reviewed-by: Christian König <[email protected]> Signed-off-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:read VRAMLOST from gimMonk Liu3-5/+8
Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: bypass FB resizing for SRIOV VFpding1-0/+4
It introduces 900ms latency in exclusive mode which causes failure of driver loading. Host can resize the BAR before guest staring, so the resizing is not necessary here. Signed-off-by: Pixel Ding <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: release exclusive mode after hw_initpding2-3/+4
Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdkfd: initialise kfd inside amdgpu_device_initpding2-5/+4
Also finalize kfd inside amdgpu_device_fini. kfd device_init needs SRIOV exclusive accessing. Try to gather exclusive accessing to reduce time consuming. Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind v2Christian König1-6/+15
Just allocate the GART space and fill it. This prevents forcing the BO to be idle. v2: don't unbind/bind at all, just fill the allocated GART space Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: rename amdgpu_ttm_bind to amdgpu_ttm_alloc_gartChristian König4-6/+6
We actually don't bind here, but rather allocate GART space if necessary. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: switch to use new SOC15 reg read/write macros for soc15 ihHawking Zhang1-23/+23
Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: resize VRAM BAR for CPU access v6Christian König6-13/+90
Try to resize BAR0 to let CPU access all of VRAM. v2: rebased, style cleanups, disable mem decode before resize, handle gmc_v9 as well, round size up to power of two. v3: handle gmc_v6 as well, release and reassign all BARs in the driver. v4: rename new function to amdgpu_device_resize_fb_bar, reenable mem decoding only if all resources are assigned. v5: reorder resource release, return -ENODEV instead of BUG_ON(). v6: squash in rebase fix Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: refine SR-IOV firmware VRAM reservation to protect dataHorace Chen1-1/+22
The previous solution will create a zero buffer on the system domain and then move the zeroes to the VRAM. This will break the original data on the VRAM. Refine the code to create bo on VRAM domain directly and then remove and re-create mem node to the exact position before bo_pin. This can avoid breaking the data and will not cause eviction. Signed-off-by: Horace Chen <[email protected]> Reviewed-by: monk liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: retry init if exclusive mode request is failedpding1-1/+1
This is caused of that hypervisor fails to handle request, one known issue is MMIO unblocking timeout. In theory we can retry init here. Signed-off-by: pding <[email protected]> Reviewed-by: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: return error when sriov access requests get timeoutpding1-2/+4
Reported-by: Sun Gary <[email protected]> Signed-off-by: pding <[email protected]> Reviewed-by: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04amdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LASTMichel Dänzer1-3/+0
Not used anymore. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04amdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcsMichel Dänzer4-16/+32
Hardcoding the maximum numbers could result in spurious error messages from the IRQ state callbacks, e.g. on Polaris 11/12: [drm:dce_v11_0_set_pageflip_irq_state [amdgpu]] *ERROR* invalid pageflip crtc 5 [drm:amdgpu_irq_disable_all [amdgpu]] *ERROR* error disabling interrupt (-22) Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: move GART recovery into GTT manager v2Christian König5-59/+59
The GTT manager handles the GART address space anyway, so it is completely pointless to keep the same information around twice. v2: rebased Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: nuke amdgpu_ttm_is_bound() v2Christian König5-22/+15
Rename amdgpu_gtt_mgr_is_allocated() to amdgpu_gtt_mgr_has_gart_addr() and use that instead. v2: rename the function as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:fix random missing of FLR NOTIFYMonk Liu1-3/+11
Signed-off-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu/sriov:fix memory leak in psp_load_fwMonk Liu1-8/+12
for SR-IOV when doing gpu reset this routine shouldn't do resource allocating otherwise memory leak Signed-off-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:cleanup ucode_init_boMonk Liu1-2/+2
1,no sriov check since gpu recover is unified 2,need CPU_ACCESS_REQUIRED flag for VRAM if SRIOV because otherwise after following PIN the first allocated VRAM bo is wasted due to some TTM mgr reason. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:cleanup in_sriov_reset and lock_resetMonk Liu8-16/+15
since now gpu reset is unified with gpu_recover for both bare-metal and SR-IOV: 1)rename in_sriov_reset to in_gpu_reset 2)move lock_reset from adev->virt to adev Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:implement new GPU recover(v3)Monk Liu8-184/+166
1,new imple names amdgpu_gpu_recover which gives more hint on what it does compared with gpu_reset 2,gpu_recover unify bare-metal and SR-IOV, only the asic reset part is implemented differently 3,gpu_recover will increase hang job karma and mark its entity/context as guilty if exceeds limit V2: 4,in scheduler main routine the job from guilty context will be immedialy fake signaled after it poped from queue and its fence be set with "-ECANCELED" error 5,in scheduler recovery routine all jobs from the guilty entity would be dropped 6,in run_job() routine the real IB submission would be skipped if @skip parameter equales true or there was VRAM lost occured. V3: 7,replace deprecated gpu reset, use new gpu recover Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04amd/scheduler:imple job skip feature(v3)Monk Liu1-5/+8
jobs are skipped under two cases 1)when the entity behind this job marked guilty, the job poped from this entity's queue will be dropped in sched_main loop. 2)in job_recovery(), skip the scheduling job if its karma detected above limit, and also skipped as well for other jobs sharing the same fence context. this approach is becuase job_recovery() cannot access job->entity due to entity may already dead. v2: some logic fix v3: when entity detected guilty, don't drop the job in the poping stage, instead set its fence error as -ECANCELED in run_job(), skip the scheduling either:1) fence->error < 0 or 2) there was a VRAM LOST occurred on this job. this way we can unify the job skipping logic. with this feature we can introduce new gpu recover feature. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: fix indentation in amdgpu_display.hChristian König1-3/+2
That was somehow completely of. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: delete duplicated code.Rex Zhu1-2/+0
the variable ref_clock was assigned same value twice in same function. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: add new pp function point notify_smu_memory_infoRex Zhu1-0/+6
Used to set up smu power logging. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: add header kgd_pp_interface.hRex Zhu2-3/+3
move powerplay and amdgpu shared structures and definitions to kgd_pp_interface.h. This is the interface between the base driver and powerplay. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: move struct amd_powerplay to amdgpu.hRex Zhu1-0/+7
Clean up the interface. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: remove extra parameter from amdgpu_ttm_bind() v2Christian König4-6/+6
We always use the BO mem now. v2: minor rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: don't wait interruptible while binding GART spaceChristian König1-1/+1
Display can't seem to handle this correctly. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: fix pin domain compatibility checkChristian König1-1/+1
We need to test if any domain fits, not all of them. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: always bind pinned BOsChristian König1-7/+7
We always need to bind pinned BOs, not just when the caller requested the address. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: use the actual placement for pin accountingChristian König1-0/+2
This allows us to specify multiple possible placements again. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: retry init if it fails due to exclusive mode timeout (v3)pding2-2/+23
The exclusive mode has real-time limitation in reality, such like being done in 300ms. It's easy observed if running many VF/VMs in single host with heavy CPU workload. If we find the init fails due to exclusive mode timeout, try it again. v2: - rewrite the condition for readable value. v3: - fix typo, add comments for sleep Acked-by: Alex Deucher <[email protected]> Signed-off-by: pding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu/virt: implement wait_reset callbacks for vi/aipding2-0/+7
Reviewed-by: Monk Liu <[email protected]> Signed-off-by: pding <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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