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2018-07-05drm/amdgpu: Add amdgpu_atpx_get_dhandle()Lyude Paul2-0/+12
Since it seems that some vendors are storing the ATIF ACPI methods under the same handle that ATPX lives under instead of the device's own handle, we're going to need to be able to retrieve this handle later so we can probe for ATIF there. Signed-off-by: Lyude Paul <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: s/disp_detetion_ports/disp_detection_ports/Lyude Paul1-2/+2
Fix typo. Reviewed-by: Jim Qu <[email protected]> Signed-off-by: Lyude Paul <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Make struct amdgpu_atif private to amdgpu_acpi.cLyude Paul2-41/+53
Currently, there is nothing in amdgpu that actually uses these structs other than amdgpu_acpi.c. Additionally, since we're about to start saving the correct ACPI handle to use for calling ATIF in this struct this saves us from having to handle making sure that the acpi_handle (and by proxy, the type definition for acpi_handle and all of the other acpi headers) doesn't need to be included within the amdgpu_drv struct itself. This follows the example set by amdgpu_atpx_handler.c. Signed-off-by: Lyude Paul <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Add stutter mode ctrl in module parameterrex zhu1-1/+2
Enable stutter mode can save power in low DRAM use cases including but not limited to productivity application use, web browsing, and video playback. Currently this feature is disabled by default. Make bit 17 in module parameter amdgpu_pp_feature_mask as stutter mode mask, so user can enable/disable this feature easily. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Move CG/PG setting out of delay worker threadRex Zhu1-6/+8
Partially revert commit 2dc80b00652f ("drm/amdgpu: optimize amdgpu driver load & resume time")' 1. CG/PG enablement are part of gpu hw ip initialize, we should wait for them complete. otherwise, there are some potential conflicts, for example, Suspend and CG enablement concurrently. 2. better run ib test after hw initialize completely. That is to say, ib test should be after CG/PG enablement. otherwise, the test will not cover the cg/pg/poweroff enable case. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Split set_pg_state into separate functionRex Zhu2-9/+28
1. add amdgpu_device_ip_late_set_pg_state function for set pg state. 2. delete duplicate pg state setting on gfx_v8_0's late_init. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Add gfx_off support in smu through pp_set_powergating_by_smuRex Zhu2-12/+11
we can take gfx off feature as gfx power gate. gfx off feature is also controled by smu. so add gfx_off support in pp_set_powergating_by_smu. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/pp: Add gfx pg support in smu through set_powergating_by_smuRex Zhu1-6/+4
gfx ip block can call set_powergating_by_smu to set gfx pg state if necessary. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/pp: Unify powergate_uvd/vce/mmhub to set_powergating_by_smuRex Zhu5-18/+38
Some HW ip blocks need call SMU to enter/leave power gate state. So export common set_powergating_by_smu interface. 1. keep consistent with set_clockgating_by_smu 2. scales easily to powergate other ip(gfx) if necessary Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Rename set_mmhub_powergating_by_smu to powergate_mmhubRex Zhu2-4/+4
In order to keep consistent with powergate_uvd/vce. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: remove duplicated codesFlora Cui1-5/+0
the fence_context and seqno is init in amdgpu_vm_manager_init() & amdgpu_vmid_mgr_init(). remove the amdgpu_vmid_mgr_init() copy. Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Rename entity cleanup finctions.Andrey Grodzovsky3-5/+5
Everything in the flush code path (i.e. waiting for SW queue to become empty) names with *_flush() and everything in the release code path names *_fini() Signed-off-by: Andrey Grodzovsky <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/scheduler: Rename cleanup functions v2.Andrey Grodzovsky7-11/+11
Everything in the flush code path (i.e. waiting for SW queue to become empty) names with *_flush() and everything in the release code path names *_fini() This patch also effect the amdgpu and etnaviv drivers which use those functions. v2: Also pplay the change to vd3. Signed-off-by: Andrey Grodzovsky <[email protected]> Suggested-by: Christian König <[email protected]> Acked-by: Lucas Stach <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05Revert "drm/amdgpu: avoid sleep while executing atombios table (V2)"Alex Deucher1-1/+1
This reverts commit 8f4805a265fd710a2827b2c0e10c08ef2b526870. This change was mistakenly committed and should have been dropped with the rest of the series. Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH v3.Andrey Grodzovsky2-13/+76
Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually succeed for the first one but fail for the rest since the work takes time to process. To avoid losing info about other interrupt instances call the parsing function directly from high IRQ when current work hasn't finished and avoid accessing SQ_EDC_INFO in that case. v2: Simplify high IRQ and BH handlers synchronization using work_pending. Remove {READ,WRITE}_ONCE notations since smp_{r,w}mb are implicit compiler barriers. v3: Remove exlicit memory barriers as scedule_work has r/w barriers. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: Polish SQ IH.Andrey Grodzovsky1-16/+20
Switch to using reg fields defines istead of magic values. Add SH_ID and PRIV fields reading for instr. and err cases. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amd/amdgpu: Add a GPU_LOAD entry to sysfs (v3)Tom St Denis1-0/+40
This adds what should be a stable interface to read GPU load from userspace. (v2): Fix comments and name of file per recommendations. (v3): Add chapter to amdgpu.rst as well. Signed-off-by: Tom St Denis <[email protected]> Acked-by: Slava Abramov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-05drm/amdgpu: band aid validating VM PTsChristian König1-1/+1
Always validating the VM PTs takes to much time. Only always validate the per VM BOs for now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-04Merge v4.18-rc3 into drm-nextDave Airlie9-36/+97
Two requests have come in for a backmerge, and I've got some pull reqs on rc2, so this just makes sense. Signed-off-by: Dave Airlie <[email protected]>
2018-07-03drm/amdgpu: Remove unecessary dma_fence_opsDaniel Vetter2-3/+0
dma_fence_default_wait is the default now. Reviewed-by: Christian König <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: Monk Liu <[email protected]> Cc: pding <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Evan Quan <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Kees Cook <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-28Merge tag 'ib-fbdev-drm-v4.19-deferred-console-takeover' of ↵Gustavo Padovan6-26/+64
https://github.com/bzolnier/linux into drm-misc-next Immutable branch between fbdev and drm for the v4.19 merge window (contains the deferred console takeover feature) Signed-off-by: Gustavo Padovan <[email protected]> # gpg: Signature made Thu 28 Jun 2018 10:24:50 AM -03 # gpg: using RSA key 7E33B63FA047C20B # gpg: Can't check signature: public key not found # Conflicts: # drivers/gpu/drm/i915/i915_gem.c # drivers/gpu/drm/i915/intel_crt.c # drivers/gpu/drm/i915/intel_display.c # drivers/gpu/drm/i915/intel_lrc.c Link: https://patchwork.freedesktop.org/patch/msgid/2462549.rLSfW9kX99@amdc3058
2018-06-27drm/amdgpu:Support new VCN FW version naming conventionJames Zhu1-6/+27
Support new VCN FW version naming convention: [31, 28] for VEP interface major version if applicable [27, 24] for decode interface major version [23, 20] for encode interface major version [19, 12] for encode interface minor version [11, 0] for firmware revision Bit 20-23, it is encode major and non-zero for new naming convention. This field is part of version minor and DRM_DISABLED_FLAG in old naming convention. Since the latest version minor is 0x5B and DRM_DISABLED_FLAG is zero in old naming convention, this field is always zero so far. These four bits are used to tell which naming convention is present. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Fang, Peter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-27drm/amdgpu: fix UBSAN: Undefined behaviour for amdgpu_fence.cLeo Liu1-1/+1
Here is the UBSAN dump: [ 3.866656] index 2 is out of range for type 'amdgpu_uvd_inst [2]' [ 3.866693] Workqueue: events work_for_cpu_fn [ 3.866702] Call Trace: [ 3.866710] dump_stack+0x85/0xc5 [ 3.866719] ubsan_epilogue+0x9/0x40 [ 3.866727] __ubsan_handle_out_of_bounds+0x89/0x90 [ 3.866737] ? rcu_read_lock_sched_held+0x58/0x60 [ 3.866746] ? __kmalloc+0x26c/0x2d0 [ 3.866846] amdgpu_fence_driver_start_ring+0x259/0x280 [amdgpu] [ 3.866896] amdgpu_ring_init+0x12c/0x710 [amdgpu] [ 3.866906] ? sprintf+0x42/0x50 [ 3.866956] amdgpu_gfx_kiq_init_ring+0x1bc/0x3a0 [amdgpu] [ 3.867009] gfx_v8_0_sw_init+0x1ad3/0x2360 [amdgpu] [ 3.867062] ? smu7_init+0xec/0x160 [amdgpu] [ 3.867109] amdgpu_device_init+0x112c/0x1dc0 [amdgpu] 'ring->me' might be set as 2 with 'amdgpu_gfx_kiq_init_ring', that would cause out of range for 'amdgpu_uvd_inst[2]'. v2: simplified with ring type Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-22drm/amdgpu: GPU vs CPU page size fixes in amdgpu_vm_bo_split_mappingMichel Dänzer1-3/+5
start / last / max_entries are numbers of GPU pages, pfn / count are numbers of CPU pages. Convert between them accordingly. Fixes badness on systems with > 4K page size. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106258 Reported-by: Matt Corallo <[email protected]> Tested-by: [email protected] Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-22Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie32-307/+1928
into drm-next First feature request for 4.19. Highlights: - Add initial amdgpu documentation - Add initial GPU scheduler documention - GPU scheduler fixes for dying processes - Add support for the JPEG engine on VCN - Switch CI to use powerplay by default - EDC support for CZ - More powerplay cleanups - Misc DC fixes Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-22Merge tag 'drm-misc-next-2018-06-21' of ↵Dave Airlie1-4/+1
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.19: UAPI Changes: - Add writeback connector (Brian Starkey/Liviu Dudau) - Add "content type" property to HDMI connectors (Stanislav Lisovskiy) Cross-subsystem Changes: - some devicetree Docs update - fix compile breakage on ION due to the dma-buf cleanups (Christian König) Core Changes: - Reject over-sized allocation requests early (Chris Wilson) - gem-fb-helper: Always do implicit sync (Daniel Vetter) - dma-buf cleanups (Christian König) Driver Changes: - Fixes for the otm8009a panel driver (Philippe Cornu) - Add Innolux TV123WAM panel driver support (Sandeep Panda) - Move GEM BO to drm_framebuffer in few drivers (Daniel Stone) - i915 pinning improvements (Chris Wilson) - Stop consulting plane->fb/crtc in a few drivers (Ville Syrjälä) Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20180621105428.GA20795@juma
2018-06-20Merge drm-upstream/drm-next into drm-misc-nextGustavo Padovan95-2054/+6056
We got a few conflicts in drm_atomic.c after merging the DRM writeback support, now we need a backmerge to unlock develop development on drm-misc-next. Signed-off-by: Gustavo Padovan <[email protected]>
2018-06-20dma-buf: remove kmap_atomic interfaceChristian König1-2/+0
Neither used nor correctly implemented anywhere. Just completely remove the interface. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Acked-by: Sumit Semwal <[email protected]> Link: https://patchwork.freedesktop.org/patch/226645/
2018-06-20dma_buf: remove device parameter from attach callback v2Christian König1-2/+1
The device parameter is completely unused because it is available in the attachment structure as well. v2: fix kerneldoc as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/226643/
2018-06-19drm/amdgpu: Make amdgpu_vram_mgr_bo_invisible_size always accurateMichel Dänzer1-2/+18
Even BOs with AMDGPU_GEM_CREATE_NO_CPU_ACCESS may end up at least partially in CPU visible VRAM, in particular when all VRAM is visible. v2: * Don't take VRAM mgr spinlock, not needed (Christian König) * Make loop logic simpler and clearer. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Refactor amdgpu_vram_mgr_bo_invisible_size helperMichel Dänzer3-4/+19
Preparation for the following fix, no functional change intended. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Update pin_size values before unpinning BOMichel Dänzer1-10/+8
At least in theory, ttm_bo_validate may move the BO, in which case the pin_size accounting would be inconsistent with when the BO was pinned. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu:All UVD instances share one idle_work handleJames Zhu2-8/+8
All UVD instanses have only one dpm control, so it is better to share one idle_work handle. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Stefan Agner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Use correct enum to set powergating stateStefan Agner1-1/+1
Use enum amd_powergating_state instead of enum amd_clockgating_state. The underlying value stays the same, so there is no functional change in practise. This fixes a warning seen with clang: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:1930:14: warning: implicit conversion from enumeration type 'enum amd_clockgating_state' to different enumeration type 'enum amd_powergating_state' [-Wenum-conversion] AMD_CG_STATE_UNGATE); ^~~~~~~~~~~~~~~~~~~ Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: correct GART location infoJunwei Zhang1-8/+6
Avoid confusing the GART with the GTT domain. Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: update ib_start/size_alignment same as windows usedChunming Zhou1-14/+14
PAGE_SIZE for start_alignment is far much than hw requirement, And now, update to expereince value from window side. Signed-off-by: Chunming Zhou <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Don't default to DC support for Kaveri and olderHarry Wentland1-1/+9
We've had a number of users report failures to detect and light up display with DC with LVDS and VGA. These connector types are not currently supported with DC. I'd like to add support but unfortunately don't have a system with LVDS or VGA available. In order not to cause regressions we should probably fallback to the non-DC driver for ASICs that support VGA and LVDS. These ASICs are: * Bonaire * Kabini * Kaveri * Mullins ASIC support can always be force enabled with amdgpu.dc=1 v2: Keep Hawaii on DC v3: Added Mullins to the list Cc: [email protected] Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Use kvmalloc_array for allocating VRAM manager nodes arrayMichel Dänzer1-3/+4
It can be quite big, and there's no need for it to be physically contiguous. This is less likely to fail under memory pressure (has actually happened while running piglit). Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Update function level documentation for GPUVM.Andrey Grodzovsky1-0/+12
Add documentation for missed parameters. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Get real power source to initizlize ac_powerRex Zhu1-0/+3
driver need to know the real power source to do some power related configuration when initialize. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Use real power source in powerplay instand of hardcodeRex Zhu5-20/+21
1. move ac_power to struct pm from dpm, so can be shared with powerplay 2. remove power_source in powerplay, use adev->pm.ac_power instand. 3. update ac_power before dispatch power task. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/doc: Add amdgpu hwmon/power documentation (v2)Alex Deucher1-8/+37
Document the hwmon and power control interfaces exposed by the amdgpu driver. v2: use section rather than chapter for now Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Consolidate visible vs. real vram check v2.Andrey Grodzovsky5-23/+27
Move all instnaces of this check into a function in amdgpu_gmc.h Rename the original function to a more proper name. v2: Add more places to cleanup. Reviewed-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: update documentation for amdgpu_irq.c v3Slava Abramov1-63/+139
Add/update function level documentation and add reference to amdgpu_irq.c in amdgpu.rst v2: Added DOC comment Added more explanations for amdgpu_hotplug_work_func Properly formatted unused parameters Properly formatted return values Fixed usage of acronyms More consistent styling v3: Removed duplicate "not" Using '&' to refer to functions and types Signed-off-by: Slava Abramov <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Update function level documentation for GPUVM v3Andrey Grodzovsky1-38/+215
Add/update function level documentation and add reference to amdgpu_vm.c in amdgpu.rst v2: Fix reference in rst file. Fix compilation warnings. Add space between function names and params list where it's missing. v3: Fix some funtion comments. Add formatted documentation to structs. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: fix typo in amdgpu_mn.c commentsSlava Abramov1-1/+1
In doc comments for struct amdgpu_mn: destrution -> destruction Signed-off-by: Slava Abramov <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: fix documentation of amdgpu_mn.c v2Christian König1-16/+58
And wire it up as well. v2: improve the wording, fix label mismatch Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: rename rmn to amn in the MMU notifier code (v2)Christian König1-70/+70
Just a copy&paste leftover from radeon. v2: rebase (Alex) Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.hHarry Wentland1-0/+8
DC has an upcoming change that requires these to read the board layout. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: remove unused parameter for va updateJunwei Zhang1-3/+1
Don't need validation list any more Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: David Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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