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path: root/drivers/gpu/drm/amd/amdgpu
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2016-07-07drm/amdgpu: properly clean up runtime pmAlex Deucher1-10/+21
Was missing the calls to fini. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: work around lack of upstream ACPI support for D3coldAlex Deucher1-0/+9
Until Dave's patch to support the new hybrid gfx ACPI method goes upstream, we can fallback to the old ATPX method which seems to still work. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add gpu reset to timeout handlerChunming Zhou1-0/+1
so that we could actually reset the GPU when it hangs. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix ring debugfs bugMonk Liu2-0/+13
debugfs file added but not released after driver unloaded Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: ring debugfs is read in increments of 4 bytesTom St Denis1-1/+1
If a user tries to read a non-multiple of 4 bytes it would have read until the end of the ring potentially crashing the user task. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Convert ring debugfs entries to binaryTom St Denis1-65/+62
They now emit ring data in binary which will be read/written by the userspace tool umr shortly. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power controlAlex Deucher1-4/+4
The ATPX power control method does this for you. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: hybrid platforms use d3coldAlex Deucher1-1/+3
The platform d3 cold is used to power down the dGPU. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: track whether if this is a hybrid graphics platformAlex Deucher2-1/+10
hybrid graphics in this case refers to systems which use the new platform d3 cold ACPI methods as opposed to ATPX for dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: drop forcing of dGPU power controlAlex Deucher1-5/+0
Now that we handle this correctly, there is no need to force it. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: use PCI_D3hot for PX systems without dGPU power controlAlex Deucher1-1/+4
On PX systems without dGPU power control, use PCI_D3hot. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: add a query for ATPX dGPU power controlAlex Deucher2-0/+6
The runtime pm sequence is different depending on whether or not the platform supports ATPX dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add a delay after ATPX dGPU power offAlex Deucher1-0/+5
ATPX dGPU power control requires a 200ms delay between power off and on. This should fix dGPU failures on resume from power off. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-07-07drm/amdgpu: clean up atpx power control handlingAlex Deucher1-22/+29
The presence of the power control method should be determined via the presence of the method in function 0. However, some sbioses only set the appropriate bits in function 1 so use then to override a missing power control function. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: disable power control on hybrid laptopsAlex Deucher1-0/+5
Windows 10 (and some 8.1) systems use standardized ACPI calls for hybrid laptops to control dGPU power. Detect those cases and disable the AMD specific ATPX power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disableTom St Denis1-0/+2
Must wait for SERDES idle before exiting RLC SAFEMODE Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add mclk OD(overdrive) support for CIEric Huang1-0/+36
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the common code to support mclk ODEric Huang2-0/+63
This implements mclk OverDrive(OD) through sysfs. The new entry pp_mclk_od is read/write. The value of input/output is an integer of the overclocking percentage. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add powercontainment module parameterHuang Rui3-0/+6
This patch makes powercontainment feature configurable. Currently, the powercontainment is not very stable, so add a module parameter to enable/disable it via user mode. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix and cleanup job destructionChristian König3-16/+6
Remove the job reference counting and just properly destroy it from a work item which blocks on any potential running timeout handler. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: properly abstract scheduler timeout handlingChristian König3-10/+9
The driver shouldn't mess with the scheduler internals. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove use_shed hack in job cleanupChristian König1-5/+8
Remembering the code path in a variable to cleanup differently is usually not a good idea at all. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix coding style in amdgpu_job_freeChristian König1-3/+4
Ther should be a new line between code and decleration. Also use amdgpu_ib_free() instead of releasing the member manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove begin_job/finish_jobChristian König1-2/+0
Completely pointless and confusing to use a callback to call into the same code file. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the CI code to enable sclk OD(OverDrive)Eric Huang2-0/+41
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the CI code to enable clock level selectionEric Huang1-0/+114
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the new common pm code to support sclk ODEric Huang2-9/+17
This extends OD (OverDrive) support to the non-Powerplay code paths. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the new common pm code to select the clock levelsEric Huang2-18/+34
This extends dpm clock level selection to the non-powerplay code paths. This interface can be used to select individual clock levels. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: Enable GFX PG on CZTom St Denis1-0/+8
Based on Alex's patches this enables GFX PG on CZ. Tested with xonotic-glx/glxgears/supertuxkart and idle desktop. Also read-back registers via umr for verificiation that the bits are truly enabled. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: clean up polaris11 PG enableAlex Deucher1-5/+13
Fix the logic for enabling/disabling. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: add powergating support for CZ/STAlex Deucher1-6/+126
This implements powergating support for CZ/ST asics. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: rename some pg functionsAlex Deucher1-10/+12
So they can be shared with other asics. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gatingAlex Deucher1-5/+128
This sets up the CP jump table and GDS buffer and sets the PG state registers. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx7: expand cp jt size to handle GDS as wellAlex Deucher1-1/+2
The size needs to handle the CP JT and GDS. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add powerplay sclk OD support through sysfs (v2)Eric Huang2-0/+55
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking, the entry is read/write, the value of input/output is an integer which is the over percentage of the highest sclk. v2: drop extra semicolon Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: load different smc firmware on some CI variantsAlex Deucher1-2/+12
The power tables on some variants require different firmware. This fixes stability issues on some newer CI parts. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91880 Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: clear RB at ring initMonk Liu1-0/+3
This help fix reloading driver hang issue of SDMA ring. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-02Back-merge tag 'v4.7-rc5' into drm-nextDave Airlie20-47/+234
Linux 4.7-rc5 The fsl-dcu pull needs -rc3 so go to -rc5 for now.
2016-06-29drm/amd/powerplay: workaround for UVD clock issueRex Zhu1-0/+4
workaround issue that when uvd dpm disabled, uvd clock remain high on polaris10. Manually turn off the clocks. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-06-29drm/amdgpu: add ACLK_CNTL setting for polaris10Ken Wang1-0/+3
This is a temporary workaround for early boards. Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-06-24drm/amdgpu: Turn off CRTCs on driver unloadLukas Wunner1-0/+1
amdgpu leaks a runtime pm ref if at least one CRTC is enabled on unload. The ref is taken by amdgpu_crtc_set_config() and held as long as a CRTC is in use. Fix by turning off all CRTCs on unload. Cc: Alex Deucher <[email protected]> Signed-off-by: Lukas Wunner <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/7bf8d9ceb9d343a7495788667e6da170b8fd3af1.1465392124.git.lukas@wunner.de
2016-06-24drm/amdgpu: Forbid runtime pm on driver unloadLukas Wunner1-0/+1
The PCI core calls pm_runtime_forbid() on device probe in pci_pm_init(), making this the default state when amdgpu is loaded. amdgpu_driver_load_kms() therefore calls pm_runtime_allow(), but there's no pm_runtime_forbid() in amdgpu_driver_unload_kms() to balance it. Add it so that we leave the device in the same state that we found it. This isn't a bug, it's just good housekeeping. When amdgpu is first loaded with runpm=1, then unloaded and loaded again with runpm=0, pm_runtime_forbid() will be called from amdgpu_pmops_runtime_idle() or amdgpu_pmops_runtime_suspend(), so the behaviour is correct. If there ever is a third party driver for AMD cards, this commit avoids that it has to clean up behind amdgpu. Cc: Alex Deucher <[email protected]> Signed-off-by: Lukas Wunner <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/ccd4f7208acbd7761364418fc34f7849acbb4597.1465392124.git.lukas@wunner.de
2016-06-24drm/amdgpu: Don't leak runtime pm ref on driver loadLukas Wunner1-2/+5
If an error occurs in amdgpu_device_init() after adev->rmmio has been set, its caller amdgpu_driver_load_kms() will skip runtime pm initialization and call amdgpu_driver_unload_kms(), which acquires a runtime pm ref that is leaked. Balance by releasing a runtime pm ref in the error path of amdgpu_driver_load_kms(). Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Cc: Alex Deucher <[email protected]> Signed-off-by: Lukas Wunner <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/9a53449865759d7499a439ca2776093ee117b1eb.1465392124.git.lukas@wunner.de
2016-06-24drm/amdgpu: Don't leak runtime pm ref on driver unloadLukas Wunner1-1/+3
amdgpu_driver_load_kms() calls pm_runtime_put_autosuspend() if amdgpu_device_is_px(dev), but amdgpu_driver_unload_kms() calls pm_runtime_get_sync() unconditionally. We therefore leak a runtime pm ref whenever amdgpu is unloaded on a non-PX machine or if runpm=0. The GPU will subsequently never runtime suspend after loading amdgpu again. Fix by taking the runtime pm ref under the same condition that it was released on driver load. Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Cc: Alex Deucher <[email protected]> Signed-off-by: Lukas Wunner <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/86364eeb5711323608930c4f0f69046792ff6d3c.1465392124.git.lukas@wunner.de
2016-06-21drm/amdgpu/gfx8: update golden setting for polaris10Rex Zhu1-1/+2
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-06-20drm/amdgpu: initialize amdgpu_cgs_acpi_eval_object result valueNicolas Iooss1-1/+1
amdgpu_cgs_acpi_eval_object() returned the value of variable "result" without initializing it first. This bug has been found by compiling the kernel with clang. The compiler complained: drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: error: variable 'result' is used uninitialized whenever 'for' loop exits because its condition is false [-Werror,-Wsometimes-uninitialized] for (i = 0; i < count; i++) { ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:1011:9: note: uninitialized use occurs here return result; ^~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: note: remove the condition if it is always true for (i = 0; i < count; i++) { ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:864:12: note: initialize the variable 'result' to silence this warning int result; ^ = 0 Fixes: 3f1d35a03b3c ("drm/amdgpu: implement new cgs interface for acpi function") Signed-off-by: Nicolas Iooss <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2016-06-20drm/amdgpu: precedence bug in amdgpu_device_init()Dan Carpenter1-1/+1
! has higher precedence than bitwise & so we need to add parenthesis for this to work as intended. Fixes: 048765ad5af7 ('amdgpu: fix asic initialization for virtualized environments (v2)') Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-06-17drm/amdgpu: fix num_rbs exposed to userspace (v2)Alex Deucher1-1/+2
This was accidently broken for harvest cards when the code was refactored for Polaris support. v2: multiply by shader engines. Noticed by Nicolai. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-06-17drm/amdgpu: missing bounds check in amdgpu_set_pp_force_state()Dan Carpenter1-15/+13
There is no limit on high "idx" can go. It should be less than ARRAY_SIZE(data.states) which is 16. The "data" variable wasn't declared in that scope so I shifted the code around a bit to make it work. Also I made "idx" unsigned. Fixes: f3898ea12fc1 ('drm/amd/powerplay: add some sysfs interfaces for powerplay.') Acked-by: Christian König <[email protected]> Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-06-16PM / Domains: Allow genpd to power on during system PM phasesUlf Hansson1-23/+0
If a PM domain is powered off when the first device starts its system PM prepare phase, genpd prevents any further attempts to power on the PM domain during the following system PM phases. Not until the system PM complete phase is finalized for all devices in the PM domain, genpd again allows it to be powered on. This behaviour needs to be changed, as a subsystem/driver for a device in the same PM domain may still need to be able to serve requests in some of the system PM phases. Accordingly, it may need to runtime resume its device and thus also request the corresponding PM domain to be powered on. To deal with these scenarios, let's make the device operational in the system PM prepare phase by runtime resuming it, no matter if the PM domain is powered on or off. Changing this also enables us to remove genpd's suspend_power_off flag, as it's being used to track this condition. Additionally, we must allow the PM domain to be powered on via runtime PM during the system PM phases. This change also requires a fix in the AMD ACP (Audio CoProcessor) drm driver. It registers a genpd to model the ACP as a PM domain, but unfortunately it's also abuses genpd's "internal" suspend_power_off flag to deal with a corner case at system PM resume. More precisely, the so called SMU block powers on the ACP at system PM resume, unconditionally if it's being used or not. This may lead to that genpd's internal status of the power state, may not correctly reflect the power state of the HW after a system PM resume. Because of changing the behaviour of genpd, by runtime resuming devices in the prepare phase, the AMD ACP drm driver no longer have to deal with this corner case. So let's just drop the related code in this driver. Signed-off-by: Ulf Hansson <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Maruthi Bayyavarapu <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
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