| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2020-05-14 | drm/amdgpu: Add AQUIRE_MEM PACKET3 fields defintion | Andrey Grodzovsky | 1 | -1/+24 | |
| Add this for gfx10 and gfx9. v2: Fix identation Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-04-28 | drm/amdgpu: add tmz bit in frame control packet | Huang Rui | 1 | -0/+1 | |
| This patch adds tmz bit in frame control pm4 packet, and it will used in future. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-06-15 | drm/amdgpu: add jpeg packet defines to soc15d.h | Boyuan Zhang | 1 | -0/+23 | |
| Add new packet for vcn jpeg, including condition checks, types and packet Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-05-16 | Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux ↵ | Dave Airlie | 1 | -0/+1 | |
| into drm-next Main changes for 4.18. I'd like to do a separate pull for vega20 later this week or next. Highlights: - Reserve pre-OS scanout buffer during init for seemless transition from console to driver - VEGAM support - Improved GPU scheduler documentation - Initial gfxoff support for raven - SR-IOV fixes - Default to non-AGP on PowerPC for radeon - Fine grained clock voltage control for vega10 - Power profiles for vega10 - Further clean up of powerplay/driver interface - Underlay fixes - Display link bw updates - Gamma fixes - Scatter/Gather display support on CZ/ST - Misc bug fixes and clean ups [airlied: fixup v3d vs scheduler API change] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Dave Airlie <[email protected]> | |||||
| 2018-05-15 | drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences | Marek Olšák | 1 | -0/+1 | |
| There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-04-10 | drm/amdgpu: Add GFXv9 TLB invalidation packet definition | Felix Kuehling | 1 | -0/+5 | |
| Signed-off-by: Shaoyun Liu <[email protected]> Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]> | |||||
| 2017-08-18 | drm/amdgpu: fix vega10 graphic hang issue in S3 test | Ken Wang | 1 | -0/+1 | |
| mmVGT_INDEX_TYPE has no default value, need to make sure it's initialized when gfx is initialized. Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-05-24 | drm/amdgpu/gfx9: move define to header file | Alex Deucher | 1 | -0/+1 | |
| rather than defining it locally. Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-05-24 | drm/amdgpu:new PM4 entry for VI/AI | Monk Liu | 1 | -0/+7 | |
| TMZ package will be used for VULKAN/CHAINED-IB MCBP Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-05-24 | drm/amdgpu: add KIQ packet defines to soc15d.h | Alex Deucher | 1 | -0/+82 | |
| Will be used in subsequent commits rather rather than magic numbers. Reviewed-by: monk liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu:enable mcbp for gfx9(v2) | Monk Liu | 1 | -0/+1 | |
| set bit 21 of IB.control filed to actually enable MCBP for SRIOV v2: add flag for preemption enable bit for soc15 and use this flag instead of hardcode. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: init kiq and kcq for vega10 | Xiangliang Yu | 1 | -0/+2 | |
| Init kiq via cpu mmio and init kcq through kiq. Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add common soc15 headers | Ken Wang | 1 | -0/+285 | |
| These are used by various IP modules. Acked-by: Christian König <[email protected]> Signed-off-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||