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path: root/drivers/gpu/drm/amd/amdgpu/soc15.c
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2019-05-20drm/amdgpu/soc15: skip reset on initAlex Deucher1-0/+5
Not necessary on soc15 and breaks driver reload on server cards. Acked-by: Amber Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-04-19drm/amdgpu: enable MGCG for PCOLikun Gao1-1/+2
Enable MGCG for picasso. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-19drm/amdgpu: enable Vega20 BACO reset supportEvan Quan1-0/+6
PSP SOS firmware needs to be 0x80067 or later. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-27drm/amdgpu: error out on mode1 reset failureEvan Quan1-2/+5
The error return value should be correctly reflected. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: apply Vega20 BACO workaroundEvan Quan1-0/+2
Applied vdci flush workaround for Vega20 BACO. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add limit of pp_feature for smu (v3)Likun Gao1-1/+1
Move pp_feature from the struct of amd_powerplay to amdgpu_device. Add pp_feature limit for overdrive interface. v2: put pp_feature into struct amdgpu_pm. v3: merge feature_mask with pp_feature. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Suggested-by: Alex Deucher <[email protected]> Suggested-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement is_support_sw_smu function for new smuKevin Wang1-1/+1
add this helper to check new sw-smu support. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amdgpu: enable new smu ip block for vega20Huang Rui1-2/+7
Switch to new smu ip block since vega20. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-05drm/amdgpu: use BACO on vega12 if platform supports itAlex Deucher1-0/+1
Use BACO for reset of the platform supports it. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-27Revert "drm/amdgpu: use BACO reset on vega20 if platform support"Candice Li1-1/+0
This reverts commit 2172b89e7c94605380d8c0dedf543c93f0a0b27c. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18Merge v5.0-rc7 into drm-nextDave Airlie1-2/+4
Backmerging for nouveau and imx that needed some fixes for next pulls. Signed-off-by: Dave Airlie <[email protected]>
2019-02-01drm/amdgpu: fix the incorrect external id for raven seriesHuang Rui1-2/+4
This patch fixes the incorrect external id that kernel reports to user mode driver. Raven2's rev_id is starts from 0x8, so its external id (0x81) should start from rev_id + 0x79 (0x81 - 0x8). And Raven's rev_id should be 0x21 while rev_id == 1. Reported-by: Crystal Jin <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: check PSP support before adding the ip blockEvan Quan1-5/+8
So that we do not need to check this in every internal function. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: Setting doorbell range registers earlierOak Zeng1-0/+22
HW doorbell writing routing policy: writing to doorbell not in SDMA/IH/MM/ACV doorbell range will be routed to CP. So CP doorbell routing depends on doorbell range setting of above blocks. Setting doorbell range of above blocks earlier (soc15_common_hw_init) to make sure CP doorbell writing be routed to CP block. Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu/soc15: return proper error codes in baco resetAlex Deucher1-4/+4
Rather than just -1. Reviewed-by: JimQu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: use BACO reset on vega20 if platform supportJim Qu1-0/+1
Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: use BACO reset if platform support (v2)Jim Qu1-3/+58
It will fall back to use mode1 reset if platform does not support BACO feature. v2: squash in warning fix (Alex) Signed-off-by: Jim Qu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu/soc15: add need_reset_on_init asic callback for SOC15 (v2)Alex Deucher1-0/+20
SOC15 chips require a reset if the driver was previously loaded because the PSP can only be loaded once between each reset. v2: rebase, handle multiple asic funcs Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-14drm/amdgpu: Add sysfs file for PCIe usage v5Kent Russell1-0/+50
Add a sysfs file that reports the number of bytes transmitted and received in the last second. This can be used to approximate the PCIe bandwidth usage over the last second. v2: Clarify use of mps as estimation of bandwidth v3: Don't make the file on APUs v4: Early exit for APUs in the read function, change output to display "packets-received packets-sent mps" v5: fix missing header for si (Alex) Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-12-13Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-0/+3
into drm-next [airlied: make etnaviv build again] amdgpu: - DC trace support - More DC documentation - XGMI hive reset support - Rework IH interaction with KFD - Misc fixes and cleanups - Powerplay updates for newer polaris variants - Add cursor plane update fast path - Enable gpu reset by default on CI parts - Fix config with KFD/HSA not enabled amdkfd: - Limit vram overcommit - dmabuf support - Support for doorbell BOs ttm: - Support for simultaneous submissions to multiple engines scheduler: - Add helpers for hw with preemption support Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-12-06Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-1/+22
into drm-next amdgpu and amdkfd: - Freesync support - ABM support in DC - KFD support for vega12 and polaris12 - Add sdma paging queue support for vega - Use ACPI to query backlight range on supported platforms - Clean up doorbell handling - KFD fix for pasid handling under non-HWS - Misc cleanups and fixes scheduler: - Revert "fix timeout handling v2" radeon: - Fix possible overflow on 32 bit ttm: - Fix for LRU handling for ghost objects Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-12-03drm/amdgpu: add a xgmi supported flagAlex Deucher1-0/+3
Use this to track whether an asic supports xgmi rather than checking the asic type everywhere. Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-28drm/amdgpu: Doorbell layout for vega20 and future asicOak Zeng1-1/+21
This introduces new doorbell layout for vega20 and future asics v2: Use enum definition instead of hardcoded value Signed-off-by: Oak Zeng <[email protected]> Suggested-by: Felix Kuehling <[email protected]> Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-28drm/amdgpu: Vega10 doorbell index initializationOak Zeng1-0/+1
v2: Use enum definition instead of hardcoded value v3: Remove unused enum definition Signed-off-by: Oak Zeng <[email protected]> Suggested-by: Felix Kuehling <[email protected]> Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-20drm/amdgpu: Enable HDP memory light sleepKenneth Feng1-7/+32
Due to the register name and setting change of HDP memory light sleep on Vega20,change accordingly in the driver. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: Change AI gfx/sdma/smu init sequenceRex Zhu1-4/+4
initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu:Enable DPG mode on PCOJames Zhu1-1/+2
Add flag AMD_PG_SUPPORT_DPG to enable DPG mode on Picasso Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-19drm/amdgpu: Exclude MM engines for vega20 virtual deviceFrank Min1-2/+4
Temporary disable UVD/VCE block if is virtual device Signed-off-by: Frank Min <[email protected]> Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: simplify Raven, Raven2, and Picasso handlingAlex Deucher1-36/+30
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu/soc15: clean up picasso supportAlex Deucher1-17/+0
It's the same as raven so remove the duplicate case. Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: set CG flags for raven2 (v2)Huang Rui1-20/+37
Raven2 does not enable all of the CG flags that raven1 does. v2: rebase (Alex) Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: set external rev id for raven2Alex Deucher1-1/+4
It's different from raven1. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: move get_rev_id at first before load gpu_info firmwareHuang Rui1-6/+7
Rev id is used for identifying Raven2 series of chips. So we would better to initialize it at first. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: add ip blocks for picasso (v2)Huang Rui1-0/+18
Add PCO IPs. V2: enable VCN as well Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: enable vcn powergating for PCOKenneth Feng1-1/+3
enable vcn pg Signed-off-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: enable mmhub power gatingKenneth Feng1-1/+1
Remove some functions due to the design change. All the mmhub power gating sequence is moved to smu fw.Driver sends the message to enable mmhub powergating.We can also skip the fw version check since the old fw version is in a very early stage and we don't use that fw for release. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: Enable SDMA power gating for PCOKenneth Feng1-0/+2
Enable SDMA power gating Signed-off-by: Kenneth Feng <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: Add pg support for gfxoff for PCOKenneth Feng1-1/+4
Add pg support for gfxoff. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: add soc15 support for picassoLikun Gao1-0/+21
Add the IP blocks, clock and powergating flags, and common clockgating support. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: Add psp 11.0 support for vega20. (v2)Feifei Xu1-2/+3
Add psp 11.0 code for vega20 and enable it. PSP is the security processor for the GPU. It handles firmware loading and GPU resets among other things. v2: whitespace fix, enable support, adjust reg includes (Alex) Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: enable vega20 powerplay supportEvan Quan1-2/+2
Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: Add nbio 7.4 support for vega20 (v3)Feifei Xu1-0/+2
Some register offset in nbio v7.4 are different with v7.0. We need a seperate nbio_v7_4.c for vega20. v2: fix doorbell range for sdma (Alex) v3: squash in static fix (kbuild test robot) Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27Revert "drm/amdgpu: Add nbio support for vega20 (v2)"Alex Deucher1-2/+0
Revert this to add proper nbio 7.4 support. This reverts commit f5b2e1fa321eff20a9418ebd497d8a466f024a85. Signed-off-by: Alex Deucher <[email protected]>
2018-05-30drm/amdgpu: typo fix for vega20 cg flagsEvan Quan1-0/+1
The AMD_CG_SUPPORT_HDP_LS was wrongly written as AMD_CG_SUPPORT_BIF_LS. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-24drm/amdgpu: Enable VCN static PG by default on RVRex Zhu1-1/+2
Enable static VCN powergating by default on Raven. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-24drm/amdgpu: Enable VCN CG by default on RVRex Zhu1-1/+2
Enable VCN clockgating by default on Raven. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)Feifei Xu1-1/+5
v2: fix whitespace (Alex) Reviewed-by: Christian König <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amdgpu/vg20:Enable UVD/VCE for Vega20James Zhu1-4/+2
Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default. So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled at this moment. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amdgpu: Disable ip modules that are not ready yetFeifei Xu1-5/+9
Please enable above ips on soc15.c when they're available. Reviewed-by: Christian König <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amd/powerplay: update vega20 cg flags (v2)Evan Quan1-1/+17
v2: remove duplicate flag. Reviewed-by: Christian König <[email protected]> Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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