aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
AgeCommit message (Collapse)AuthorFilesLines
2021-12-01drm/amdgpu/sriov/vcn: add new vcn ip revision check case for SIENNA_CICHLIDJane Jian1-0/+1
[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-10drm/amdgpu: add missed support for UVD IP_VERSION(3, 0, 64)Guchun Chen1-0/+1
Fixes: 96b8dd4423e74d ("drm/amdgpu/amdgpu_vcn: convert to IP version checking") Signed-off-by: Flora Cui <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-21drm/amdgpu: Consolidate VCN firmware setup codeAlex Deucher1-0/+27
Roughly the same code was present in all VCN versions. Consolidate it into a single function. v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst >= 2 Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: James Zhu <[email protected]>
2021-10-08drm/amdgpu: use adev_to_drm for consistency when accessing drm_deviceGuchun Chen1-3/+3
adev_to_drm is used everywhere, so improve recent changes when accessing drm_device pointer from amdgpu_device. Signed-off-by: Guchun Chen <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: convert IP version array to include instancesAlex Deucher1-2/+2
Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/amdgpu_vcn: convert to IP version checkingAlex Deucher1-26/+21
Use IP versions rather than asic_type to differentiate IP version specific features. v2: squash in fix for navy flounder and sienna cichlid Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amdgpu: VCN avoid memory allocation during IB testxinhui pan1-53/+44
alloc extra msg from direct IB pool. Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-01drm/amdgpu/vcn: set the priority for each encode ringSatyajit Sahu1-0/+14
VCN has multiple rings. Set the proper priority level for each encode ring while initializing. Signed-off-by: Satyajit Sahu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-25drm/amdgpu: drop redundant cancel_delayed_work_sync callEvan Quan1-2/+0
As those _sw_fini() APIs follow just after _suspend() APIs. And the cancel_delayed_work_sync was already called in latter. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-18drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of ↵Bokun Zhang1-0/+23
MMSCH In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang <[email protected]> Signed-off-by: Peng Ju Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-09drm/amdgpu/vcn: drop gfxoff control for VCN2+Alex Deucher1-2/+0
Drop disabling of gfxoff during VCN use. This allows gfxoff to kick in and potentially save power if the user is not using gfx for color space conversion or scaling. VCN1.0 had a bug which prevented it from working properly with gfxoff, so we disabled it while using VCN. That said, most apps today use gfx for scaling and color space conversion rather than overlay planes so it was generally in use anyway. This was fixed on VCN2+, but since we mostly use gfx for color space conversion and scaling and rapidly powering up/down gfx can negate the advantages of gfxoff, we left gfxoff disabled. As more applications use overlay planes for color space conversion and scaling, this starts to be a win, so go ahead and leave gfxoff enabled. Note that VCN1.0 uses vcn_v1_0_idle_work_handler() and vcn_v1_0_ring_begin_use() so they are not affected by this patch. Reviewed-by: James Zhu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04drm/amdgpu/vcn: add vcn support for yellow carpJames Zhu1-0/+8
Add vcn firmware support for yellow carp Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-22Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-0/+8
Backmerging from drm/drm-next to the patches for AMD devices for v5.14. Signed-off-by: Thomas Zimmermann <[email protected]>
2021-05-19drm/amdgpu: Guard against write accesses after device removalAndrey Grodzovsky1-6/+16
This should prevent writing to memory or IO ranges possibly already allocated for other uses after our device is removed. v5: Protect more places wher memcopy_to/form_io takes place Protect IB submissions v6: Switch to !drm_dev_enter instead of scoping entire code with brackets. v7: Drop guard of HW ring commands emission protection since they are in GART and not in MMIO. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-19drm/amdgpu: Enable VCN for Beige GobyVeerabadhran Gopalakrishnan1-0/+8
Enabled VCN support for Beige Goby chip Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: enable dpg indirect sram mode on aldebaranJames Zhu1-0/+3
Enable dpg indirect sram mode on aldebaran. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: add Aldebaran to the VCN familyJames Zhu1-0/+5
including firmware support etc. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-01-07Merge tag 'drm-misc-next-2020-12-17' of ↵Daniel Vetter1-3/+6
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.12: UAPI Changes: - Not necessarily one, but we document that userspace needs to force probe connectors. Cross-subsystem Changes: - Require FB_ATY_CT for aty on sparc64. - video: Fix documentation, and a few compiler warnings. - Add devicetree bindings for DP connectors. - dma-buf: Update kernel-doc, and add might_lock for resv objects in begin/end_cpu_access. Core Changes: - ttm: Warn when releasing a pinned bo. - ttm: Cleanup bo size handling. - cma-helper: Remove prime infix, and implement mmap as GEM CMA functions. - Split drm_prime_sg_to_page_addr_arrays into 2 functions. - Add a new api to install irq using devm. - Update panel kerneldoc to inline style. - Add DP support to drm/bridge. - Assorted small fixes to ttm, fb-helper, scheduler. - Add atomic_commit_setup function callback. - Automatically use the atomic gamma_set, instead of forcing drivers to declare the default atomic version. - Allow using degamma for legacy gamma if gamma is not available. - Clarify that primary/cursor planes are not tied to 1 crtc (depending on possible_crtcs). - ttm: Cleanup the lru handler. Driver Changes: - Add pm support to ingenic. - Assorted small fixes in radeon, via, rockchip, omap2fb, kmb, gma500, nouveau, virtio, hisilicon, ingenic, s6e63m0 panel, ast, udlfb. - Add BOE NV110WTM-N61, ys57pss36bh5gq, Khadas TS050 panels. - Stop using pages with drm_prime_sg_to_page_addr_arrays, and switch all callers to use ttm_sg_tt_init. - Cleanup compiler and docbook warnings in a lot of fbdev devices. - Use the drmm_vram_helper in hisilicon. - Add support for BCM2711 DSI1 in vc4. - Add support for 8-bit delta RGB panels to ingenic. - Add documentation on how to test vkms. - Convert vc4 to atomic helpers. - Use degamma instead of gamma table in omap, to add support for CTM and color encoding/range properties. - Rework omap DSI code, and merge all omapdrm modules now that the last omap panel is now a drm panel. - More refactoring of omap dsi code. - Enable 10/12 bpc outputs in vc4. Signed-off-by: Daniel Vetter <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-15drm/amdgpu: remove h from printk format specifierTom Rix1-2/+2
See Documentation/core-api/printk-formats.rst. h should no longer be used in the format specifier for printk. Reviewed-by: Christian König <[email protected]> Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-15Merge drm/drm-next into drm-misc-nextMaarten Lankhorst1-11/+140
Required backmerge since we will be based on top of v5.11, and there has been a request to backmerge already to upstream some features. Signed-off-by: Maarten Lankhorst <[email protected]>
2020-12-10drm/amdgpu: clean up bo in vce and vcn testNirmoy Das1-3/+6
BO created with amdgpu_bo_create_reserved() wasn't clean properly before, which causes: [ 21.056218] WARNING: CPU: 0 PID: 7 at drivers/gpu/drm/ttm/ttm_bo.c:518 ttm_bo_release+0x2bf/0x310 [ttm] <snip> [ 21.056430] Call Trace: [ 21.056525] amdgpu_bo_unref+0x1a/0x30 [amdgpu] [ 21.056635] amdgpu_vcn_dec_send_msg+0x1b2/0x270 [amdgpu] [ 21.056740] amdgpu_vcn_dec_get_create_msg.constprop.0+0xd8/0x100 [amdgpu] [ 21.056843] amdgpu_vcn_dec_ring_test_ib+0x27/0x180 [amdgpu] [ 21.056936] amdgpu_ib_ring_tests+0xf1/0x150 [amdgpu] [ 21.057024] amdgpu_device_delayed_init_work_handler+0x11/0x30 [amdgpu] [ 21.057030] process_one_work+0x1df/0x370 [ 21.057033] worker_thread+0x46/0x340 [ 21.057034] ? process_one_work+0x370/0x370 [ 21.057037] kthread+0x11b/0x140 [ 21.057039] ? __kthread_bind_mask+0x60/0x60 [ 21.057043] ret_from_fork+0x22/0x30 Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/406382/ Signed-off-by: Christian König <[email protected]>
2020-11-24drm/amdgpu/vcn: add test for dec software ringJames Zhu1-0/+121
Add vcn software ring decode ring test and decode ib test. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-24drm/amdgpu/vcn: refactor dec message functionsJames Zhu1-11/+19
refactor dec message functions to add dec software ring support. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-04drm/amd/amdgpu: switch on/off vcn power profile modeKenneth Feng1-1/+12
switch to vcn power profile mode when a video is playing. this can optimize the power/performance when the workload is on the vcn. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-02drm/amdgpu/amdgpu: improve code indentation and alignmentDeepak R Varma1-9/+9
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch corrects issues for various amdgpu_*.c files for this driver. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-02drm/amdgpu: disable gfxoff if VCN is busyJiansong Chen1-1/+4
Toggle on/off gfxoff during video playback to fix gpu hang. v2: change sequence to be more compatible with original code. Signed-off-by: Jiansong Chen <[email protected]> Reviewed-by: James Zhu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-14drm/amdgpu: vcn and jpeg ring synchronizationVeerabadhran G1-0/+2
Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug. Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/vcn: add firmware support for dimgrey_cavefishJames Zhu1-0/+5
Add firmware support for dimgrey_cavefish. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-07drm/amdgpu: enable vcn support for green_sardine (v2)Thong Thai1-1/+7
Enable Green_Sardine VCN support and VCN firmware loading v2: use apu flags Signed-off-by: Thong Thai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-05drm/amdgpu: enable vcn3.0 for van goghThong Thai1-0/+8
Same as other VCN 3.0 asics. Signed-off-by: Thong Thai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-21drm/amdgpu/vcn: merge shared memory into vcpuJames Zhu1-12/+6
Merge vcn firmware shared memory bo into vcn vcpu bo. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-21Revert "drm/amdgpu/vcn: add shared memory restore after wake up from sleep."James Zhu1-27/+1
This reverts commit 21b704d78352c289d31697824ceea7ad0ff4ce59. To merge vcn firmware shared memory bo into vcn vcpu bo. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-15drm/amdgpu: add navy_flounder vcn firmware supportBoyuan Zhang1-0/+8
Add navy_flounder to vcn family Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-15drm/amd/sriov skip vcn powergating and dec_ring_testJack Zhang1-0/+4
1.Skip decode_ring test in VF, because VCN in SRIOV does not support direct register read/write. 2.Skip powergating configuration in hw fini because VCN3.0 SRIOV doesn't support powergating. V2: delete unneccessary white lines and refine implementation. Signed-off-by: Jack Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-01drm/amdgpu: set indirect sram mode for VCN3.0Boyuan Zhang1-0/+3
Use indirect sram for secure DPG mode V2: update description. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-01drm/amdgpu: add Sienna_Cichlid VCN to the VCN familyLeo Liu1-0/+5
By adding Sienna_Cichlid VCN firmware Signed-off-by: Leo Liu <[email protected]> Reviewed-by: James Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-22drm/amdgpu: add apu flags (v2)Alex Deucher1-2/+2
Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22Revert "drm/amdgpu: Disable gfx off if VCN is busy"James Zhu1-2/+0
This reverts commit 3fded222f4bf7f4c56ef4854872a39a4de08f7a8 This is work around for vcn1 only. Currently vcn1 has separate begin_use and idle work handle. Signed-off-by: James Zhu <[email protected]> Tested-by: changzhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-09drm/amdgpu/vcn: add shared memory restore after wake up from sleep.James Zhu1-1/+27
VCN shared memory needs restore after wake up during S3 test. v2: Allocate shared memory saved_bo at sw_init and free it in sw_fini. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu/vcn: fix spelling mistake "fimware" -> "firmware"Colin Ian King1-1/+1
There is a spelling mistake in a dev_err error message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu/vcn: Add firmware share memory supportJames Zhu1-0/+13
Added firmware share memory support for VCN. Current multiple queue mode is enabled only. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu/vcn: fix race condition issue for dpg unpause mode switchJames Zhu1-11/+21
Couldn't only rely on enc fence to decide switching to dpg unpaude mode. Since a enc thread may not schedule a fence in time during multiple threads running situation. v3: 1. Rename enc_submission_cnt to dpg_enc_submission_cnt 2. Add dpg_enc_submission_cnt check in idle_work_handler v4: Remove extra counter check, and reduce counter before idle work schedule Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu/vcn: fix race condition issue for vcn startJames Zhu1-7/+14
Fix race condition issue when multiple vcn starts are called. v2: Removed checking the return value of cancel_delayed_work_sync() to prevent possible races here. v3: Add total_submission_cnt to avoid gate power unexpectedly. v4: Remove extra counter check, and reduce counter before idle work schedule Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu: implement more ib pools (v2)xinhui pan1-3/+6
We have three ib pools, they are normal, VM, direct pools. Any jobs which schedule IBs without dependence on gpu scheduler should use DIRECT pool. Any jobs schedule direct VM update IBs should use VM pool. Any other jobs use NORMAL pool. v2: squash in coding style fix Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-06drm/amdgpu: cleanup ring/ib test for SRIOV vcn2.0 (v2)Monk Liu1-10/+3
support IB test on dec/enc ring disable ring test on dec/enc ring (MMSCH limitation) v2: squash in unused variable warning fix Singed-off-by: darlington Opara <[email protected]> Signed-off-by: Jinage Zhao <[email protected]> Signed-off-by: Monk Liu <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-16drm/amdgpu/vcn2.5: implement indirect DPG SRAM modeJames Zhu1-0/+3
Implement indirect DPG SRAM mode for vcn2.5 Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-16drm/amdgpu/vcn: support multiple instance direct SRAM read and write (v2)James Zhu1-14/+13
Add multiple instance direct SRAM read and write support for vcn2.5 v2: squash in indexing fix Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-16drm/amdgpu/vcn: support multiple-instance dpg pause modeJames Zhu1-2/+2
Add multiple-instance dpg pause mode support for VCN2.5 Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-12-23drm/amdgpu: disable VCN2.5 ib test for Arcturus sriovJane Jian1-0/+10
currently using TMR loading VCN fw MMSCH would fail to init after FLR, just disable ib test for temporarily daily testing, continuing debug with mm team. Signed-off-by: Jane Jian <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-12-18drm/amdgpu/vcn: remove unnecessary included headersLeo Liu1-6/+0
Esp. VCN1.0 headers should not be here v2: add back the <linux/module.h> to keep consistent. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.