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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
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2022-05-04drm/amdgpu: support imu for gfx11Likun Gao1-0/+13
Add support to initialize imu for gfx v11. IMU is a new power management block for gfx which manages gfx power. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support RS64 CP fw front door loadLikun Gao1-0/+57
Support to load RS64 CP firmware front door load. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: renovate sdma fw structLikun Gao1-0/+11
Add sdma firmware struct version 2 to support new SDMA v6 and forward firmware version. v2: squash in fix Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: fix the fw size for sdmaLikun Gao1-2/+2
For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO may result to the ucode data overflow when copy ucode to BO as the PAGE alignment. IMU have the same issue. Fix the above issue by alignment the fw size per fw ID. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu/gfx: refine fw hdr check fuctionLikun Gao1-2/+2
The return value of function amdgpu_ucode_hdr_version doesn't make sense, so change it to return true when fw header version is match with passed in parameters. Signed-off-by: Wenhui Sheng <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: extend the show ucode name functionLikun Gao1-0/+16
Extend amdgpu_ucode_name function to show SDMA TH0, TH1, IMU, RLCP, RLCV and MES related ucode name via ucode id. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support IMU front door loadLikun Gao1-0/+13
Support for front door to load IMU firmware. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support for new SDMA front door loadLikun Gao1-0/+12
Support for SDMA v6_0 ucode front door load. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support RLCV firmware front door loadLikun Gao1-0/+4
Support RLCV firmware front door load. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support RLCP firmware front door loadLikun Gao1-0/+4
Support RLCP firmware front door load. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: add mes kiq frontdoor loading supportJack Xiao1-0/+10
Add mes kiq frontdoor loading support. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: add gfx firmware header v2_0Likun Gao1-0/+6
We need define new firmware header to support CP RS64 fw. Signed-off-by: Wenhui Sheng <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu/ucode: Remove firmware load type check in amdgpu_ucode_free_boAlice Wong1-2/+1
When psp_hw_init failed, it will set the load_type to AMDGPU_FW_LOAD_DIRECT. During amdgpu_device_ip_fini, amdgpu_ucode_free_bo checks that load_type is AMDGPU_FW_LOAD_DIRECT and skips deallocating fw_buf causing memory leak. Remove load_type check in amdgpu_ucode_free_bo. Signed-off-by: Alice Wong <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: enable pptable ucode loadingEvan Quan1-0/+6
With SCPM enabled, pptable cannot be uploaded to SMU directly. The transferring has to be via PSP. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04drm/amdgpu: support print psp v2_0 hdr debug informationHawking Zhang1-0/+67
print out psp firmware v2_0 hdr information for debugging purpose Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-28drm/amdgpu: add function to decode ip versionLikun Gao1-0/+33
Add function to decode IP version. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amdgpu: Update TA version output in driverCandice Li1-2/+2
TA version should only be displayed in firmware version column. Signed-off-by: Candice Li <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-20drm/amdgpu: replace snprintf in show functions with sysfs_emitQing Wang1-1/+1
show() must not use snprintf() when formatting the value to be returned to user space. Fix the following coccicheck warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:427: WARNING: use scnprintf or sprintf. Signed-off-by: Qing Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/ucode: add default behaviorAlex Deucher1-3/+4
Default to PSP ucode loading unless the user specifies direct. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amdgpu: Unify PSP TA contextCandice Li1-3/+3
Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: Candice Li <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amdgpu: refactor function to init no-psp fwLikun Gao1-85/+75
Refactor the code of amdgpu_ucode_init_single_fw to make it more readable as too many ucode need to handle on this function currently. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-16drm/amd/amdgpu: consolidate PSP TA contextCandice Li1-3/+3
Signed-off-by: Candice Li <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-28drm/amdgpu: enable psp front door loading by default for cyan_skillfish2Huang Rui1-3/+4
The function is ready on psp firmware, and enable it by default. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: use direct loading by default for cyan_skillfish2Lang Yu1-0/+3
Will switch to front door loading by default after this function is stable. v2: use APU flags (Alex) Signed-off-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amdgpu: load fw direclty for cyan_skillfishTao Zhou1-0/+2
Use backdoor loading. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-23drm/amd/amdgpu: add consistent PSP FW loading size checkingCandice Li1-1/+1
Signed-off-by: Candice Li <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-01drm/amdgpu: add function to show ucode name via idLang Yu1-0/+78
Implement function amdgpu_ucode_name to show ucode name via ucode id. v2: rename it to amdgpu_ucode_name Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-10drm/amdgpu: Updated fw header structure sourceJohn Clements1-21/+21
synchronized fw header with latest source Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04drm/amdgpu: support fw load type for yellow carpAaron Liu1-0/+1
This patch sets fw load type as direct with fw_load_type=0 for yellow carp. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/amdgpu: add psp support for beige_gobyChengming Gui1-2/+1
add general PSP support for beige_goby Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19drm/amd/amdgpu: set fw load type for beige_gobyChengming Gui1-0/+2
Use direct load for beige_goby Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: allow use psp to load firmware (v2)Hawking Zhang1-2/+1
Match existing asics. v2: rebase (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-10drm/amdgpu: set fw load type for aldebaranLe Ma1-0/+2
Set backdoor loading way in current phase v2: change case location to not break other asics Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-08drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr()Kevin Wang1-10/+19
the smc v2_0 printer is not compatible with the smc v2_1 . 1. add smc v2_1 printer. 2. cleanup code Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-02drm/amdgpu/amdgpu: use "*" adjacent to data nameDeepak R Varma1-2/+2
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-15drm/amdgpu: add rlc iram and dram firmware supportLikun Gao1-0/+10
Support to load RLC iram and dram ucode when RLC firmware struct use v2.2 Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable front door loading for dimgrey_cavefishTao Zhou1-2/+1
Support both back and front door loading for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: set fw load type for dimgrey_cavefishTao Zhou1-0/+2
Use direct load for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-05drm/amdgpu: enable psp support for vangoghHuang Rui1-2/+1
This patch is to enable psp support for vangogh Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-05drm/amdgpu: set fw load type for van goghHuang Rui1-0/+2
This patch sets fw load type as direct for van gogh for the moment. Will switch to psp when psp is ready. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-08-24drm/amdgpu: drm_device to amdgpu_device by inline-f (v2)Luben Tuikov1-1/+1
Get the amdgpu_device from the DRM device by use of an inline function, drm_to_adev(). The inline function resolves a pointer to struct drm_device to a pointer to struct amdgpu_device. v2: Use a typed visible static inline function instead of an invisible macro. Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-08-24drm/amdgpu: refine codes to avoid reentering GPU recoveryDennis Li1-1/+1
if other threads have holden the reset lock, recovery will fail to try_lock. Therefore we introduce atomic hive->in_reset and adev->in_gpu_reset, to avoid reentering GPU recovery. v2: drop "? true : false" in the definition of amdgpu_in_reset Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Dennis Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-08-14drm/amdgpu: revert "fix system hang issue during GPU reset"Christian König1-2/+1
The whole approach wasn't thought through till the end. We already had a reset lock like this in the past and it caused the same problems like this one. Completely revert the patch for now and add individual trylock protection to the hardware access functions as necessary. This reverts commit df9c8d1aa278c435c30a69b8f2418b4a52fcb929. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-27drm/amdgpu: fix system hang issue during GPU resetDennis Li1-1/+2
when GPU hang, driver has multi-paths to enter amdgpu_device_gpu_recover, the atomic adev->in_gpu_reset and hive->in_reset are used to avoid re-entering GPU recovery. During GPU reset and resume, it is unsafe that other threads access GPU, which maybe cause GPU reset failed. Therefore the new rw_semaphore adev->reset_sem is introduced, which protect GPU from being accessed by external threads during recovery. v2: 1. add rwlock for some ioctls, debugfs and file-close function. 2. change to use dqm->is_resetting and dqm_lock for protection in kfd driver. 3. remove try_lock and change adev->in_gpu_reset as atomic, to avoid re-enter GPU recovery for the same GPU hang. v3: 1. change back to use adev->reset_sem to protect kfd callback functions, because dqm_lock couldn't protect all codes, for example: free_mqd must be called outside of dqm_lock; [ 1230.176199] Hardware name: Supermicro SYS-7049GP-TRT/X11DPG-QT, BIOS 3.1 05/23/2019 [ 1230.177221] Call Trace: [ 1230.178249] dump_stack+0x98/0xd5 [ 1230.179443] amdgpu_virt_kiq_reg_write_reg_wait+0x181/0x190 [amdgpu] [ 1230.180673] gmc_v9_0_flush_gpu_tlb+0xcc/0x310 [amdgpu] [ 1230.181882] amdgpu_gart_unbind+0xa9/0xe0 [amdgpu] [ 1230.183098] amdgpu_ttm_backend_unbind+0x46/0x180 [amdgpu] [ 1230.184239] ? ttm_bo_put+0x171/0x5f0 [ttm] [ 1230.185394] ttm_tt_unbind+0x21/0x40 [ttm] [ 1230.186558] ttm_tt_destroy.part.12+0x12/0x60 [ttm] [ 1230.187707] ttm_tt_destroy+0x13/0x20 [ttm] [ 1230.188832] ttm_bo_cleanup_memtype_use+0x36/0x80 [ttm] [ 1230.189979] ttm_bo_put+0x1be/0x5f0 [ttm] [ 1230.191230] amdgpu_bo_unref+0x1e/0x30 [amdgpu] [ 1230.192522] amdgpu_amdkfd_free_gtt_mem+0xaf/0x140 [amdgpu] [ 1230.193833] free_mqd+0x25/0x40 [amdgpu] [ 1230.195143] destroy_queue_cpsch+0x1a7/0x270 [amdgpu] [ 1230.196475] pqm_destroy_queue+0x105/0x260 [amdgpu] [ 1230.197819] kfd_ioctl_destroy_queue+0x37/0x70 [amdgpu] [ 1230.199154] kfd_ioctl+0x277/0x500 [amdgpu] [ 1230.200458] ? kfd_ioctl_get_clock_counters+0x60/0x60 [amdgpu] [ 1230.201656] ? tomoyo_file_ioctl+0x19/0x20 [ 1230.202831] ksys_ioctl+0x98/0xb0 [ 1230.204004] __x64_sys_ioctl+0x1a/0x20 [ 1230.205174] do_syscall_64+0x5f/0x250 [ 1230.206339] entry_SYSCALL_64_after_hwframe+0x49/0xbe 2. remove try_lock and introduce atomic hive->in_reset, to avoid re-enter GPU recovery. v4: 1. remove an unnecessary whitespace change in kfd_chardev.c 2. remove comment codes in amdgpu_device.c 3. add more detailed comment in commit message 4. define a wrap function amdgpu_in_reset v5: 1. Fix some style issues. Reviewed-by: Hawking Zhang <[email protected]> Suggested-by: Andrey Grodzovsky <[email protected]> Suggested-by: Christian König <[email protected]> Suggested-by: Felix Kuehling <[email protected]> Suggested-by: Lijo Lazar <[email protected]> Suggested-by: Luben Tukov <[email protected]> Signed-off-by: Dennis Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-15drm/amdgpu: use front door firmware loading for navy_flounderJiansong Chen1-2/+1
Same as other navi asics. Signed-off-by: Jiansong Chen <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-15drm/amdgpu: set fw load type for navy_flounderJiansong Chen1-1/+2
Currently navy_flounder only supports backdoor loading type. Will switch to psp load type when psp is ready. Signed-off-by: Jiansong Chen <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-01drm/amdgpu/psp: initialization PSP SPL fwLikun Gao1-0/+24
Support for psp firmware header version v1_3 initialization and information print. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-07-01drm/amdgpu: upload mes firmware to gpu bufferJack Xiao1-0/+14
Copy mes firmware to gpu buffer. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-06-03drm/amdgpu: set fw load type for sienna_cichlidLikun Gao1-0/+1
Same as Navi1x. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-01drm/amdgpu: Expose TA FW version in fw_version fileKent Russell1-2/+2
Reporting the fw_version just returns 0, the actual version is kept as ta_*_ucode_version. This is the same as the feature reported in the amdgpu_firmware_info debugfs file. Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>