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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
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2019-06-21drm/amdgpu: bump smc firmware header version to v2 (v2)Huang Rui1-0/+8
This patch bumps smc firmware header version to v2 for storing soft pptable. v2: fix the typo, and add prints for v2 header Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu: enable psp front door loading by default on navi10Hawking Zhang1-2/+1
Required for production hw and vddgfx. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu/psp: support print out psp firmware header v1_1 infoHawking Zhang1-0/+10
Support version 1.1. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu: add helper function to print psp hdrHawking Zhang1-0/+24
print the psp header data like we do for other firmwares. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-06-20drm/amdgpu: set navi10's fw loading type as directHuang Rui1-0/+2
For bring up. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-24drm/amdgpu: Report firmware versions with sysfs v2Ori Messinger1-0/+63
Firmware versions can be found as separate sysfs files at: /sys/class/drm/cardX/device/fw_version (where X is the card number) The firmware versions are displayed in hexadecimal. v2: Moved sysfs files to subfolder Signed-off-by: Ori Messinger <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: remove set but not used variable 'header'YueHaibing1-2/+0
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c: In function 'amdgpu_ucode_init_bo': drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:431:39: warning: variable 'header' set but not used [-Wunused-but-set-variable] Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: Remove wrong fw loading type warningRex Zhu1-2/+0
Remove the warning message: "-1 is not supported on VI" the -1 is the default fw load type, mean auto. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: Remove amdgpu_ucode_fini_boRex Zhu1-19/+0
The variable clean is unnecessary. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-10drm/amdgpu: Split amdgpu_ucode_init/fini_bo into two functionsRex Zhu1-29/+29
1. one is for create/free bo when init/fini 2. one is for fill the bo before fw loading the ucode bo only need to be created when load driver and free when driver unload. when resume/reset, driver only need to re-fill the bo if the bo is allocated in vram. Suggested by Christian. v2: Return error when bo create failed. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: Don't reallocate ucode bo when suspendRex Zhu1-1/+1
driver don't release the ucode memory when suspend. so don't need to allocate bo when resume back. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: Remove FW_LOAD_DIRECT type support on VIRex Zhu1-4/+3
AMDGPU_FW_LOAD_DIRECT is used for bring up. Now it don't work any more. so remove the support. v2: Add warning message if user select AMDGPU_FW_LOAD_DIRECT/AMDGPU_FW_LOAD_PSP on VI. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: simplify Raven, Raven2, and Picasso handlingAlex Deucher1-1/+0
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: add picasso ucode loading methodLikun Gao1-0/+1
Same as raven. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-12drm/amd: Add ucode DMCU supportDavid Francis1-2/+19
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DMCU has two pieces of firmware: the ERAM and the interrupt vectors, which must be loaded seperately. To this end, the DMCU firmware has a custom header and parsing logic similar to MEC, to extract the two ucodes from a single struct firmware. Signed-off-by: David Francis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-29drm/amdgpu: add missing CHIP_HAINAN in amdgpu_ucode_get_load_typeAlex Deucher1-0/+1
This caused a confusing error message, but there is functionally no problem since the default method is DIRECT. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-08-27drm/amdgpu/vg20: Change the load type of vega20 to psp (v2)Likun Gao1-2/+1
Modified the vega20 load type to psp now that psp support is implemented. v2: squash in fixes history (Alex) Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-17drm/amdgpu: Set vega20 load_type to AMDGPU_FW_LOAD_DIRECT.Feifei Xu1-1/+2
Please revert this patch when psp load fw is enabled. Acked-by: Christian König <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-17drm/amdgpu: Add vega20 ucode loading methodFeifei Xu1-0/+1
The same as vega10. Reviewed-by: Christian König <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-16Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-3/+49
into drm-next Main changes for 4.18. I'd like to do a separate pull for vega20 later this week or next. Highlights: - Reserve pre-OS scanout buffer during init for seemless transition from console to driver - VEGAM support - Improved GPU scheduler documentation - Initial gfxoff support for raven - SR-IOV fixes - Default to non-AGP on PowerPC for radeon - Fine grained clock voltage control for vega10 - Power profiles for vega10 - Further clean up of powerplay/driver interface - Underlay fixes - Display link bw updates - Gamma fixes - Scatter/Gather display support on CZ/ST - Misc bug fixes and clean ups [airlied: fixup v3d vs scheduler API change] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Dave Airlie <[email protected]>
2018-05-15drm/amdgpu: specify VEGAM ucode SMU load methodLeo Liu1-0/+1
Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: add save restore list cntl gpm and srm firmware supportHuang Rui1-1/+16
RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: add new rlc firmware header format v2.1Huang Rui1-2/+32
Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-04-05Merge branch 'for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: kfifo: fix inaccurate comment tools/thermal: tmon: fix for segfault net: Spelling s/stucture/structure/ edd: don't spam log if no EDD information is present Documentation: Fix early-microcode.txt references after file rename tracing: Block comments should align the * on each line treewide: Fix typos in printk GenWQE: Fix a typo in two comments treewide: Align function definition open/close braces
2018-03-27treewide: Fix typos in printkMasanari Iida1-1/+1
This patch fixes spelling typos found in printk. Signed-off-by: Masanari Iida <[email protected]> Acked-by: Randy Dunlap <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2018-03-21drm/amdgpu: add vega12 ucode loading methodFeifei Xu1-0/+1
Same as vega10. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Hawking Zhang <[email protected]>
2017-12-06drm/amdgpu:cleanup firmware.fw_buf alloc/freeMonk Liu1-34/+9
use bo_create/free_kernel instead of manually doing it Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:cleanup ucode_init_boMonk Liu1-2/+2
1,no sriov check since gpu recover is unified 2,need CPU_ACCESS_REQUIRED flag for VRAM if SRIOV because otherwise after following PIN the first allocated VRAM bo is wasted due to some TTM mgr reason. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu:cleanup in_sriov_reset and lock_resetMonk Liu1-1/+1
since now gpu reset is unified with gpu_recover for both bare-metal and SR-IOV: 1)rename in_sriov_reset to in_gpu_reset 2)move lock_reset from adev->virt to adev Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu/sriov:fix memory leak after gpu resetMonk Liu1-32/+32
GPU reset will require all hw doing hw_init thus ucode_init_bo will be invoked again, which lead to memory leak skip the fw_buf allocation during sriov gpu reset to avoid memory leak. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-12drm/amdgpu: enable raven to load firmwares by psp at default (v2)Evan Quan1-5/+1
- v2: share code with CHIP_VEGA10 case Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-08-15drm/amdgpu: jt_size was wrongly counted twiceEvan Quan1-2/+0
Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-08-15drm/amdgpu: Add a parameter to amdgpu_bo_create()Yong Zhao1-1/+1
The parameter init_value contains the value to which we initialized VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-07-14drm/amdgpu: set firmware loading type as direct by default for ravenHuang Rui1-5/+1
In previous case, driver can't enable psp via the kernel parameter for raven. We should open this path and set it as direct by default till psp firmware loading is workable. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-07-14drm/amdgpu: add check when no firmware need to loadHuang Rui1-0/+8
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2017-06-15drm/amdgpu: add contiguous flag in ucode bo createhorchen1-1/+2
Under VF environment, the ucode would be settled to the visible VRAM, As it would be pinned to the visible VRAM, it's better to add contiguous flag,otherwise it need to move gpu address during the pin process. This movement is not necessary. Signed-off-by: horchen <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-05-24drm/amdgpu: add Raven chip id case for ucodeChunming Zhou1-0/+9
Set the appropriate ucode loading mechanism. Set to direct for now. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-05-24drm/amdgpu: add gpu_info firmware (v3)Alex Deucher1-0/+21
Add a new gpu info firmware to store gpu specific configuration data. This allows us to store hw constants in a unified place. v2: adjust structure and elements v3: further restructure Reviewed-by: Junwei Zhang <[email protected]> Tested-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-04-28drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2)Trigger Huang1-3/+7
In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE, there is no actual firmware data, but we still need alloc a BO and tell the BO's mc address to HW, or world switch will hang on VFs. v2: fix coding style (Alex) Signed-off-by: Trigger Huang <[email protected]> Reviewed-by: Xiangliang Yu <[email protected]> Reviewed-by: Monk Liu <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: rework common ucode handling for vega10Huang Rui1-23/+47
Handle ucode differences in vega10. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: use new flag to handle different firmware loading methodHuang Rui1-4/+63
This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add a ucode size member into firmware infoHuang Rui1-2/+5
This will be used for newer asics. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-10-25drm/amdgpu:properly fix some JumpTable issuesMonk Liu1-0/+32
we found some MEC ucode leads to IB test fail or even ring test fail if Jump Table of it is not start in FW bo with page aligned address, fixed by always make JT address page aligned. we don't need to patch JT2 for MEC2, because for VI, MEC2 is a copy of MEC1, thus when converting fw_type for MEC_JT2 we just return MEC1,hw can use the same JT for both MEC1 & MEC2. above two change fixed some ring/ib test failure issue for some version of MEC ucode. Signed-off-by: Frank Min <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-10-25drm/amdgpu:add MEC_STORAGE ucode id for sriovMonk Liu1-0/+3
for sriov, SMC need MEC_STORAGE reserved in fw bo. Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Frank Min <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-10-25drm/amdgpu:fw bo should be in VRAM for SRIOVFrank Min1-2/+4
for GTT memory SMC can only access it within PF space, which is not used for SRIOV case, thus for SRIOV case, we let SMC use FB space for ucode bo. Signed-off-by: Frank Min <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-10-04drm/amdgpu: clean up to set fw_offset as 0 twiceHuang Rui1-1/+0
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-09-14drm/amdgpu: move some release handles into fail labels (v2)Huang Rui1-13/+12
Clean up the codes to move the release handles into fail labels. v2: squash in Christian's regression fix Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-09-23drm/amdgpu: export reservation_object from dmabuf to ttm (v2)Christian König1-1/+1
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c. Port of radeon commit 831b6966a60fe72d85ae3576056b4e4e0775b112. v2: fix up kfd. Signed-off-by: Christian König <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add core driver (v4)Alex Deucher1-0/+317
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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