| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2021-03-05 | drm/amdgpu: add sdma 4_x interrupts printing | Feifei Xu | 1 | -0/+5 | |
| Add VM_HOLE/DOORBELL_INVALID_BE/POLL_TIMEOUT/SRBMWRITE interrupt info printing. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-04-28 | drm/amdgpu: expand sdma copy_buffer interface with tmz parameter | Aaron Liu | 1 | -2/+3 | |
| This patch expands sdma copy_buffer interface with tmz parameter. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-04-09 | drm/amdgpu: rework sched_list generation | Nirmoy Das | 1 | -2/+0 | |
| Generate HW IP's sched_list in amdgpu_ring_init() instead of amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(), ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary. This patch also stores sched_list for all HW IPs in one big array in struct amdgpu_device which makes amdgpu_ctx_init_entity() much more leaner. v2: fix a coding style issue do not use drm hw_ip const to populate amdgpu_ring_type enum v3: remove ctx reference and move sched array and num_sched to a struct use num_scheds to detect uninitialized scheduler list v4: use array_index_nospec for user space controlled variables fix possible checkpatch.pl warnings Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-03-05 | drm/amdgpu: add reset_ras_error_count function for SDMA | Hawking Zhang | 1 | -0/+1 | |
| SDMA ras error counters are dirty ones after cold reboot Read operation is needed to reset them to 0 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-01-14 | drm/amdgpu: add ras_late_init and ras_fini for sdma v4 | Hawking Zhang | 1 | -0/+3 | |
| move ras_late_init and ras_fini to sdma_ras_funcs table Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2020-01-14 | drm/amdgpu: add query_ras_error_count function for sdma v4 | Hawking Zhang | 1 | -0/+6 | |
| query_ras_error_count function will be invoked to query single bit error count detected in sdma ip block Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-12-18 | amd/amdgpu: add sched array to IPs with multiple run-queues | Nirmoy Das | 1 | -0/+2 | |
| This sched array can be passed on to entity creation routine instead of manually creating such sched array on every context creation. v2: squash in missing break fix Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-10-03 | drm/amdgpu: add common sdma_ras_fini function | Tao Zhou | 1 | -0/+1 | |
| sdma_ras_fini can be shared among all generations of sdma Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-10-03 | drm/amdgpu: move sdma ecc functions to generic sdma file | Tao Zhou | 1 | -0/+6 | |
| sdma ras ecc functions can be reused among all sdma generations Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-09-13 | drm/amdgpu/sdma: switch to amdgpu_sdma_ras_late_init helper function | Hawking Zhang | 1 | -0/+2 | |
| amdgpu_sdma_ras_late_init is used to init sdma specfic ras debugfs/sysfs node and sdma specific interrupt handler. It can be shared among sdma generations Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-07-18 | drm/amdgpu: reorganize sdma v4 code to support more instances | Le Ma | 1 | -1/+7 | |
| This change is needed for Arcturus which has 8 sdma instances. The CG/PG part is not covered for now. Signed-off-by: Le Ma <[email protected]> Acked-by: Snow Zhang < [email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-06-21 | drm/amdgpu/sdma: allocate CSA per sdma ring | Jack Xiao | 1 | -1/+1 | |
| Allocate CSA for the given sdma ring. Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Jack Xiao <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-04-03 | drm/amdgpu: Correct the irq types' num of sdma | Emily Deng | 1 | -5/+2 | |
| Fix the issue about TDR-2 will have "fallback timer expired on ring sdma1". It is because the wrong number of irq types setting. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2019-03-19 | drm/amdgpu: enable ras on sdma4 | xinhui pan | 1 | -0/+4 | |
| register IH, enable ras features on sdma. create sysfs debugfs file for sdma. Signed-off-by: xinhui pan <[email protected]> Signed-off-by: Feifei Xu <[email protected]> Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-11-05 | drm/amdgpu: Add helper function to get sdma index | Rex Zhu | 1 | -0/+1 | |
| Get the sdma index from ring v2: refine function name Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Flora Cui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-11-05 | drm/amdgpu: Refine function name | Rex Zhu | 1 | -1/+1 | |
| there is no functional changes.just refine function name to keep consistence with other files. change amdgpu_get_sdma_instance to amdgpu_sdma_get_instance_from_ring. suggested by alex. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Flora Cui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-11-05 | drm/amdgpu/sdma4: APUs do not have a page queue | Alex Deucher | 1 | -0/+1 | |
| Don't use the paging queue on APUs. Tested-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-11-05 | drm/amdgpu: add basics for SDMA page queue support | Christian König | 1 | -0/+1 | |
| Just the common helper and a new ring in the SDMA instance. Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-10-09 | drm/amdgpu: fix incorrect use of amdgpu_irq_add_id in si_dma.c | Christian König | 1 | -4/+0 | |
| Adding a second irq source because of a different src_id is actually a bug. Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2018-08-27 | drm/amdgpu: move sdma definitions into amdgpu_sdma header | Huang Rui | 1 | -0/+101 | |
| Demangle amdgpu.h. Furthermore, SDMA is used for moving and clearing the data buffer, so the header also need be included in ttm. Signed-off-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||