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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
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2019-03-04Merge v5.0 into drm-nextDave Airlie1-0/+1
There is a really hairy resolution involving amdgpu fixes, that I'd rather confirm here. Also some misc fixes are landed by me, but the pr has them as well. Signed-off-by: Dave Airlie <[email protected]>
2019-02-19drm/amdgpu: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtimeAlex Deucher1-0/+1
Based on a similar patch from Rafael for radeon. When using ATPX to control dGPU power, the state is not retained across suspend and resume cycles by default. This can probably be loosened for Hybrid Graphics (_PR3) laptops where I think the state is properly retained. Fixes: c62ec4610c40 ("PM / core: Fix direct_complete handling for devices with no callbacks") Cc: Rafael J. Wysocki <[email protected]> Acked-by: Rafael J. Wysocki <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-02-13drm/amdgpu: fix several indentation issuesColin Ian King1-1/+1
There are several statements that are incorrectly indented. Fix these. Reviewed-by: Christian König <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-30drm/amdgpu: wait for IB test on first device openChristian König1-3/+3
Instead of delaying that to the first query. Otherwise we could try to use the SDMA for VM updates before the IB tests are done. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-05drm/amdgpu: Refine CSA related functionsRex Zhu1-1/+4
There is no functional changes, Use function arguments for SRIOV special variables which is hardcode in those functions. so we can share those functions in baremetal. Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-05drm/amdgpu: Retire amdgpu_ring.ready flag v4Andrey Grodzovsky1-9/+9
Start using drm_gpu_scheduler.ready isntead. v3: Add helper function to run ring test and set sched.ready flag status accordingly, clean explicit sched.ready sets from the IP specific files. v4: Add kerneldoc and rebase. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-11-05drm/amdgpu: Reverse the sequence of ctx_mgr_finiRex Zhu1-1/+1
and vm_fini in amdgpu_driver_postclose_kms csa buffer will be created per ctx, when ctx fini, the csa buffer and va will be released. so need to do ctx_mgr fin before vm fini. Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: added AMD GPU instance counting V2Evan Quan1-0/+52
Count all GPU instances from AMD(including iGPUs and dGPUs) in the system. V2: drop unnecessary initialization for other gpu_info members except mutex Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-19drm/amdgpu: fix up GDS/GWS/OA shiftingChristian König1-7/+7
That only worked by pure coincident. Completely remove the shifting and always apply correct PAGE_SHIFT. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: Add DMCU to firmware query interfaceDavid Francis1-0/+12
DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: use IP presence to free uvd and vce handlesAlex Deucher1-2/+2
Rather than checking the asic type, check whether the UVD or VCE IP blocks exist. This way we don't have to update the check with new asics that use VCN. Signed-off-by: Alex Deucher <[email protected]>
2018-09-14drm/amdgpu: add picasso for amdgpu kmsLikun Gao1-1/+1
Add picasso for amdgpu kms Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-10drm/amdgpu: correctly sign extend 48bit addresses v3Christian König1-4/+4
Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: rework ctx entity creationChristian König1-11/+25
Use a fixed number of entities for each hardware IP. The number of compute entities is reduced to four, SDMA keeps it two entities and all other engines just expose one entity. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: cleanup HW_IP queryChristian König1-94/+110
Move the code into a separate function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: fix VM size reporting on RavenChristian König1-1/+2
Raven doesn't have an VCE block and so also no buggy VCE firmware. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: move display definitions into amdgpu_display headerHuang Rui1-0/+1
Demangle amdgpu.h. Signed-off-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-08-27drm/amdgpu: move gem definitions into amdgpu_gem headerHuang Rui1-0/+1
Demangle amdgpu.h. Signed-off-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-31drm/amdgpu: nuke amdgpu_bo_list_freeChristian König1-1/+1
The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-27drm/amdgpu: implement harvesting support for UVD 7.2 (v3)Alex Deucher1-5/+12
Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: expose only the first UVD instance for nowChristian König1-8/+5
Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-25drm/amdgpu: clean up coding style a bitChristian König1-10/+10
No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: Make pin_size values atomicMichel Dänzer1-11/+11
Concurrent execution of the non-atomic arithmetic could result in completely bogus values. v2: * Rebased on v2 of the previous patch Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106872 Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: Keep track of amount of pinned CPU visible VRAMMichel Dänzer1-3/+2
Instead of CPU invisible VRAM. Preparation for the following, no functional change intended. v2: * Also change amdgpu_vram_mgr_bo_invisible_size to amdgpu_vram_mgr_bo_visible_size, allowing further simplification (Christian König) Cc: [email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: update ib_start/size_alignment same as windows usedChunming Zhou1-14/+14
PAGE_SIZE for start_alignment is far much than hw requirement, And now, update to expereince value from window side. Signed-off-by: Chunming Zhou <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info queryBoyuan Zhang1-0/+7
Add AMDGPU_HW_IP_VCN_JPEG to info query Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-15drm/amdgpu: move amdgpu_ctx_mgr_entity_fini to f_ops flush hook (V4)Andrey Grodzovsky1-1/+0
With this we can now terminate jobs enqueue into SW queue the moment the task is being killed instead of waiting for last user of drm file to release it. Also stop checking for kref_read(&ctx->refcount) == 1 when calling drm_sched_entity_do_release since other task might still hold a reference to this entity but we don't care since KILL means terminate job submission regardless of what other tasks are doing. v2: Use returned remaining timeout as parameter for the next call. Rebase. v3: Switch to working with jiffies. Streamline remainder TO usage. Rebase. v4: Rebase. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amdgpu/vg20:Restruct uvd.inst to support multiple instancesJames Zhu1-4/+8
Vega20 has dual-UVD. Need add multiple instances support for uvd. Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->. Repurpose amdgpu_ring::me for instance index, and initialize to 0. There are no any logical changes here. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-18drm/amdgpu/vg20:Restruct uvd to support multiple uvdsJames Zhu1-2/+2
Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: add save restore list cntl gpm and srm firmware supportHuang Rui1-0/+36
RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: print the vbios version in the debugfs firmware infoAlex Deucher1-0/+5
Useful for info gathering about what firmwares are in use in the driver. Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amdgpu: defer test IBs on the rings at boot (V3)Shirish S1-0/+3
amdgpu_ib_ring_tests() runs test IB's on rings at boot contributes to ~500 ms of amdgpu driver's boot time. This patch defers it and ensures that its executed in amdgpu_info_ioctl() if it wasn't scheduled. V2: Use queue_delayed_work() & flush_delayed_work(). V3: removed usage of separate wq, ensure ib tests is run before enabling clockgating. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/amd/pp: Remove struct pp_gpu_powerRex Zhu1-5/+2
Currently smu only calculate average gpu power in real time. for vddc/vddci/max power, User need to set start time and end time, firmware can calculate the average vddc/vddci/max power. but the type of return values is not unified. For Vi, return type is uint. For vega, return type is float. so this struct can't be suitable for all asics. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-05-15drm/gpu-sched: fix force APP kill hang(v4)Emily Deng1-2/+3
issue: there are VMC page fault occurred if force APP kill during 3dmark test, the cause is in entity_fini we manually signal all those jobs in entity's queue which confuse the sync/dep mechanism: 1)page fault occurred in sdma's clear job which operate on shadow buffer, and shadow buffer's Gart table is cleaned by ttm_bo_release since the fence in its reservation was fake signaled by entity_fini() under the case of SIGKILL received. 2)page fault occurred in gfx' job because during the lifetime of gfx job we manually fake signal all jobs from its entity in entity_fini(), thus the unmapping/clear PTE job depend on those result fence is satisfied and sdma start clearing the PTE and lead to GFX page fault. fix: 1)should at least wait all jobs already scheduled complete in entity_fini() if SIGKILL is the case. 2)if a fence signaled and try to clear some entity's dependency, should set this entity guilty to prevent its job really run since the dependency is fake signaled. v2: splitting drm_sched_entity_fini() into two functions: 1)The first one is does the waiting, removes the entity from the runqueue and returns an error when the process was killed. 2)The second one then goes over the entity, install it as completion signal for the remaining jobs and signals all jobs with an error code. v3: 1)Replace the fini1 and fini2 with better name 2)Call the first part before the VM teardown in amdgpu_driver_postclose_kms() and the second part after the VM teardown 3)Keep the original function drm_sched_entity_fini to refine the code. v4: 1)Rename entity->finished to entity->last_scheduled; 2)Rename drm_sched_entity_fini_job_cb() to drm_sched_entity_kill_jobs_cb(); 3)Pass NULL to drm_sched_entity_fini_job_cb() if -ENOENT; 4)Replace the type of entity->fini_status with "int"; 5)Remove the check about entity->finished. Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-04-11drm/amdgpu: Use dpm_enabled as dpm state flagRex Zhu1-1/+1
driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-20drm/amdgpu: add VCN to firmware query interfaceAlex Deucher1-0/+12
Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: limit the VM address space with older VCE FW versionsChristian König1-0/+5
Older VCE FW versions are buggy and can't work with 48bit address spaces. RFC: Should we limit the address space or just reject loading the older VCE firmware? Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: apply top reserved VA space to pre Vega10 as wellChristian König1-1/+1
Reserve VA space at the top for older generations as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: rename amdgpu_crtc_idx_to_irq_typeSamuel Li1-2/+2
Add display to the name for consistency. Signed-off-by: Samuel Li <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: rename amdgpu_get_crtc_scanoutposSamuel Li1-4/+4
Add display to the name for consistency. Signed-off-by: Samuel Li <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Expose more GPU sensor queriesRex Zhu1-0/+18
Add sub-queries for stable pstate shader/memory clock. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: always allocate a PASIDs for each VM v2Christian König1-14/+29
Start to always allocate a pasid for each VM. v2: use dev_warn when we run out of PASIDs Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.hChristian König1-9/+9
And rename it to amdgpu_gmc as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Samuel Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()Noralf Trønnes1-3/+1
This driver can use drm_fb_helper_lastclose() in its .lastclose function. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Remove the unused driver implementations. Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Signed-off-by: Noralf Trønnes <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: expose the VA above the hole to userspaceChristian König1-2/+10
Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: fix VA hole handling on Vega10 v3Christian König1-1/+3
Similar to the CPU address space the VA on Vega10 has a hole in it. v2: use dev_dbg instead of dev_err v3: add some more comments to explain how the hw works Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: revise retry init to fully cleanup driverPixel Ding1-13/+2
Retry at drm_dev_register instead of amdgpu_device_init. Reviewed-by: Christian König <[email protected]> Signed-off-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: release exclusive mode after hw_initpding1-3/+0
Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdkfd: initialise kfd inside amdgpu_device_initpding1-5/+0
Also finalize kfd inside amdgpu_device_fini. kfd device_init needs SRIOV exclusive accessing. Try to gather exclusive accessing to reduce time consuming. Signed-off-by: pding <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-04drm/amdgpu: retry init if it fails due to exclusive mode timeout (v3)pding1-2/+13
The exclusive mode has real-time limitation in reality, such like being done in 300ms. It's easy observed if running many VF/VMs in single host with heavy CPU workload. If we find the init fails due to exclusive mode timeout, try it again. v2: - rewrite the condition for readable value. v3: - fix typo, add comments for sleep Acked-by: Alex Deucher <[email protected]> Signed-off-by: pding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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