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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
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2023-06-09drm/amdgpu: complement the IH node_id table for multiple AIDsLe Ma1-1/+5
With different node_id, the SDMA interrupt from multiple AIDs can be distinguished by sw driver. Signed-off-by: Le Ma <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: add node_id to physical id conversion in EOP handlerLe Ma1-0/+14
A new field nodeid in interrupt cookie indicates the node ID. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Shiwu Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: remove pasid_src field from IV entryXiaomeng Hou1-1/+0
PASID_SRC is not actually present in the Interrupt Packet, the field is taken as reserved bits now. So remove it from IV entry to avoid misuse. Signed-off-by: Xiaomeng Hou <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-21drm/amdgpu: allocate doorbell index for multi-die caseLe Ma1-0/+1
Allocate different doorbell index for kiq/kcq rings on each die Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-04-13drm/amdgpu: Enable IH retry CAM on GFX9Mukul Joshi1-0/+2
This patch enables the IH retry CAM on GFX9 series cards. This retry filter is used to prevent sending lots of retry interrupts in a short span of time and overflowing the IH ring buffer. This will also help reduce CPU interrupt workload. Signed-off-by: Mukul Joshi <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-10drm/amdgpu: Convert to Linux IRQ interfacesThomas Zimmermann1-1/+1
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. The interrupt number returned by pci_msi_vector() is now stored in struct amdgpu_irq. Calls to pci_msi_vector() can fail and return a negative errno code. Abort initlaizaton in thi case. The DRM IRQ midlayer does not handle this correctly. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-19drm/amdgpu: Split amdgpu_device_fini into early and lateAndrey Grodzovsky1-1/+2
Some of the stuff in amdgpu_device_fini such as HW interrupts disable and pending fences finilization must be done right away on pci_remove while most of the stuff which relates to finilizing and releasing driver data structures can be kept until drm_driver.release hook is called, i.e. when the last device reference is dropped. v4: Change functions prefix early->hw and late->sw Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-04-09drm/amdgpu: remove irq_src->data handlingChristian König1-1/+0
That is unused for quite some time now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-11-24drm/amdgpu: add infrastructure for soft IH ringChristian König1-2/+6
Add a soft IH ring implementation similar to the hardware IH1/2. This can be used if the hardware delegation of interrupts to IH1/2 doesn't work for some reason. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: cleanup amdgpu_ih_process a bit moreChristian König1-1/+1
Remove the callback and call the dispatcher directly. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: add support for processing IH ring 1 & 2Christian König1-1/+3
Previously we only added the ring buffer memory, now add the handling as well. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-01-25drm/amdgpu: enable IH ring 1 and ring 2 v4Christian König1-2/+2
The entries are ignored for now, but it at least stops crashing the hardware when somebody tries to push something to the other IH rings. v2: limit ring size, add TODO comment v3: only program rings if they are actually allocated v4: limit the ring init to Vega10 Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: move more defines into amdgpu_irq.hChristian König1-3/+22
Everything that isn't related to the IH ring. Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: drop the drm irq pre/post/un install callbacksAlex Deucher1-3/+1
The preinstall callback didn't do anything because not all of the IPs were initialized when it was called. Move the postinstall setup into sequence in the driver. The uninstall callback disabled all interrupt source, but it got called too late in the driver sequence and caused problems with IPs who already freed the relevant data structures. Move the call into the right place in the driver sequence. Acked-by: Christian König <[email protected]> Acked-by: Harry Wentland <[email protected]> Tested-By: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: switch ih handling to two levels (v3)Alex Deucher1-2/+8
Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-11-23drm/amdgpu: remove amdgpu_irq_get_delayedChristian König1-3/+0
Not used any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: implement vi ih check/pre/post_soft_resetChunming Zhou1-0/+1
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add amdgpu_irq_gpu_reset_resume_helperChunming Zhou1-0/+1
irq need to update when gpu reset happens. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König [email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-01-11drm/amdgpu: add irq domain supportAlex Deucher1-0/+9
Hardware blocks on the GPU like ACP generate interrupts in the GPU interrupt controller, but are driven by a separate driver. Add an irq domain to the GPU driver so that blocks like ACP can register a Linux interrupt. Acked-by: Dave Airlie <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-08-17drm/amdgpu: Implement irq interfaces for CGSAlex Deucher1-0/+1
This implements the irq src registrar. Reviewed-by: Jammy Zhou <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add core driver (v4)Alex Deucher1-0/+92
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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