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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
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2017-09-26drm/amdgpu: Track pending retry faults in IH and VM (v2)Felix Kuehling1-0/+12
IH tracks pending retry faults in a hash table for fast lookup in interrupt context. Each VM has a short FIFO of pending VM faults for processing in a bottom half. The IH prescreening stage adds retry faults and filters out repeated retry interrupts to minimize the impact of interrupt storms. It's the VM's responsibility remove pending faults once they are handled. For now this is only done when the VM is destroyed. v2: - Made the hash table smaller and the FIFO longer. I never want the FIFO to fill up, because that would make prescreen take longer. 128 pending page faults should be enough to keep migrations busy. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> (v1) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-05-24drm/amdgpu: add vcn ip block functions (v2)Leo Liu1-1/+2
Fill in the core VCN 1.0 setup functionality. v2: squash in fixup (Alex) Signed-off-by: Leo Liu <[email protected]> Acked-by: Chunming Zhou <[email protected]> Acked-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: update IH IV ring entry for soc-15Alex Deucher1-1/+4
Reflect the new format on soc-15 asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add clinetid definition for vega10ken1-2/+40
Signed-off-by: ken <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/ih: store the full context idAlex Deucher1-1/+3
The contextID field (formerly known as src_data) of the IH vector stores client specific information about an interrupt. It was expanded from 32 bits to 128 on newer asics. Expand the src_id field to handle this. Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: switch ih handling to two levels (v3)Alex Deucher1-0/+6
Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-08-17drm/amdgpu: Implement irq interfaces for CGSAlex Deucher1-0/+1
This implements the irq src registrar. Reviewed-by: Jammy Zhou <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-06-03drm/amdgpu: add core driver (v4)Alex Deucher1-0/+62
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>