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2016-09-28Merge tag 'v4.8-rc8' into drm-nextDave Airlie1-2/+3
Linux 4.8-rc8 There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge it now to avoid troubles. * tag 'v4.8-rc8': (1442 commits) Linux 4.8-rc8 fault_in_multipages_readable() throws set-but-unused error mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing radix tree: fix sibling entry handling in radix_tree_descend() radix tree test suite: Test radix_tree_replace_slot() for multiorder entries fix memory leaks in tracing_buffers_splice_read() tracing: Move mutex to protect against resetting of seq data MIPS: Fix delay slot emulation count in debugfs MIPS: SMP: Fix possibility of deadlock when bringing CPUs online mm: delete unnecessary and unsafe init_tlb_ubc() huge tmpfs: fix Committed_AS leak shmem: fix tmpfs to handle the huge= option properly blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx MIPS: Fix pre-r6 emulation FPU initialisation arm64: kgdb: handle read-only text / modules arm64: Call numa_store_cpu_info() earlier. locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text nvme-rdma: only clear queue flags after successful connect i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended perf/core: Limit matching exclusive events to one PMU ...
2016-09-16drm/amdgpu: use the new ring ib and dma frame size callbacks (v2)Alex Deucher1-2/+5
Use them to more accurately determine the ring size required for ib submission. v2: drop extra alignment Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-09-14drm/amdgpu:implement CONTEXT_CONTROL (v5)Monk Liu1-1/+11
v1: for gfx8, use CONTEXT_CONTROL package to dynamically skip preamble CEIB and other load_xxx command in sequence. v2: support GFX7 as well. remove cntxcntl in compute ring funcs because CPC doesn't support this packet. v3: fix reduntant judgement in cntxcntl. v4: some cleanups, don't change cs_submit() v5: keep old MESA supported & bump up KMS version. Signed-off-by: Monk Liu <[email protected]> Ack-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-09-12drm/amdgpu: change job->ctx field nameMonk Liu1-6/+6
job->ctx actually is a fence_context of the entity it belongs to, naming it as ctx is too vague, and we'll need add amdgpu_ctx into the job structure later. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-31drm/amdgpu: record error code when ring test failedChunming Zhou1-2/+3
Otherwise we may miss errors. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-08-30drm/amdgpu:add switch buffer to end of CS (v2)Monk Liu1-0/+2
sync switch buffer scheme with windows kmd for gfx v8, step1: append a switch_buffer to the end of CS v2:rebase on latest staging Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()Tom St Denis1-1/+1
If the ring isn't ready lets print out which ring name to help debugging. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-29drm/amdgpu: increase timeout of IB testChunming Zhou1-1/+1
we should give enough time to IB test. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-29drm/amdgpu: add a fence timeout for the IB tests v2Christian König1-1/+3
10ms should be enough for now. v2: fix some typos in CIK code Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: cleanup hw reference handling in the IB testsChristian König1-5/+1
Reference should be taken when we make the assignment, not anywhere else. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add a bool to specify if needing vm flush V2Chunming Zhou1-4/+1
which avoids job->vm_pd_addr be changed. V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix user fence handling once moreChristian König1-5/+2
Same problem as with the VM page tables. The user fence address must be determined before the job is scheduled, not when the IB is executed. This fixes a security problem where user fences could be used to overwrite any part of VRAM. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: fix and cleanup user fence handling v2Christian König1-4/+5
We leaked the BO in the error pass, additional to that we only have one user fence for all IBs in a job. v2: remove white space changes Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: move VM fields into jobChristian König1-10/+9
They are the same for all IBs. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: move the context from the IBs into the jobChristian König1-7/+15
We only have one context for all IBs. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: move context switch handling into common code v2Christian König1-9/+7
It was a source of bugs to repeat that in each IP version. v2: rename parameter Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: move preamble IB handling into common codeChristian König1-1/+7
This fixes the handling which was completely broken when you ad more than one preamble IB. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: use fence_context to judge ctx switch v2Christian König1-1/+1
Use of the ctx pointer is not safe, because they are likely already be assigned to another ctx when doing comparing. v2: recreate from scratch, avoid all unnecessary changes. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: two minor 80 char fixesChristian König1-1/+2
Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-11drm/amdgpu: hdp flush&inval should always doMonk Liu1-7/+5
This fixes Tonga vm-fault issue when running disaster (a multiple context GL heavy tests), We should always flush & invalidate hdp no matter vm used or not. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu1-12/+4
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-04drm/amdgpu: Mark all instances of struct drm_info_list as constNils Wallménius1-1/+1
All these are compile time constand and the drm_debugfs_create/remove_files functions take a const pointer argument. Reviewed-by: Christian König <[email protected]> Signed-off-by: Nils Wallménius <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-04drm/amdgpu: add a fence after the VM flushChristian König1-4/+8
This way we can track when the flush is done. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-02drm/amdgpu: patch cond exec for SDMAMonk Liu1-1/+8
More ground work for conditional execution on SDMA necessary for preemption. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-05-02drm/amdgpu: support cond execMonk Liu1-0/+3
This adds the groundwork for conditional execution on SDMA which is necessary for preemption. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-03-17drm/amdgpu: move ib.fence to job.fenceMonk Liu1-3/+3
Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-03-17drm/amdgpu: give a fence param to ib_freeMonk Liu1-2/+3
thus amdgpu_ib_free() can hook sched fence to SA manager in later patches. BTW: for amdgpu_free_job(), it should only fence_put() the fence of the last ib once, so fix it as well in this patch. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-03-08drm/amdgpu: switch the GDS only on demand v2Christian König1-0/+4
Switching the GDS space to often seems to be problematic. This patch together with the following can avoid VM faults on context switch. v2: extend commit message a bit Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> (v1) Reviewed-by: Chunming Zhou <[email protected]> (v1)
2016-03-08drm/amdgpu: move the GDS switch into vm flush as wellChristian König1-7/+4
After all it's an operation on the VMID. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2016-03-08drm/amdgpu: return the common fence from amdgpu_fence_emitChristian König1-4/+3
Try to avoid using the hardware specific fences even more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2016-03-08drm/amdgpu: remove HW fence ownerChristian König1-4/+2
Not used any more since we now always use the sheduler. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2016-03-08drm/amdgpu: add hdp_invalidate functionChunming Zhou1-0/+5
It's called after emitting ibs. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-29drm/amdgpu: fix VM faults caused by vm_grab_id() v4Christian König1-3/+4
The owner must be per ring as long as we don't support sharing VMIDs per process. Also move the assigned VMID and page directory address into the IB structure. v3: assign the VMID to all IBs, not just the first one. v4: use correct pointer for owner Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: move sync into job objectChristian König1-11/+2
No need to keep that for every IB. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: directly return fence from ib_scheduleChristian König1-1/+6
Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: move ring from IBs into jobChristian König1-7/+4
We can't submit to multiple rings at the same time anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: remove AMDGPU_NUM_SYNCSChristian König1-1/+1
Just a leftover from semaphores. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: remove adev and fence from amdgpu_sync_freeChristian König1-1/+1
Just leftovers from the semaphores. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: remove the ring lock v2Christian König1-5/+5
It's not needed any more because all access goes through the scheduler now. v2: Update commit message. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: grab VMID before submitting job v5Christian König1-12/+5
This allows the scheduler to handle the dependencies on ID contention as well. v2: grab id only once v3: use a separate lock for the VMIDs v4: cleanup after semaphore removal v5: minor coding style change Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: clean up non-scheduler code path (v2)Chunming Zhou1-4/+0
Non-scheduler code is longer supported. v2: agd: rebased on upstream Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Ken Wang <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-10drm/amdgpu: cleanup amdgpu_sync_rings V2Chunming Zhou1-7/+3
No longer needed now that semaphores are gone. V2: remove the first amdgpu_sync_wait in amdgpu_ib_schedule Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Ken Wang <[email protected]> (V1) Reviewed-by: Monk Liu <[email protected]> (V2) Signed-off-by: Alex Deucher <[email protected]>
2015-11-16drm/amdgpu: remove the unnecessary parameter adev for amdgpu_sa_bo_new()Junwei Zhang1-1/+1
Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-11-16drm/amdgpu: use common fence for amdgpu_vm_fenceChristian König1-1/+1
Just cleanup the function parameters. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-30drm/amdgpu: remove amdgpu_fence_ref/unrefChristian König1-1/+2
Just move the remaining users to fence_put/get. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-21drm/amdgpu: remove old lockup detection infrastructureChristian König1-1/+0
It didn't worked to well anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]>
2015-08-25drm/amdgpu: fix fence wait in sync_fence, instead should be in sync_ringsChristian König1-1/+5
Signed-off-by: Christian König <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian K?nig <[email protected]>
2015-08-25drm/amdgpu: remove v_seq handling from the scheduler v2Christian König1-5/+1
Simply not used any more. Only keep 32bit atomic for fence sequence numbering. v2: trivial rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> (v1) Reviewed-by: Jammy Zhou <[email protected]> (v1) Reviewed-by: Chunming Zhou <[email protected]> (v1)
2015-08-25drm/amdgpu: improve sa_bo->fence by kernel fenceChunming Zhou1-2/+2
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian K?nig <[email protected]>
2015-08-20drm/amdgpu: fix zeroing all IB fields manually v2Christian König1-17/+0
The problem now is that we don't necessarily call amdgpu_ib_get() in some error paths and so work with uninitialized data. Better require that the memory is already zeroed. v2: better commit message Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> (v1) Reviewed-by: Alex Deucher <[email protected]>