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This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.
We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.
Acked-by: Alex Deucher <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Leo (Sunpeng) Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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into drm-next
More fixes for 4.19:
- Fixes for scheduler
- Fix for SR-IOV
- Fixes for display
Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Extend the timeout for recovering vram bos from shadows on sr-iov
to cover the worst case scenario for timeslices and VFs
Under runtime, the wait fence time could be quite long when
other VFs are in exclusive mode. For example, for 4 VF, every
VF's exclusive timeout time is set to 3s, then the worst case is
9s. If the VF number is more than 4,then the worst case time will
be longer.
The 8s is the test data, with setting to 8s, it will pass the TDR
test for 1000 times.
SWDEV-161490
Signed-off-by: Monk Liu <[email protected]>
Signed-off-by: Emily Deng <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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rmk requested this for armada and I think we've had a few
conflicts build up.
Signed-off-by: Dave Airlie <[email protected]>
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This patch moves amdgpu_fbdev_set_suspend() to the beginning
of suspend sequence.
This is to ensure fbcon does not to write to the VRAM
after GPU is powerd down.
Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use the newly split ip suspend functions to do suspend displays
first (to deal with atomic so that FBs can be unpinned before
attempting to evict vram), then evict vram, then suspend the
other IPs. Also move the non-DC pinning code to only be
called in the non-DC cases since atomic should take care of
DC.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes: e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Acked-by: Harry Wentland <[email protected]>
Reviewed-and-tested-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We need to do some IPs earlier to deal with ordering issues
similar to how resume is split into two phases. Do DCE first
to deal with atomic, then do the rest.
Acked-by: Harry Wentland <[email protected]>
Reviewed-and-tested-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch removes the usage of console_(un)lock
by replacing drm_fb_helper_set_suspend() to
drm_fb_helper_set_suspend_unlocked() which locks and
unlocks the console instead of locking ourselves.
Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
While the console_lock is held, console output will be buffered, till
its unlocked it wont be emitted, hence its ideal to unlock sooner to enable
debugging/detecting/fixing of any issue in the remaining sequence of events
in resume path.
The concern here is about consoles other than fbcon on the device,
e.g. a serial console
[How]
This patch restructures the console_lock, console_unlock around
amdgpu_fbdev_set_suspend() and moves this new block appropriately.
V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state
V3: Updated the commit message to clarify the real concern that this patch
addresses.
V4: code clean-up.
V5: fixed return value
Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Trivial fix to spelling mistake in dev_err error message.
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.
Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Fixes: 2c773de2 (drm/amdgpu: defer test IBs on the rings at boot (V3))
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We can easily get that from the scheduler.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Acked-by: Chunming Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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job could be NULL when amdgpu_device_gpu_recover is called
Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Oded Gabbay <[email protected]>
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Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Oded Gabbay <[email protected]>
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It could be got by amdgpu_bo_gpu_offset() if need
Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Eliminating the warnings produced by sphinx when processing the sphinx comments in
amdgpu_device.c & amdgpu_mn.c
Signed-off-by: Darren Powell <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use the newly exported pci functions to get the link width
and speed rather than using the drm duplicated versions.
Also query the GPU link caps directly rather than hardcoding
them.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Partially revert commit 2dc80b00652f
("drm/amdgpu: optimize amdgpu driver load & resume time")'
1. CG/PG enablement are part of gpu hw ip initialize, we should
wait for them complete. otherwise, there are some potential conflicts,
for example, Suspend and CG enablement concurrently.
2. better run ib test after hw initialize completely. That is to say,
ib test should be after CG/PG enablement. otherwise, the test will
not cover the cg/pg/poweroff enable case.
Reviewed-by: Evan Quan <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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1. add amdgpu_device_ip_late_set_pg_state function for
set pg state.
2. delete duplicate pg state setting on gfx_v8_0's late_init.
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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we can take gfx off feature as gfx power gate. gfx off feature is also
controled by smu. so add gfx_off support in pp_set_powergating_by_smu.
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Two requests have come in for a backmerge,
and I've got some pull reqs on rc2, so this
just makes sense.
Signed-off-by: Dave Airlie <[email protected]>
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Use enum amd_powergating_state instead of enum amd_clockgating_state.
The underlying value stays the same, so there is no functional change
in practise. This fixes a warning seen with clang:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:1930:14: warning: implicit
conversion from enumeration type 'enum amd_clockgating_state' to
different enumeration type 'enum amd_powergating_state'
[-Wenum-conversion]
AMD_CG_STATE_UNGATE);
^~~~~~~~~~~~~~~~~~~
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Avoid confusing the GART with the GTT domain.
Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We've had a number of users report failures to detect and light up
display with DC with LVDS and VGA. These connector types are not
currently supported with DC. I'd like to add support but unfortunately
don't have a system with LVDS or VGA available.
In order not to cause regressions we should probably fallback to the
non-DC driver for ASICs that support VGA and LVDS.
These ASICs are:
* Bonaire
* Kabini
* Kaveri
* Mullins
ASIC support can always be force enabled with amdgpu.dc=1
v2: Keep Hawaii on DC
v3: Added Mullins to the list
Cc: [email protected]
Signed-off-by: Harry Wentland <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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driver need to know the real power source to do some power
related configuration when initialize.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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After defer the execution of clockgating enabling, at that time, gfx already
enter into "off" state. Howerver, clockgating enabling will use MMIO to access
the gfx registers, then get the gfx hung.
So here we should move the gfx powergating and gfxoff enabling behavior at the
end of initialization behind clockgating.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Cc: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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VCN clockgating is handled manually like VCE and UVD.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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amdgpu_device_gpu_recover. (v2)
First of all it's already being called from the display code from amd_ip_funcs.suspend/resume hooks.
Second of all, the place in amdgpu_device_gpu_recover it's being called is wrong for GPU stalls since
it is called BEFORE we cancel and force completion of all in flight jobs which were not yet processed.
So, as Bas pointed in the ticket we will try to wait for fence in amdgpu_pm_compute_clocks but the pipe
is hanged so we end up in deadlock.
v2: remove unused variable
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106500
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v2: fix whitespace
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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vega20_gpu_info firmware stores gpu configuration for vega20.
v2: drop gpu info firmware for vega20
Squash of:
drm/amdgpu: Add gpu_info firmware for vega20.
drm/amdgpu: drop gpu_info firmware for vega20
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add vega20 to amd_asic_type enum and amdgpu_asic_name[].
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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When put the IB test out of exclusive mode, and do sriov reset,
the IB test will randomly fail. As out of exclusive mode it uses
kiq to do read and write registers, but as it has world switch,
the kiq read and write time will be random, sometimes it will
beyond the MAX_KIQ_REG_WAIT and then the read or write register
will fail, which will result the IB test fail.
Signed-off-by: Emily Deng <[email protected]>
Reviewed-by: Monk Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v2: check reserved vram size before allocate.
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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amdgpu_ib_ring_tests() runs test IB's on rings at boot
contributes to ~500 ms of amdgpu driver's boot time.
This patch defers it and ensures that its executed
in amdgpu_info_ioctl() if it wasn't scheduled.
V2: Use queue_delayed_work() & flush_delayed_work().
V3: removed usage of separate wq, ensure ib tests is
run before enabling clockgating.
Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We enabled this upstream by default now and no longer need the flag.
Signed-off-by: Harry Wentland <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use the new callback to determine whether to use full
asic reset or per IP soft reset. Enables reset to
actually proceed on asics which don't support soft
reset yet.
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle and destroy functions the same as the GEM framebuffer
helper, we can reuse those.
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Daniel Stone <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: Christian König <[email protected]>
Cc: David (ChunMing) Zhou <[email protected]>
Cc: [email protected]
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Christian König<[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Problem:
When unloading due to failure amdgpu_device_fini was called twice
which was leading to NULL ptr in amdgpu_irq_disable_all.
Fix:
Call amdgpu_device_fini only once from amdgpu_driver_unload_kms.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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DC is used for modesetting on vega12.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
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soc15 just like vega10 and raven.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
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Stores gpu configuration details.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
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