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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
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2016-02-08drm/amdgpu: add a cgs interface to fetch cg and pg flagsAlex Deucher1-0/+6
Needed to pass the cg and pg info to powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11drm/amdgpu/cgs: add an interface to access PCI resourcesAlex Deucher1-0/+36
This provides an interface to get access to the base address of PCI resources (MMIO, DOORBELL, etc.). Only MMIO and DOORBELL are implemented right now. This is necessary to properly utilize shared drivers on platform devices. IP modules can use this interface to get the base address of the resource and add any additional offset and set the size when setting up the platform driver(s). Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04drm/amdgpu/cgs: cleanup some indentingDan Carpenter1-9/+9
This code is indented too far. Also we normally use spaces to align if statement conditions. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21drm/amdgpu/cgs: add sys info query for pcie gen and link widthAlex Deucher1-0/+6
Needed by powerplay to properly handle pcie dpm switching. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.Eric Huang1-0/+3
Switch over to handling in the powerplay module. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21drm/amdgpu: add new cgs interface to get display info (v2)Rex Zhu1-0/+40
Add new CGS interfaces to query display info across modules. This is nedded by the powerplay module for synchronizing with the display module. v2: (agd): fold in refresh rate fix, rebase Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21drm/amdgpu: implement cgs interface to query system infoRex Zhu1-0/+23
Add a query to get the bus number and function of the device. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21drm/amdgpu: implement new cgs interface for acpi functionRex Zhu1-2/+218
Add a new driver internal interface for accessing ACPI methods. These will be used by various new components including powerplay. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-30drm/amdgpu/cgs: remove import_gpu_memAlex Deucher1-39/+0
It was added for completeness, but we don't have any users for it yet. Daniel noted that it may be racy. Remove it. Change-Id: I5f5546f8911a4f294008a62dc86a73f3face38d1 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23drm/amdgpu: export reservation_object from dmabuf to ttm (v2)Christian König1-2/+3
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c. Port of radeon commit 831b6966a60fe72d85ae3576056b4e4e0775b112. v2: fix up kfd. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: add cgs_interface for pg and cgrezhu1-1/+46
v3: check whether ip_blocks is enable v2: add break in the for loop. Signed-off-by: Rex zhu <rezhu@amd.com>
2015-08-17drm/amdgpu: add cgs_get_firmware_info interface v2Jammy Zhou1-1/+121
This new interface can be used by IP components to retrieve the firmware information from the core driver. v2: fix one typo Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Rex Zhu <Rex.Zhou@amd.com> Signed-off-by: Young Yang <Young.Yang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: implement cgs gpu memory callbacksChunming Zhou1-12/+226
This implements the cgs interface for allocating GPU memory. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: add atom interfaces for CGSChunming Zhou1-6/+22
This implements the interface for atombios command and data table access. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: Implement irq interfaces for CGSAlex Deucher1-6/+75
This implements the irq src registrar. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: Implement the pciconfig callbacks for CGSChunming Zhou1-12/+28
This implements the pciconfig register accessors. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: Implement mmio callbacks for CGSChunming Zhou1-7/+38
This implements the MMIO register accessors. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amd: Add CGS interfacesChunming Zhou1-0/+327
CGS (Common Graphics Services) is an AMD cross component abstraction layer to designed to better encapsulate specific IP block drivers so different teams can effectively work on differnet IP block drivers independently. It provides a common interface for things like accessing registers, allocating GPU memory, and registering interrupt sources. The plan is to eventually move more and more IP drivers to this interface. The first user is the ACP IP driver. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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