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and move them to amdgpu_atombios.c for consistency.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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No longer used.
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Check the atom scratch registers to see if asic_init is complete
or not.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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On KB, KV, CZ we should read the vram width from integrated system
table, if we can. The NOOFCHAN in MC_SHARED_CHMAP is not accurate.
With this change we can enable two 4k displays on CZ again. This use
case was broken sometime in January when we started looking at
vram_width for bandwidth calculations instead of hardcoding this value.
v2:
Return 0 if integrated system info table is not available.
Tested-by: Roman Li <[email protected]>
Signed-off-by: Harry Wentland <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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There will be a slightly different version for atomfirmware.
Acked-by: Christian König <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Leftovers from the radeon.
Reviewed-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Move from asic specific code to common atom code.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v2: renamed _atom_ to _atombios_ for consistency
added ulClockParams to _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 and
_COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 to avoid build break
Signed-off-by: Maruthi Bayyavarapu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For virtual display feature, when the GPU has DCE engine, need to disable
the VGA render and CRTC, or it will hang when initialize GMC. So first detect
whether the GPU has DCE engine.
Signed-off-by: Emily Deng <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Fetch the values from atom rather than hardcoding them in the
driver.
Signed-off-by: Alex Deucher <[email protected]>
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This table is found on boards that support SR-IOV. This will
be used to determine if the board supports SR-IOV and allow
the driver to take specific action in certain cases.
Reviewed-by: Monk Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This adds the non-asic specific core driver code.
v2: remove extra kconfig option
v3: implement minor fixes from Fengguang Wu
v4: fix cast in amdgpu_ucode.c
Acked-by: Christian König <[email protected]>
Acked-by: Jammy Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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