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Successful sw_init() and hw_init() states are tracked, but not
late_init(). Various error paths may result in amdgpu_fini() being
called before .late init is done, so late_init needs to be tracked
to avoid unexpected or multiple .late_fini() calls.
Signed-off-by: Grazvydas Ignotas <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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into drm-next
Some additional fixes for 4.9:
- The rest of Christian's GTT rework which fixes a long standing bug
in the GPUVM code among other things
- Changes to the pci shutdown callbacks for certain hypervisors
- Fix hpd interrupt storms on eDP panels which have the hpd interrupt
enabled by the bios
- misc cleanups and bug fixes
* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (33 commits)
drm/radeon: always apply pci shutdown callbacks
drm/amdgpu: always apply pci shutdown callbacks (v2)
drm/amdgpu: improve VM PTE trace points
drm/amdgpu: fix GART_DEBUGFS define
drm/amdgpu: free userptrs even if GTT isn't bound
drm/amd/amdgpu: Various cleanups for DCEv6
drm/amdgpu: fix BO move offsets
drm/amdgpu: fix amdgpu_move_blit on 32bit systems
drm/amdgpu: fix gtt_mgr bo's offset
drm/amdgpu: fix initializing the VM BO shadow
drm/amdgpu: fix initializing the VM last eviction counter
drm/amdgpu: cleanup VM shadow BO unreferencing
drm/amdgpu: allocate GTT space for shadow VM page tables
drm/amdgpu: rename all rbo variable to abo v2
drm/amdgpu: remove unused member from struct amdgpu_bo
drm/amdgpu: add a custom GTT memory manager v2
drm/amdgpu/dce6: disable hpd on local panels
drm/amdgpu/dce8: disable hpd on local panels
drm/amdgpu/dce11: disable hpd on local panels
drm/amdgpu/dce10: disable hpd on local panels
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Just to cleanup some radeon leftovers.
sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.h
v2: rebased
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Not used in a while.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Linux 4.8-rc8
There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge
it now to avoid troubles.
* tag 'v4.8-rc8': (1442 commits)
Linux 4.8-rc8
fault_in_multipages_readable() throws set-but-unused error
mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing
radix tree: fix sibling entry handling in radix_tree_descend()
radix tree test suite: Test radix_tree_replace_slot() for multiorder entries
fix memory leaks in tracing_buffers_splice_read()
tracing: Move mutex to protect against resetting of seq data
MIPS: Fix delay slot emulation count in debugfs
MIPS: SMP: Fix possibility of deadlock when bringing CPUs online
mm: delete unnecessary and unsafe init_tlb_ubc()
huge tmpfs: fix Committed_AS leak
shmem: fix tmpfs to handle the huge= option properly
blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx
MIPS: Fix pre-r6 emulation FPU initialisation
arm64: kgdb: handle read-only text / modules
arm64: Call numa_store_cpu_info() earlier.
locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text
nvme-rdma: only clear queue flags after successful connect
i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended
perf/core: Limit matching exclusive events to one PMU
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Some ATPX laptops implement special circuitry to generate
display hotplug events via ACPI when the dGPU is powered off.
Check if this is supported.
Signed-off-by: Alex Deucher <[email protected]>
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move virtual machine related structure to amdgpu_virt.h
easy for developer to maintain for virualization stuffs
Signed-off-by: Monk Liu <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Replace per-asic print_current_performance() functions with generic
that calls read_sensor. Tested on Tonga and Carrizo for aesthetics
and accuracy.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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1,Changes on virtualization detections
2,Don't load smu & mc firmware if using sr-iov bios
3,skip vPost for sriov & force vPost if dev pass-through
v2: agd: squash in Rays's fix for the missed SI case
v3: agd: squash in additional fixes for CIK, SI, cleanup
Signed-off-by: Monk Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:985:5: warning: no previous prototype for 'amdgpu_ttm_init' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1092:6: warning: no previous prototype for 'amdgpu_ttm_fini' [-Wmissing-prototypes]
In fact, both functions are declared in
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c, but should be declared in
a header file, thus can be recognized in other file.
So this patch moves the declarations into
drivers/gpu/drm/amd/amdgpu/amdgpu.h.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Baoyou Xie <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Used to properly calculate space on the ring for ib submissions.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We don't really need the GTT table any more most of the time. So bind it
only on demand.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v1:
for gfx8, use CONTEXT_CONTROL package to dynamically
skip preamble CEIB and other load_xxx command in sequence.
v2:
support GFX7 as well.
remove cntxcntl in compute ring funcs because CPC doesn't
support this packet.
v3: fix reduntant judgement in cntxcntl.
v4: some cleanups, don't change cs_submit()
v5: keep old MESA supported & bump up KMS version.
Signed-off-by: Monk Liu <[email protected]>
Ack-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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job->ctx actually is a fence_context of the entity
it belongs to, naming it as ctx is too vague, and
we'll need add amdgpu_ctx into the job structure
later.
Signed-off-by: Monk Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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As last resort try to evict BOs from the current working set into other
memory domains. This effectively prevents command submission failures when
VM page tables have been swapped out.
v2: fix typos
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2:
a. gart recovery should be ahead of ring test.
b. rename to amdgpu_ttm_recover_gart
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2:
spin lock instead of mutex for gtt list
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v2: corrected register offset shift
v3: rebase fixes
v4: fix firmware paths
add SI smc firmware versions for sysfs dump
remove unused function forward define
fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field
fix to miss adding thermal controller
use vram_type instead of checking mem_gddr5 flag
fix incorrect index of CG_FFCT_0 register
fix incorrect reading method at si_get_current_pcie_speed
Signed-off-by: Maruthi Bayyavarapu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch adds pcie port read/write entry, because it will be also
used on si dpm part.
Acked-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v4: rebase fixes
v5: use the generic nop fill
v6: rebase fixes
v7: rebase fixes
copy count fixes from Jonathan
general cleanup
add fill buffer implementation
v8: adapt write_pte and copy_pte to latest changes
Signed-off-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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sync switch buffer scheme with windows kmd for gfx v8,
step1: append a switch_buffer to the end of CS
v2:rebase on latest staging
Signed-off-by: Monk Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The old mechanism used a per-submission limit that didn't take previous
submissions within the same time frame into account. It also filled VRAM
slowly when VRAM usage dropped due to a big eviction or buffer deallocation.
This new method establishes a configurable MBps limit that is obeyed when
VRAM usage is very high. When VRAM usage is not very high, it gives
the driver the freedom to fill it quickly. The result is more consistent
performance.
It can't keep the BO move rate low if lots of evictions are happening due
to VRAM fragmentation, or if a big buffer is being migrated.
The amdgpu.moverate parameter can be used to set a non-default limit.
Measurements can be done to find out which amdgpu.moverate setting gives
the best results.
Mainly APUs and cards with small VRAM will benefit from this. For F1 2015,
anything with 2 GB VRAM or less will benefit.
Some benchmark results - F1 2015 (Tonga 2GB):
Limit MinFPS AvgFPS
Old code: 14 32.6
128 MB/s: 28 41
64 MB/s: 15.5 43
32 MB/s: 28.7 43.4
8 MB/s: 27.8 44.4
8 MB/s: 21.9 42.8 (different run)
Random drops in Min FPS can still occur (due to fragmented VRAM?), but
the average FPS is much better. 8 MB/s is probably a good limit for this
game & the current VRAM management. The random FPS drops are still to be
tackled.
v2: use a spinlock
Signed-off-by: Marek Olšák <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Not of much use at the moment (we don't really use
the second ring either), but may be useful later.
Reviewed-by: JimQu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Rather than using a hardcoded value. This allows
different versions to expose more or less rings.
No functional change.
Reviewed-by: JimQu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The old names were dragged over from radeon. The new ones
better match the naming conventions used in the driver.
No functional change.
Signed-off-by: Alex Deucher <[email protected]>
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Adding a BO can make it the insertion point for larger sizes as well.
v2: add a comment about the guard structure.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Make it more obvious what we are doing here.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2:
Checking if shadow is valid.
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.
V3:
1. Split to two functions, one is backup_to_shadow, another is
restore_from_shadow.
2. Clean up previous shadow direction difinitions.
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2:
add checking if need backup in amdgpu_bo_create.
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It doesn't make much sense to create bigger commands first which we then need
to split into smaller one again. Just make sure the commands we create aren't
to big in the first place.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We don't need the gart mapping handling here any more.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Indicate if need to sync between bo and shadow, where sync to where.
V2:
Rename to backup_shadow
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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shadow bo is the shadow of a bo, which is always in GTT,
which can be used to backup the original bo.
V2:
reference shadow parent, shadow bo will be freed by who allocted him.
Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The GART aperture size can be bigger than 4GB. Therefore the offset
used in amdgpu_gart_bind and amdgpu_gart_unbind must be 64-bit.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Now we can program a flip during a vertical blank period, if it's the
one targeted by the flip (or a later one). This allows simplifying
amdgpu_flip_work_func considerably.
agd: update dce_virtual.c as well.
Acked-by: Christian König <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We can actually do way more than just the 64KB we currently used as default.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Not used for a long time.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch introduces a new macro WREG32_FIELD which is used
to write to a register with a new value in a field. It's designed
to replace the pattern:
tmp = RREG32(mmFoo);
tmp &= ~REG__FIELD_MASK;
tmp |= new_value << REG__FIELD__SHIFT;
WREG32(mmFoo, tmp)
with:
WREG32_FIELD(Foo, FIELD, new_value);
Unlike WREG32_P() it understands offsets/masks and doesn't
require the caller to shift the value (or mask properly).
It's applied where suitable in the gfx_v8_0.c driver to start
with.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For virtual display feature, as there may be multiple GPUs,
for user could choose whiche GPU need to enable this feature, change
the type of virtual_display from int to char*. The variable will be set
like this virtual_display="xxxx:xx:xx.x;xxxx:xx:xx.x;".
Signed-off-by: Emily Deng <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For virtual display feature, define on variable in amdgpu.ko. When want to
enable virtual display feature, need set the option "amdgpu.virtual_display=1".
And then disable vga render and crtc if have DCE engine.
Signed-off-by: Emily Deng <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Ken Wang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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so that bo could be set to some pattern
Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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