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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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2021-10-28drm/amdgpu: Add kernel parameter support for ignoring bad page thresholdKent Russell1-0/+1
When a GPU hits the bad_page_threshold, it will not be initialized by the amdgpu driver. This means that the table cannot be cleared, nor can information gathering be performed (getting serial number, BDF, etc). If the bad_page_threshold kernel parameter is set to -2, continue to initialize the GPU, while printing a warning to dmesg that this action has been done v2: squash in Luben's fix to restore RAS info reporting Cc: Luben Tuikov <[email protected]> Cc: Mukul Joshi <[email protected]> Signed-off-by: Kent Russell <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: handle the case of pci_channel_io_frozen only in amdgpu_pci_resumeGuchun Chen1-0/+1
In current code, when a PCI error state pci_channel_io_normal is detectd, it will report PCI_ERS_RESULT_CAN_RECOVER status to PCI driver, and PCI driver will continue the execution of PCI resume callback report_resume by pci_walk_bridge, and the callback will go into amdgpu_pci_resume finally, where write lock is releasd unconditionally without acquiring such lock first. In this case, a deadlock will happen when other threads start to acquire the read lock. To fix this, add a member in amdgpu_device strucutre to cache pci_channel_state, and only continue the execution in amdgpu_pci_resume when it's pci_channel_io_frozen. Fixes: c9a6b82f45e2 ("drm/amdgpu: Implement DPC recovery") Suggested-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-05drm/amdgpu: revert "Add autodump debugfs node for gpu reset v8"Christian König1-2/+0
This reverts commit 728e7e0cd61899208e924472b9e641dbeb0775c4. Further discussion reveals that this feature is severely broken and needs to be reverted ASAP. GPU reset can never be delayed by userspace even for debugging or otherwise we can run into in kernel deadlocks. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: convert IP version array to include instancesAlex Deucher1-1/+1
Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add VCN1 hardware IPAlex Deucher1-0/+1
So we can store the VCN IP revision for each instance of VCN. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add DCI HWIPAlex Deucher1-0/+1
So we can track grab the appropriate DCE info out of the IP discovery table. This is a separare IP from DCN. Acked-by: Harry Wentland <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add XGMI HWIPAlex Deucher1-0/+1
So we can track grab the appropriate XGMI info out of the IP discovery table. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: store HW IP versions in the driver structureAlex Deucher1-0/+4
So we can check the IP versions directly rather than using asic type. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add debugfs access to the IP discovery tableAlex Deucher1-0/+1
Useful for debugging and new asic validation. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/amdgpu: Increase HWIP_MAX_INSTANCE to 10Ernst Sjöstrand1-1/+1
Seems like newer cards can have even more instances now. Found by UBSAN: array-index-out-of-bounds in drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:318:29 index 8 is out of range for type 'uint32_t *[8]' Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1697 Cc: [email protected] Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-24drm/amdgpu: Add driver infrastructure for MCA RASJohn Clements1-0/+4
Add MCA specific IP blocks targetting RAS features Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-16drm/amd/pm: drop the unnecessary intermediate percent-based transitionEvan Quan1-0/+2
Currently, the readout of fan speed pwm is transited into percent-based and then pwm-based. However, the transition into percent-based is totally unnecessary and make the final output less accurate. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-05drm/amdgpu: create amdgpu_vkms (v4)Ryan Taylor1-0/+1
Modify the VKMS driver into an api that dce_virtual can use to create virtual displays that obey drm's atomic modesetting api. v2: Made local functions static. v3: Switched vkms_output kzalloc for kcalloc. Cleanup patches by moving display mode fixes to this patch. v4: Update atomic_check and atomic_update to comply with new kms api. Signed-off-by: Ryan Taylor <[email protected]> Reported-by: kernel test robot <[email protected]> Suggested-by: Alex Deucher <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-27drm/amdgpu: Rename amdgpu_acpi_is_s0ix_supportedPratik Vishwakarma1-2/+2
Rename amdgpu_acpi_is_s0ix_supported to better explain functionality by renaming to amdgpu_acpi_is_s0ix_active Signed-off-by: Pratik Vishwakarma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-16drm/amdgpu: split amdgpu_device_access_vram() into two small partsKevin Wang1-1/+6
split amdgpu_device_access_vram() 1. amdgpu_device_mm_access(): using MM_INDEX/MM_DATA to access vram 2. amdgpu_device_aper_access(): using vram aperature to access vram (option) Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-07-16amdgpu/nv.c - Optimize code for video codec support structureVeerabadhran Gopalakrishnan1-0/+7
Optimized the code for codec info structure initialization Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04drm/amdgpu: Don't flush/invalidate HDP for APUs and A+AEric Huang1-0/+5
Integrate two generic functions to determine if HDP flush is needed for all Asics. Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04drm/amdgpu: attr to control SS2.0 bias level (v2)Sathishkumar S1-0/+5
add sysfs attr to read/write smartshift bias level. document smartshift_bias sysfs attr. V2: add attr to amdgpu_device_attrs and use attr_update (Lijo) Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-04Merge tag 'amd-drm-next-5.14-2021-06-02' of ↵Dave Airlie1-19/+28
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.14-2021-06-02: amdgpu: - GC/MM register access macro clean up for SR-IOV - Beige Goby updates - W=1 Fixes - Aldebaran fixes - Misc display fixes - ACPI ATCS/ATIF handling rework - SR-IOV fixes - RAS fixes - 16bpc fixed point format support - Initial smartshift support - RV/PCO power tuning fixes for suspend/resume - More buffer object subclassing work - Add new INFO query for additional vbios information - Add new placement for preemptable SG buffers amdkfd: - Misc fixes radeon: - W=1 Fixes - Misc cleanups UAPI: - Add new INFO query for additional vbios information Useful for debugging vbios related issues. Proposed umr patch: https://patchwork.freedesktop.org/patch/433297/ - 16bpc fixed point format support IGT test: https://lists.freedesktop.org/archives/igt-dev/2021-May/031507.html Proposed Vulkan patch: https://github.com/kleinerm/pal/commit/a25d4802074b13a8d5f7edc96ae45469ecbac3c4 - Add a new GEM flag which is only used internally in the kernel driver. Userspace is not allowed to set it. drm: - 16bpc fixed point format fourcc Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-06-01drm/amdgpu: enable smart shift on dGPU (v5)Sathishkumar S1-0/+18
enable smart shift on dGPU if it is part of HG system and the platform supports ATCS method to handle power shift. V2: avoid psc updates in baco enter and exit (Lijo) fix alignment (Shashank) V3: rebased on unified ATCS handling. (Alex) V4: check for return value and warn on failed update (Shashank) return 0 if device does not support smart shift. (Lizo) V5: rebased on ATPX/ATCS structures global (Alex) Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Shashank Sharma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-06-01drm/amdgpu: support atcs method powershift (v4)Sathishkumar S1-0/+6
add support to handle ATCS method for power shift control. used to communicate dGPU device state to SBIOS. V2: use defined acpi func for checking psc support (Lijo) fix alignment (Shashank) V3: rebased on unified ATCS handling (Alex) V4: rebased on ATPX/ATCS structures global (Alex) Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-27drm/amdgpu/acpi: make ATPX/ATCS structures global (v2)Alex Deucher1-6/+3
They are global ACPI methods, so maybe the structures global in the driver. This simplified a number of things in the handling of these methods. v2: reset the handle if verify interface fails (Lijo) v3: fix compilation when ACPI is not defined. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-25drm/amdgpu: Rename flag which prevents HW accessAndrey Grodzovsky1-1/+1
Make it's name not feature but function descriptive. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-22Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-1/+3
Backmerging from drm/drm-next to the patches for AMD devices for v5.14. Signed-off-by: Thomas Zimmermann <[email protected]>
2021-05-21drm/amdgpu/acpi: unify ATCS handling (v3)Alex Deucher1-15/+2
Treat it like ATIF and check both the dGPU and APU for the method. This is required because ATCS may be hung off of the APU in ACPI on A+A systems. v2: add back accidently removed ACPI handle check. v3: Fix incorrect atif check (Colin) Fix uninitialized variable (Colin) Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-21drm/amdgpu: Indirect register access for Navi12 sriovPeng Ju Zhou1-0/+1
This patch series are used for GC/MMHUB(part)/IH_RB_CNTL indirect access in the SRIOV environment. There are 4 bits, controlled by host, to control if GC/MMHUB(part)/IH_RB_CNTL indirect access enabled. (one bit is master bit controls other 3 bits) For GC registers, changing all the register access from MMIO to RLC and use RLC as the default access method in the full access time. For partial MMHUB registers, changing their access from MMIO to RLC in the full access time, the remaining registers keep the original access method. For IH_RB_CNTL register, changing it's access from MMIO to PSP. Signed-off-by: Peng Ju Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-21Merge tag 'amd-drm-next-5.14-2021-05-19' of ↵Dave Airlie1-1/+2
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.14-2021-05-19: amdgpu: - Aldebaran updates - More LTTPR display work - Vangogh updates - SDMA 5.x GCR fixes - RAS fixes - PCIe ASPM support - Modifier fixes - Enable TMZ on Renoir - Buffer object code cleanup - Display overlay fixes - Initial support for multiple eDP panels - Initial SR-IOV support for Aldebaran - DP link training refactor - Misc code cleanups and bug fixes - SMU regression fixes for variable sized arrays - MAINTAINERS fixes for amdgpu amdkfd: - Initial SR-IOV support for Aldebaran - Topology fixes - Initial HMM SVM support - Misc code cleanups and bug fixes radeon: - Misc code cleanups and bug fixes - SMU regression fixes for variable sized arrays - Flickering fix for Oland with multiple 4K displays UAPI: - amdgpu: Drop AMDGPU_GEM_CREATE_SHADOW flag. This was always a kernel internal flag and userspace use of it has always been blocked. It's no longer needed so remove it. - amdkgd: HMM SVM support Overview: https://patchwork.freedesktop.org/series/85562/ Porposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/tree/fxkamd/hmm-wip Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-19drm/amdgpu: Split amdgpu_device_fini into early and lateAndrey Grodzovsky1-1/+5
Some of the stuff in amdgpu_device_fini such as HW interrupts disable and pending fences finilization must be done right away on pci_remove while most of the stuff which relates to finilizing and releasing driver data structures can be kept until drm_driver.release hook is called, i.e. when the last device reference is dropped. v4: Change functions prefix early->hw and late->sw Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-19drm/amdgpu: add judgement when add ip blocks (v2)Likun GAO1-0/+1
Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-19Merge tag 'drm-misc-next-2021-05-12' of ↵Dave Airlie1-0/+1
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.14: UAPI Changes: * drm: Disable connector force-probing for non-master clients * drm: Enforce consistency between IN_FORMATS property and cap + related driver cleanups * drm/amdgpu: Track devices, process info and fence info via /proc/<pid>/fdinfo * drm/ioctl: Mark AGP-related ioctls as legacy * drm/ttm: Provide tt_shrink file to trigger shrinker via debugfs; Cross-subsystem Changes: * fbdev/efifb: Special handling of non-PCI devices * fbdev/imxfb: Fix error message Core Changes: * drm: Add connector helper to attach HDR-metadata property and convert drivers * drm: Add connector helper to compare HDR-metadata and convert drivers * drm: Add conenctor helper to attach colorspace property * drm: Signal colorimetry in HDMI infoframe * drm: Support pitch for destination buffers; Add blitter function with generic format conversion * drm: Remove struct drm_device.pdev and update legacy drivers * drm: Remove obsolete DRM_KMS_FB_HELPER config option in core and drivers * drm: Remove obsolete drm_pci_alloc/drm_pci_free * drm/aperture: Add helpers for aperture ownership and convert drivers, replaces rsp fbdev helpers * drm/agp: Mark DRM AGP code as legacy and convert legacy drivers * drm/atomic-helpers: Cleanups * drm/dp: Handle downstream port counts of 0 correctly; AUX channel fixes; Use drm_err_*/drm_dbg_*(); Cleanups * drm/dp_dual_mode: Use drm_err_*/drm_dbg_*() * drm/dp_mst: Use drm_err_*/drm_dbg_*(); Use Extended Base Receiver Capability DPCD space * drm/gem-ttm-helper: Provide helper for dumb_map_offset and convert drivers * drm/panel: Use sysfs_emit; panel-simple: Use runtime PM, Power up panel when reading EDID, Cache EDID, Cleanups; Lms397KF04: DT bindings * drm/pci: Mark AGP helpers as legacy * drm/print: Handle NULL for DRM devices gracefully * drm/scheduler: Change scheduled fence track * drm/ttm: Don't count SG BOs against pages_limit; Warn about freeing pinned BOs; Fix error handling if no BO can be swapped out; Move special handling of non-GEM drivers into vmwgfx; Move page_alignment into the BO; Set drm-misc as TTM tree in MAINTAINERS; Cleanup ttm_agp_backend; Add ttm_sys_manager for system domain; Cleanups Driver Changes: * drm: Don't set allow_fb_modifiers explictly in drivers * drm/amdgpu: Pin/unpin fixes wrt to TTM; Use bo->base.size instead of mem->num_pages * drm/ast: Use managed pcim_iomap(); Fix EDID retrieval with DP501 * drm/bridge: MHDP8546: HDCP support + DT bindings, Register DP AUX channel with userspace; Sil8620: Fix module dependencies; dw-hdmi: Add option to not load CEC driver; Fix stopping in drm_bridge_chain_pre_enable(); Ti-sn65dsi86: Fix refclk handling, Break GPIO and MIPI-to-eDP into subdrivers, Use pm_runtime autosuspend, cleanups; It66121: Add driver + DT bindings; Adv7511: Support I2S IEC958 encoding; Anx7625: fix power-on delay; Nwi-dsi: Modesetting fixes; Cleanups * drm/bochs: Support screen blanking * drm/gma500: Cleanups * drm/gud: Cleanups * drm/i915: Use correct max source link rate for MST * drm/kmb: Cleanups * drm/meson: Disable dw-hdmi CEC driver * drm/nouveau: Pin/unpin fixes wrt to TTM; Use bo->base.size instead of mem->num_pages; Register AUX adapters after their connectors * drm/qxl: Fix shadow BO unpin * drm/radeon: Duplicate some DRM AGP code to uncouple from legacy drivers * drm/simpledrm: Add a generic DRM driver for simple-framebuffer devices * drm/tiny: Fix log spam if probe function gets deferred * drm/vc4: Add support for HDR-metadata property; Cleanups * drm/virtio: Create dumb BOs as guest blobs; * drm/vkms: Use managed drmm_universal_plane_alloc(); Add XRGB plane composition; Add overlay support * drm/vmwgfx: Enable console with DRM_FBDEV_EMULATION; Fix CPU updates of coherent multisample surfaces; Remove reservation semaphore; Add initial SVGA3 support; Support amd64; Use 1-based IDR; Use min_t(); Cleanups Signed-off-by: Dave Airlie <[email protected]> From: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-05-13drm/amdgpu: add judgement when add ip blocks (v2)Likun GAO1-0/+1
Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu: Rename to ras_*_enabledLuben Tuikov1-2/+2
Rename, ras_hw_supported --> ras_hw_enabled, and ras_features --> ras_enabled, to show that ras_enabled is a subset of ras_hw_enabled, which itself is a subset of the ASIC capability. Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-10drm/amdgpu: Move up ras_hw_supportedLuben Tuikov1-1/+2
Move ras_hw_supported into struct amdgpu_dev. The dependency is: struct amdgpu_ras <== struct amdgpu_dev <== ASIC, read as "struct amdgpu_ras depends on struct amdgpu_dev, which depends on the hardware." This can be loosely understood as, "if RAS is supported, which is property of the ASIC (struct amdgpu_dev), then we can access struct amdgpu_ras." v2: Fix a typo: must binary AND in ternary cond in amdgpu_ras.c Cc: Alexander Deucher <[email protected]> Cc: John Clements <[email protected]> Cc: Hawking Zhang <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-05-05drm/amdgpu: Add show_fdinfo() interfaceRoy Sun1-0/+1
Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <[email protected]> Signed-off-by: Roy Sun <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-04-09drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flagJude Shih1-0/+1
[Why & How] We use outbox interrupt that allows us to do the AUX via DMUB Therefore, we need to add some irq source related definition in the header files; Signed-off-by: Jude Shih <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: Make set PG/CG state functions publicLijo Lazar1-0/+5
Expose PG/CG set states functions for other clients Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: Add reset control handling to reset workflowLijo Lazar1-6/+5
This prefers reset control based handling if it's implemented for a particular ASIC. If not, it takes the legacy path. It uses the legacy method of preparing environment (job, scheduler tasks) and restoring environment. v2: remove unused variable (Alex) Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: Add reset control to amdgpu_deviceLijo Lazar1-0/+3
v1: Add generic amdgpu_reset_control to handle different types of resets. It may be added at device, hive or ip level. Each reset control has a list of handlers associated with it to handle different types of reset. Reset control is responsible for choosing the right handler given a particular reset context. Handler objects may implement a set of functions on how to handle a particular type of reset. prepare_env = Prepare environment/software context (not used currently). prepare_hwcontext = Prepare hardware context for the reset. perform_reset = Perform the type of reset. restore_hwcontext = Restore the hw context after reset. restore_env = Restore the environment after reset (not used currently). Reset context carries the context of reset, as of now this is based on the parameters used for current set of resets. v2: Fix coding style Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drivers: gpu: Remove duplicate include of amdgpu_hdp.hWan Jiabing1-1/+0
amdgpu_hdp.h has been included at line 91, so remove the duplicate include. Acked-by: Christian König <[email protected]> Signed-off-by: Wan Jiabing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: rework S3/S4/S0ix state handlingAlex Deucher1-7/+3
Set flags at the top level pmops callbacks to track state. This cleans up the current set of flags and properly handles S4 on S0ix capable systems. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: disentangle HG systems from vgaswitcherooAlex Deucher1-1/+2
There's no need to keep vgaswitcheroo around for HG systems. They don't use muxes and their power control is handled via ACPI. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-04-09drm/amdgpu: add codes to capture invalid hardware access when recoveryDennis Li1-0/+2
When recovery thread has begun GPU reset, there should be not other threads to access hardware, otherwise system randomly hang. v2 (chk): rewritten from scratch, use trylock and lockdep instead of hand wiring the logic. v3: add in_irq check v4: change to check in_task Signed-off-by: Dennis Li <[email protected]> Signed-off-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-26Merge tag 'amd-drm-next-5.13-2021-03-23' of ↵Daniel Vetter1-13/+43
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.13-2021-03-23: amdgpu: - Debugfs cleanup - Various cleanups and spelling fixes - Flexible array cleanups - Initial AMD Freesync HDMI - Display fixes - 10bpc dithering improvements - Display ASSR support - Clean up and unify powerplay and swsmu interfaces - Vangogh fixes - Add SMU gfx busy queues for RV/PCO - PCIE DPM fixes - S0ix fixes - GPU metrics data fixes - DCN secure display support - Backlight type override - Add initial support for Aldebaran - RAS fixes - Prime fixes for A+A systems - Reset fixes - Initial resource cursor support - Drop legacy IO BAR requirements - Various power fixes amdkfd: - MMU notifier fixes - APU fixes radeon: - Debugfs cleanups - Flexible array cleanups UAPI: - amdgpu: Add a new INFO ioctl interface to query video capabilities rather than hardcoding them in userspace. This allows us to provide fine grained asic capabilities (e.g., if a particular part is bandwidth limited, we can limit the capabilities). Proposed userspace: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps - amdkfd: bump the driver version. There was a problem with reporting some RAS features on older versions of the driver. Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21 Danvet: A bunch of conflicts all over, but it seems to compile ... I did put the call to dc_allow_idle_optimizations() on a single line since it looked a bit too jarring to be left alone. Signed-off-by: Daniel Vetter <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-03-23drm/amdgpu/display: re-enable freesync video patchesNikola Cornij1-0/+1
Since this is a "revert of a revert", the end effect is that freesync video is back to its original state, the way it was before the first revert. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: drop legacy IO bar supportAlex Deucher1-7/+0
It was leftover from radeon where it was required for some specific old hardware. It hasn't been required for ages and the driver already falls back to MMIO when legacy IO is not available. Legacy IO also seems to be problematic on on some thunderbolt devices. Drop it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Nicholas Johnson <[email protected]>
2021-03-23drm/amdgpu: Reset the devices in the XGMI hive duirng probeshaoyunl1-0/+13
In passthrough configuration, hypervisior will trigger the SBR(Secondary bus reset) to the devices without sync to each other. This could cause device hang since for XGMI configuration, all the devices within the hive need to be reset at a limit time slot. This serial of patches try to solve this issue by co-operate with new SMU which will only do minimum house keeping to response the SBR request but don't do the real reset job and leave it to driver. Driver need to do the whole sw init and minimum HW init to bring up the SMU and trigger the reset(possibly BACO) on all the ASICs at the same time Signed-off-by: shaoyunl <[email protected]> Acked-by: Andrey Grodzovsky [email protected] Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Add reset_list for device list used for resetshaoyunl1-0/+1
The gmc.xgmi.head list originally is designed for device list in the XGMI hive. Mix use it for reset purpose will prevent the reset function to adjust XGMI device list which is required in next change Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Andrey Grodzovsky [email protected] Signed-off-by: Alex Deucher <[email protected]>
2021-03-23Revert freesync video patches temporarilyAurabindo Pillai1-1/+0
This temporarily reverts freesync video patches since it causes regression with eDP displays. This patch is a squashed revert of the following patches: 6f59f229f8ed ("drm/amd/display: Skip modeset for front porch change") d10cd527f5e5 ("drm/amd/display: Add freesync video modes based on preferred modes") 0eb1af2e8205 ("drm/amd/display: Add module parameter for freesync video mode") Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Anson Jacob <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: enable watchdog feature for SQ of aldebaranDennis Li1-0/+7
SQ's watchdog timer monitors forward progress, a mask of which waves caused the watchdog timeout is recorded into ras status registers and then trigger a system fatal error event. v2: 1. change *query_timeout_status to *query_sq_timeout_status. 2. move query_sq_timeout_status into amdgpu_ras_do_recovery. 3. add module parameters to enable/disable fatal error event and modify the watchdog timer. v3: 1. remove unused parameters of *enable_watchdog_timer Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/amdgpu: Add smu_pptable module parameterLijo Lazar1-0/+1
Temporarily add smu_pptable module parameter for aldebaran.This is used to force soft PPTable use overriding any VBIOS PPTable. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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